JEDEC JEP154-2008 Guideline for Characterizing Solder Bump Electromigration under Constant Current and Temperature Stress.pdf

1、JEDEC PUBLICATION Guideline for Characterizing Solder Bump Electromigration under Constant Current and Temperature Stress JEP154 JANUARY 2008 (Reaffirmed: JUNE 2011) JEDEC SOLID STATE TECHNOLOGY ASSOCIATION NOTICE JEDEC standards and publications contain material that has been prepared, reviewed, an

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3、ity and improvement of products, and assisting the purchaser in selecting and obtaining with minimum delay the proper product for use by those other than JEDEC members, whether the standard is to be used either domestically or internationally. JEDEC standards and publications are adopted without reg

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5、 standards and publications represents a sound approach to product specification and application, principally from the solid state device manufacturer viewpoint. Within the JEDEC organization there are procedures whereby a JEDEC standard or publication may be further processed and ultimately become

6、an ANSI standard. No claims to be in conformance with this standard may be made unless all requirements stated in the standard are met. Inquiries, comments, and suggestions relative to the content of this JEDEC standard or publication should be addressed to JEDEC at the address below, or refer to ww

7、w.jedec.org under Standards and Documents for alternative contact information. Published by JEDEC Solid State Technology Association 2011 3103 North 10th Street Suite 240 South Arlington, VA 22201-2107 This document may be downloaded free of charge; however JEDEC retains the copyright on this materi

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9、tact: JEDEC Solid State Technology Association 3103 North 10th Street Suite 240 South Arlington, VA 22201-2107 or refer to www.jedec.org under Standards-Documents/Copyright Information. JEDEC Publication No. 154 -i- Guideline for Characterizing Solder Bump Electromigration under Constant Current and

10、 Temperature Stress Contents 1 Scope .1 2 Introduction 1 2.1 Bump electromigration failure mechanism 1 2.2 Model for solder bump electromigration1 2.3 Overview of the test .2 3 Terms and Definitions.2 4 Test structures.3 4.1 Materials and process factors .3 4.2 Bump geometry and structures.3 4.3 Dis

11、tribution of current to the bump(s)3 4.4 Resistance of the test structure .4 4.5 Types of test structures.4 4.5.1 Single-bump structures.4 4.5.2 Daisy Chains 5 4.6 Electromigration of the interconnect 7 4.7 Bump polarity.7 4.8 Joule heating and temperature measurement7 5 Stress conditions .8 5.1 Cur

12、rent density .8 5.2 Temperature .9 6 Temperature calibration and measurement.9 6.1 Calibrating the oven .9 6.2 Calibrating the temperature sensing devices (temperature sensors) .9 6.2.1 Resistors.9 6.2.2 Diodes 10 6.2.3 EM devices as temperature sensors10 6.3 Determining the temperature rise of the

13、EM devices .10 6.3.1 Temperature variation across the die11 6.4 Setting the oven temperature11 7 Performing the test11 7.1 Sample size 11 7.2 Preconditioning 11 7.3 Arranging the samples in the oven .12 7.4 Resistance measurement.12 7.5 Test duration and resistance monitoring.12 7.6 Setting the fail

14、ure criterion.13 7.6.1 Percentage increase in resistance13 7.6.2 Actual increase in resistance 13 7.6.3 Absolute resistance.14 7.7 Test details to be included in report .14 8 Data analysis 15 8.1 Choosing the failure distribution15 8.1.1 Lognormal distribution.15 8.1.2 Weibull distribution15 8.1.3 C

15、autions in choosing the failure distribution16 8.1.4 Cautions for 3-parameter distributions.16 8.2 Special considerations for analysis of chain data .16 8.3 Assigning cumulative distribution function (CDF) values to the failure data 17 8.4 Plotting the data18 8.5 Dealing with bimodal distributions 1

16、9 8.6 Extracting model parameters19 9 Failure Analysis / Physical Analysis20 10 References22 Annex A .24 JEDEC Publication No. 154 -ii- JEDEC Publication No. 154 Page 1 GUIDELINE FOR CHARACTERIZING SOLDER BUMP ELECTROMIGRATION UNDER CONSTANT CURRENT AND TEMPERATURE STRESS (From JEDEC Board Ballot JC

17、B-07-109, formulated under the cognizance of the JC-14.1 Subcommittee on Reliability Test Methods for Packaged Devices.) 1 Scope This document describes a method to test the electromigration (EM) susceptibility of solder bumps, including other types of bumps, such as solder capped copper pillars, us

18、ed in flip-chip packages. The method is valid for Sn/Pb eutectic, high Pb, and Pb-free solder bumps. The document discusses the advantages and concerns associated with EM testing, as well as options for data analysis. The tests are performed on packaged bump electromigration test devices. The bump e

19、lectromigration test techniques described in this document can be used to assess the electromigration reliability of different types of solder bumps and metallizations, to make materials decisions, and to establish maximum bump current specifications. Thermal migration is also known to exist, but is

20、 outside the scope of this document. 2 Introduction 2.1 Bump electromigration failure mechanism Electromigration of solder bumps is a failure mechanism that leads to increased resistance sometimes accompanied by events such as formation of intermetallic compounds (IMC), voids and cracks that can dis

21、rupt the solder joint and silicon and/ or package metallization leading into the bump. The resistance increase can ultimately lead to an open circuit. The stress drivers for this failure mechanism are current density and elevated temperature. The failure mechanisms for bump electromigration can be v

22、aried and depend on the metals present both on the silicon side and the substrate side. 2.2 Model for solder bump electromigration Blacks model (equation 1), which has been applied for many years to semiconductor die metallization, has also been applied to solder bump electromigration 1. (1) This eq

23、uation contains a model parameter relating to temperature (T): the thermal activation energy, Ea. It also contains a model parameter relating to current density (J): the current density exponent, n. In order to verify that Blacks model applies to the type of bump structures being tested, or to deriv

24、e a new model, testing at multiple stress temperatures and current densities is needed. Extraction of these model parameters from the test results is addressed later in this publication. kTEJTTFanexpJEDEC Publication No. 154 Page 2 2.3 Overview of the test The electromigration test described in this

25、 document is performed in an oven at constant temperature and with a constant current source. The resistance of the bump electromigration structure (EM device) is measured using a 4-point measurement technique with the measurement points as close to the bump as possible. The EM device is considered

26、to have failed when its resistance change (either absolute value or percent increase) reaches a predetermined value. The test is ideally continued until most of the test structures have met the predetermined failure criterion. The test structure may consist of a single bump or a chain of bumps. 3 Te

27、rms and definitions anode: A circuit element to which positive bias is applied. NOTE For the purpose of this document, when the die is the anode the electron flow is from the substrate through the solder bump to the die. cathode: A circuit element to which negative bias is applied. NOTE For the purp

28、ose of this document, when the die is the cathode the electron flow is from the die through the solder bump to the substrate. censored data: A set of data for which a portion of the test samples had testing discontinued prior to failing or survived until the end of the test. intermetallic compound (

29、IMC): A substance formed when solder comes in contact with another metal at elevated temperature. NOTE The IMC is composed of multiple constituents from the solder and the other metal. This material has unique mechanical and electrical properties, which are different from those of the initial solder

30、 and the other metallization. simple daisy chain: A daisy chain consisting of a single series of bumps in a chain. NOTE A current through the series of bumps will alternate in direction in successive bumps. The number of bumps where electrons flow out of the die and the number of bumps where electro

31、ns flow into the die are equal. substrate, (package): A platform that mechanically supports a bumped silicon die within a package and electrically connects the solder bump landing pads to external terminals, using layered dielectric materials and conductive traces. suspended items; suspensions: Item

32、s that had testing discontinued prior to failing or that survived until the end of the test. under-bump metallization (UBM): A patterned, thin-film stack of material that provides 1) an electrical connection from the silicon die to a solder bump; 2) a barrier function to limit unwanted diffusion fro

33、m the bump to the silicon die; and 3) a mechanical interconnection of the solder bump to the die through adhesion to the die passivation and attachment to a solder bump pad. JEDEC Publication No. 154 Page 3 3 Terms and definitions (contd) Wheatstone bridge: A 4-arm bridge forming a diamond, all of w

34、hose arms are predominantly resistive, with three resistors of known values in three of the arms and the unknown resistor in the fourth. NOTE 1 A voltage source, e.g., a battery, is connected across two opposite points of the diamond and a current-detecting instrument (e.g., a galvanometer) is conne

35、cted across the other two points. The values of one or two of the known resistors are varied until no current flows through the galvanometer. The bridge is then balanced and the value of the unknown resistor can be calculated in terms of the other three. NOTE 2 A method using the Wheatstone bridge f

36、or monitoring resistance of solder bumps in electromigration tests has greater sensitivity to resistance change than other methods. Net resistance changes due to electromigration of only the solder bumps, excluding the Al or Cu traces, can be deduced by this method. 4 Test structures 4.1 Materials a

37、nd process factors Bump electromigration is strongly dependent on several factors. These include the following: bump composition; bump fabrication method (e.g., electroplated, printed paste, or evaporated 2); composition of the under bump metallization (UBM) on the silicon 3; the UBM layer thickness

38、es 4; and the substrate type; and substrate pre-solder layers-e.g., Ni/Au, Copper/Organic Solder Protect (OSP), Copper/Solder on Pad (SOP)-and their thickness 5,6. The semiconductor die metallization, passivation or repassivation composition, and test structure details, including via openings and de

39、sign features, may also have a significant effect on Joule heating and current crowding. As such, it is very important that the test structure and materials accurately replicate the product design being assessed. If not, deviations from the product design need to be clearly described. 4.2 Bump geome

40、try and structures Bump geometry and structures can affect bump EM performance based on effects of current crowding. Important geometrical considerations in bump electromigration are: bump height and diameter; UBM size; UBM stack composition and layer thicknesses; passivation type and opening dimens

41、ion; the silicon top metal pad size and thickness; semiconductor die metallization and thickness into the bump structure; and substrate pad size and composition. As mentioned above, to accurately evaluate product, the test structure should reflect these key attributes. If this is not done, the parts

42、 under test may not accurately represent current density and current crowding considerations for that product. It should also be noted that the bump geometry and structure used in any specific test vehicle may not represent the current carrying capability of any other geometries or structures. 4.3 D

43、istribution of current to the bump(s) It has been well established that confinement of the current within the bump, or current crowding, plays a significant role in void formation and bump failure during bump electromigration testing 7-11. Current crowding can lead to damage initiation where the cur

44、rent density is at its peak. Thus bumps with nominally identical sizes and composition can exhibit different degrees of damage for the same applied current. Bumps with different current distributions can perform differently in an electromigration test even when stressed with the same conditions. JED

45、EC Publication No. 154 Page 4 4 Test structures (contd) 4.3 Distribution of current to the bump(s) (contd) Consequently, different current distributions may yield different values of maximum bump current. For this reason, it is important that the EM test structures represent as closely as possible t

46、he configuration that will be used in the product. However, since much higher currents and temperatures are used in the electromigration test than would be used in a product, the silicon and package metal current feed lines must be made large enough that the metal lines do not experience electromigr

47、ation failures due to large amounts of joule heating or affect the resistance measurement of the bump during the test. Due to these considerations, the metallization geometries and linewidths used in the product cannot effectively be used in the test structure. Nevertheless, the distribution of curr

48、ent to the bump should be arranged so that it matches actual product as closely as possible. A metric sometimes used to assess current crowding is the ratio of the peak current density to the average current density in the bump (called the current crowding ratio) 4. Modeling can be performed in orde

49、r to evaluate the current crowding ratio in the test structure and to assess its relationship to product. It is important when presenting bump electromigration data that the details of the test structure be included in the report so that the reader can determine whether the test structure is representative of the current distribution in the actual product. In fact, a variety current distribution configurations may need to be tested in order to adequately cover the range of product configurations intended. 4.4 Resistance of the test structure The contact resi