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JEDEC JESD220D-2018 Universal Flash Storage (UFS) Version 3 0.pdf

1、JEDEC STANDARD Universal Flash Storage (UFS) Version 3.0 JESD220D (Revision of JESD220C, March 2016) JANUARY 2018 JEDEC SOLID STATE TECHNOLOGY ASSOCIATION NOTICE JEDEC standards and publications contain material that has been prepared, reviewed, and approved through the JEDEC Board of Directors leve

2、l and subsequently reviewed and approved by the JEDEC legal counsel. JEDEC standards and publications are designed to serve the public interest through eliminating misunderstandings between manufacturers and purchasers, facilitating interchangeability and improvement of products, and assisting the p

3、urchaser in selecting and obtaining with minimum delay the proper product for use by those other than JEDEC members, whether the standard is to be used either domestically or internationally. JEDEC standards and publications are adopted without regard to whether or not their adoption may involve pat

4、ents or articles, materials, or processes. By such action JEDEC does not assume any liability to any patent owner, nor does it assume any obligation whatever to parties adopting the JEDEC standards or publications. The information included in JEDEC standards and publications represents a sound appro

5、ach to product specification and application, principally from the solid state device manufacturer viewpoint. Within the JEDEC organization there are procedures whereby a JEDEC standard or publication may be further processed and ultimately become an ANSI standard. No claims to be in conformance wit

6、h this standard may be made unless all requirements stated in the standard are met. Inquiries, comments, and suggestions relative to the content of this JEDEC standard or publication should be addressed to JEDEC at the address below, or refer to www.jedec.org under Standards and Documents for altern

7、ative contact information. Published by JEDEC Solid State Technology Association 2018 3103 North 10th Street Suite 240 South Arlington, VA 22201-2107 JEDEC retains the copyright on this material. By downloading this file the individual agrees not to charge for or resell the resulting material. PRICE

8、: Contact JEDEC Printed in the U.S.A. All rights reserved PLEASE! DONT VIOLATE THE LAW! This document is copyrighted by JEDEC and may not be reproduced without permission. For information, contact: JEDEC Solid State Technology Association 3103 North 10th Street Suite 240 South Arlington, VA 22201-21

9、07 or refer to www.jedec.org under Standards-Documents/Copyright Information. JEDEC Standard No. 220D -i- UNIVERSAL FLASH STORAGE (UFS) Contents Page 1 Scope 1 2 Normative Reference 1 3 Terms and Definitions 2 3 Terms and Definitions (contd) 3 3.1 Acronyms 3 3.1 Acronyms (contd) 4 3.2 Conventions 4

10、3.3 Keywords 5 3.4 Abbreviations 5 4 Introduction 6 4.1 General Features 6 4.2 Interface Features 7 4.3 Functional Features 7 5 UFS Architecture Overview 8 5.1 UFS Top Level Architecture 8 5.2 UFS System Model 11 5.3 System Boot and Enumeration 11 5.4 UFS Interconnect (UIC) Layer 12 5.4.1 UFS Physic

11、al Layer Signals 12 5.4.2 MIPI UniPro 12 5.4.3 MIPI UniPro Related Attributes 13 5.5 UFS Transport Protocol (UTP) Layer 13 5.5.1 Architectural Model 14 5.6 UFS Application and Command Layer 18 5.7 Mechanical 19 6 UFS Electrical: Clock, Reset, Signals and Supplies 20 6.1 UFS Signals 20 6.2 Reset Sign

12、al 22 6.3 Power Supplies 22 6.4 Reference Clock 23 6.4 Reference Clock (contd) 24 6.4.1 HS Gear Rates 26 6.4.2 Host Controller requirements for reference clock generation 27 6.5 External Charge Pump Capacitors (Optional) 28 6.6 Absolute Maximum DC Ratings and Operating Conditions 29 7 Reset, Power-u

13、p and Power-down 30 7.1 Reset 30 7.1.1 Power-on Reset 30 7.1.2 Hardware Reset 31 7.1.3 EndPointReset 32 7.1.4 Logical Unit Reset 33 JEDEC Standard No. 220D -ii- 7.1.5 Host UniPro Warm Reset 33 7.1.6 Summary of Resets and Device Behavior 34 7.2 Power up ramp 35 7.3 Power off ramp 36 7.4 UFS Device Po

14、wer Modes and LU Power Condition 37 7.4.1 Device Power Modes 37 7.4.2 Power Management Command: START STOP UNIT 45 7.4.3 Power Mode Control 47 7.4.4 Logical Unit Power Condition 49 8 UFS UIC Layer: MIPI M-PHY 50 8.1 Termination 50 8.2 Drive Levels 50 8.3 PHY State machine 50 8.4 HS Burst 51 8.4.1 HS

15、 Prepare Length Control 51 8.4.2 HS Sync Length Control 51 8.5 PWM Burst 51 8.5.1 LS Prepare Length Control 51 8.6 Adapt 51 8.7 UFS PHY Attributes 51 8.8 Electrical characteristics 54 8.8.1 Transmitter Characteristics 54 8.8.2 Receiver Characteristics 54 9 UFS UIC Layer: MIPI Unipro 55 9.1 Overview

16、55 9.2 Architectural Model 55 9.3 UniPro/UFS Transport Protocol Interface (Data Plane) 56 9.4 UniPro/UFS Control Interface (Control Plane) 57 9.5 UniPro/UFS Transport Protocol Address Mapping 58 9.6 Options and Tunable Parameters of UniPro 59 9.6.1 UniPro PHY Adapter 59 9.6.2 UniPro Data Link Layer

17、60 9.6.3 UniPro Network Layer 60 9.6.4 UniPro Transport Layer 61 9.6.5 UniPro Device Management Entity Transport Layer 61 9.6.6 UniPro Attributes 62 10 UFS Transport Protocol (UTP) Layer 63 10.1 Overview 63 10.2 UTP and UniPro Specific Overview 64 10.2.1 Phases 64 10.2.2 Data Pacing 64 10.2.3 UniPro

18、 64 10.3 UFS Transport Protocol Transactions Overview 65 10.4 Service Delivery Subsystem 65 10.5 UPIU Transactions 65 10.5 UPIU Transactions (contd) 66 JEDEC Standard No. 220D -iii- 10.6 General UFS Protocol Information Unit Format 67 10.6.1 Overview 68 10.6.2 Basic Header Format 68 10.7 UFS Protoco

19、l Information Units 73 10.7.1 Command UPIU 73 10.7.2 Response UPIU 76 10.7.3 Data Out UPIU 85 10.7.4 Data In UPIU 88 10.7.5 Ready to Transfer UPIU 91 10.7.6 Task Management Request UPIU 94 10.7.7 Task Management Response UPIU 96 10.7.8 Query Request UPIU 98 10.7.9 Query Response UPIU 111 10.7.10 Rej

20、ect UPIU 123 10.7.11 NOP OUT UPIU 125 10.7.12 NOP IN UPIU 127 10.7.13 Data out transfer rules 129 10.7.13 Data out transfer rules (contd) 130 10.7.13 Data out transfer rules (contd) 131 10.7.13 Data out transfer rules (contd) 132 10.8 Logical Units 133 10.8.1 UFS SCSI Domain 133 10.8.2 UFS Logical U

21、nit Definition 133 10.8.3 Well Known Logical Unit Definition 134 10.8.4 Logical Unit Addressing 134 10.8.5 Well Known Logical Unit Defined in UFS 135 10.8.6 Translation of 8-bit UFS LUN to 64-bit SCSI LUN Address 136 10.8.7 SCSI Write Command 137 10.8.8 SCSI Read Command 138 10.8.9 Unit Attention Co

22、ndition 139 10.9 Application Layer and Device Manager Transport Protocol Services 140 10.9.1 UFS Initiator Port and Target Port Attributes 140 10.9.2 Execute Command procedure call transport protocol services 141 10.9.3 SCSI Command transport protocol service 142 10.9.4 SCSI Command Received transpo

23、rt protocol 143 10.9.5 Send Command Complete transport protocol service 144 10.9.6 Command Complete Received transport protocol service 145 10.9.7 Data transfer SCSI transport protocol services 146 10.9.8 Task Management Function procedure calls 150 10.9.9 Query Function transport protocol services

24、156 11 UFS Application (UAP) Layer SCSI Commands 159 11.1 Universal Flash Storage Command Layer (UCL) Introduction 159 11.1.1 The Command Descriptor Block (CDB) 159 11.2 Universal Flash Storage Native Commands (UNC) 159 11.3 Universal Flash Storage SCSI Commands 160 11.3.1 General information about

25、SCSI commands in UFS 161 JEDEC Standard No. 220D -iv- 11.3.2 INQUIRY Command 161 11.3.3 MODE SELECT (10) Command 164 11.3.4 MODE SENSE (10) Command 166 11.3.5 READ (6) Command 169 11.3.6 READ (10) Command 170 11.3.7 READ (16) Command 172 11.3.8 READ CAPACITY (10) Command 174 11.3.9 READ CAPACITY (16

26、) Command 176 11.3.10 START STOP UNIT Command 180 11.3.11 TEST UNIT READY Command 181 11.3.12 REPORT LUNS Command 182 11.3.13 VERIFY (10) Command 187 11.3.14 WRITE (6) Command 189 11.3.15 WRITE (10) Command 191 11.3.16 WRITE (16) Command 194 11.3.17 REQUEST SENSE Command 197 11.3.18 FORMAT UNIT Comm

27、and 199 11.3.19 PRE-FETCH (10) Command 201 11.3.20 PRE-FETCH (16) Command 204 11.3.21 SECURITY PROTOCOL IN Command 205 11.3.22 SECURITY PROTOCOL OUT Command 206 11.3.23 SEND DIAGNOSTIC Command 208 11.3.24 SYNCHRONIZE CACHE (10) Command 210 11.3.25 SYNCHRONIZE CACHE (16) Command 213 11.3.26 UNMAP Com

28、mand 214 11.3.27 READ BUFFER Command 218 11.3.28 WRITE BUFFER Command 224 11.4 Mode Pages 228 11.4.1 Mode Page Overview 228 11.4.2 UFS Supported Pages 233 11.5 Vital product data parameters 240 11.5.1 Overview 240 11.5.2 VPD page format 240 11.5.3 Supported VPD Pages VPD page 241 11.5.4 Mode Page Po

29、licy VPD page 242 12 UFS Security 244 12.1 UFS Security Feature Support Requirements 244 12.2 Secure Mode 244 12.2.1 Description 244 12.2.2 Requirements 245 12.2.3 Implementation 246 12.3 Device Data Protection 251 12.3.1 Description and Requirements 251 12.3.2 Implementation 251 12.4 RPMB 252 12.4.

30、1 Introduction 252 JEDEC Standard No. 220D -v- 12.4.2 RPMB Well Known Logical Unit Description 252 12.4.3 Requirements 253 12.4.4 Implementation 262 12.4.5 Security Protocol IN/OUT Commands 263 12.4.6 RPMB Operations 268 12.5 Malware Protection 284 13 UFS Functional Descriptions 285 13.1 UFS Boot 28

31、5 13.1.1 Introduction 285 13.1.2 Boot Configuration 285 13.1.3 Initialization and boot code download process 288 13.1.4 Initialization process without boot code download 291 13.1.5 Boot Logical Unit Operations 292 13.1.6 Configurability 292 13.1.7 Security 293 13.2 Logical Unit Management 293 13.2.1

32、 Introduction 293 13.2.2 Logical Unit features 293 13.2.3 Logical Unit Configuration 296 13.3 Logical Block Provisioning 302 13.3.1 Overview 302 13.3.2 Full Provisioning 302 13.3.3 Thin Provisioning 302 13.4 Host Device Interaction 303 13.4.1 Overview 303 13.4.2 Applicable Devices 303 13.4.3 Command

33、 Queue: Inter-LU Priority 303 13.4.4 Background Operations Mode 304 13.4.5 Power Off Notification 306 13.4.6 Dynamic Device Capacity 307 13.4.7 Data Reliability 311 13.4.8 Real-Time Clock Information 312 13.4.9 Context Management 313 13.4.10 System Data Tag Mechanism 316 13.4.11 Exception Events Mec

34、hanism 317 13.4.12 Queue Depth Definition 318 13.4.13 Device Life Span Mode 319 13.4.14 Refresh Operation 320 13.4.15 Temperature Event Notification 323 13.5 UFS Cache 324 13.6 Production State Awareness (PSA) 325 13.6.1 Introduction 325 13.6.2 PSA flow 325 14 UFS Descriptors, Flags and Attributes 3

35、28 14.1 UFS Descriptors 328 14.1.1 Descriptor Types 328 JEDEC Standard No. 220D -vi- 14.1.2 Descriptor Indexing 329 14.1.3 Accessing Descriptors and Device Configuration 329 14.1.4 Descriptor Definitions 333 14.2 Flags 363 14.3 Attributes 367 15 UFS Mechanical Standard 378 Annex A (informative) Dyna

36、mic Capacity Host Implementation Example 379 A.1 Overview 379 A.2 Method Outline 379 Annex B (informative) Differences between SPECIFICATION REVISIONS 380 B.1 Changes between JESD220D and its predecessor JESD220C (March 2016) 380 B.1.1 New features or new definitions 380 B.1.2 Changes in section 2 “

37、Normative Reference” 380 B.1.3 Changes in features already defined in UFS 2.1 380 B.2 Changes between JESD220C and its predecessor JESD220B (September 2013) 381 B.2.1 New features or new definitions 381 B.2.2 Changes in section 2 “Normative Reference” 381 B.2.3 Changes in features already defined in

38、 UFS 2.0 381 B.3 Changes between JESD220B and its predecessor JESD220A (June 2012) 384 B.3.1 New features or new definitions 384 B.3.2 Changes in section 2 “Normative Reference” 384 B.3.3 Changes in features already defined in UFS 1.1 384 JEDEC Standard No. 220D -vii- Figures Figure 5.1 UFS Top Leve

39、l Architecture 8 Figure 5.2 Usage of UDM_SAP 9 Figure 5.3 Usage of UIO_SAP 9 Figure 5.4 UFS System Model . 11 Figure 5.5 SCSI Domain Class Diagram . 15 Figure 5.6 UFS Domain Class Diagram 16 Figure 6.1 UFS Device Block Diagram . 20 Figure 6.2 Supply voltage power up timings . 23 Figure 6.3 bRefClkGa

40、tingWaitTime 25 Figure 6.4 Clock input levels, rise time, and fall time . 26 Figure 6.5 Test Load Impedance 27 Figure 6.6 Output driver and Input receiver levels 27 Figure 6.7 Clock output levels, rise time and fall time 28 Figure 7.1 Power-on Reset . 30 Figure 7.2 Hardware Reset 31 Figure 7.3 Reset

41、 AC timings 31 Figure 7.4 EndPointReset 32 Figure 7.5 Logical Unit Reset 33 Figure 7.6 Power up ramps 35 Figure 7.7 Power off ramps . 36 Figure 7.8 Power Mode State Machine 41 Figure 8.1 Simplified example for I/O termination . 50 Figure 9.1 UniPro internal layering view (a) and UniPro Black Box vie

42、w (b) 55 Figure 9.2 Physical lane connections 60 Figure 10.1 Data out transfer example . 87 Figure 10.2 Data in transfer example . 90 Figure 10.3 READY TO TRANSFER UPIU sequence example 93 Figure 10.4 Example for data out transfer rule 1 . 129 Figure 10.5 Example for Data Transfer Count mismatch 130

43、 Figure 10.6 Example for data out transfer rule 2 . 131 Figure 10.7 Example for data out transfer rule 3 . 132 Figure 10.8 UFS SCSI domain 133 Figure 10.9 Logical Unit Addressing . 134 Figure 10.10 SCSI Write 137 Figure 10.11 SCSI Read 138 Figure 10.12 Command without Data Phase . 141 Figure 10.13 C

44、ommand + Read Data Phase 1/2 147 Figure 10.14 Command + Read Data Phase 2/2 147 Figure 10.15 Command + Write Data Phase . 149 Figure 10.16 Command + Write Data Phase 2/2 . 149 Figure 10.17 Task Management Function . 153 Figure 10.18 UFS Query Function . 156 Figure 11.1 UFS Command Layer . 159 Figure

45、 12.1 Purge operation state machine 248 Figure 12.2 Request type message delivery . 269 Figure 12.3 Response Type Message delivery . 271 JEDEC Standard No. 220D -viii- Figure 12.4 Authentication Key Programming Flow . 273 Figure 12.5 Read Counter Value Flow 274 Figure 12.6 Authenticated Data Read Fl

46、ow . 279 Figure 12.7 Authenticated Secure Write Protect Configuration Block Write Flow . 282 Figure 12.8 Authenticated Secure Write Protect Configuration Block Read Flow . 284 Figure 13.1 UFS System Diagram . 285 Figure 13.2 Example of UFS Device Memory Organization for Boot 287 Figure 13.3 Device I

47、nitialization and Boot Procedure Sequence Diagram 290 Figure 13.4 Example of UFS Device Memory Organization 294 Figure 13.5 Physical Memory Resource State Machine 310 Figure 13.6 Example of data status after a power failure during reliable write operation . 311 Figure 13.7 PSA flow 326 Figure 13.8 P

48、SA state machine 327 Figure 14.1 Descriptor Organization . 329 Figure 14.2 Read Request Descriptor 331 Figure 14.3 Write Request Descriptor . 332 Tables Table 5.1 UFS Signals . 12 Table 5.2 ManufacturerID and DeviceClass Attributes . 13 Table 6.1 Signal Name and Definitions . 21 Table 6.2 Reset Sign

49、al Electrical Parameters 22 Table 6.3 UFS Power Supply Parameters 22 Table 6.4 Reference Clock parameters 24 Table 6.5 HS-BURST Rates 26 Table 6.6 Host controller reference clock parameters . 27 Table 6.7 Charge pump capacitors description 28 Table 6.8 Charge pump related ball names 29 Table 6.9 Absolute maximum DC ratings and Operating Conditions . 29 Table 7.1 Reset timing parameters . 31 Table 7.2 Reset States 34 Table 7.3 UniPro

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