JEDEC JESD372-1970 The Measurement of Small-Signal VHF-UHF Transistor Admittance Parameters.pdf

1、JEDEC STANDARD The Measurement of Small-Signal VHF-UHF Transistor Admittance Parameters JESD372 (Previously known as RS-372 and/or EIA-372) MAY 1970 (Reaffirmed: April 1981, April 1999, March 2009) JEDEC SOLID STATE TECHNOLOGY ASSOCIATION NOTICE JEDEC standards and publications contain material that

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10、uth Arlington, VA 22201-2107 or call (703) 907-7559 ttBRUARY, 1970 EIA STANDARD f or THE MEASUREMENT OF SMALL-SIGNAL VHF-UHF TRANSISTOR ADMITTANCE PARAMETERS ELECTRONIC INDUSTRIES ASSOCIATION STANDARD RS-372 Formulated by JEDEC Semiconductor Device Council NOTICE EIA engineering standards are design

11、ed to serve the public interest thmu h eliminating mis- understandings between manufacturers and purchasers, facilitating interchan ea ihty and improve- ment of products, and assisting the purchaser in selectin pro x er product for his particular need. % .% %. . and obtaining wit minimum delay the E

12、xistence of SW standards shall not in any respect pre- clu e any member or non-member of EIA from manufacturin such standards, nor shall the existence of such standards prec ude their voluntary use by those o k or selling products not conformin fi, to er than EIA members whether the standard is to b

13、e used either domestically or internationally. Recommended standards are adopted by EIA without regard to whether or not their adoption may involve patents on articles, materials, or processes. By such action, EIA does not assume any liability to any patent owner, nor does it assume any obligation w

14、hatever to parties adopting the recommended standards. Published by ELECTRONIC INDUSTRIES ASSOCIATION Engineering Department 2001 Eye Street, NW., Washington, D. C. 20006 PRICE: Printed tn “.S.A RS-372 Page 1 STANDARD FOR THE MEASUREMENT OF SMALL-SIGNAL VHF-UHF TRANSISTOR ADMITTANCE PARAMETERS (From

15、 Standards Proposal No. 1029, formulated under the cognizance of the JEDEC JS-9 Committee on Low Power Transistors.) 1. DEFINITIONS 1.1 Definition of the admittance parameters Given a two-port network as shown in Figure 1, where 1, il, vz, and i2 represent the voltage and the current at ports one an

16、d two respectively, the admittance parameters may be defined as the elements of the matrix Yl I y12 Y= (1) y21 y22 associated with the linear equations and il =YIIVI +Y12v2, i2 = y21vl +Y22v2. Each of the above parameters may be individually defined as follows: y, , is the driven-point admittance at

17、 port one with port two short-circuited, i.e., il y11=- “1 “2 = 0 12 is the reverse transadmittance with port one short-circuited, i.e., il Y12 =- v2 v, =o (2) (3) (4) (9 RS-372 Page 2 2 is the forward transadmittance with port two short-circuited, i.e., i2 Y21 =- “1 v2 = 0 y22 is the driving-point

18、admittance at port two with port one short-circuited, i.e., i2 Y22 =- v2 “1 =o (6) The admittance parameters of transistors are also commonly represented by the following symbols: yt 1 is represented by yis, 12 is represented by y, y2t is represented by yfx, y22 is represented by y, where x is repla

19、ced by e, b, or c for bipolar transistors in common-emitter, common-base and common-collector configuration respectively; and by d, g, or s for field-effect transistors in common-drain, common-gate or common-source configuration respectively. 1.2 Definition of small-signal conditions Transistors are

20、 essentially non-linear devices which, for sufficiently small applied signals, behave as linear two-ports. Small-signal conditions may, therefore, be defined as the values of the voltage and current at ports one and two, below which the transistor may be considered a linear two-port. For practical a

21、pplications, the following definition will be used: Small-signal conditions are satisfied when a reduction of 50% in the amplitudes of vt , it, v2 or i2 will not result in a variation of the ratio defined by (41, (S), (6) or (7) of more than VJJ * *All asterisks in this document refer to the followi

22、ng footnote: The numerical values quoted have been agreed upon by the JS-9 JEDEC committee as those representing a practical compromise between the usual requirements of circuit design applications of admittance parameters and the meawrement technology at the time of writing this document. RS-372 Pa

23、as 3 1.3 Definition of the transistor terminals In standard single-ended axial-lead transistor packages, the transistor terminals for the purposes of this standard are the points on said leads at a distance of 1.5 mm (0.06”) from the seating plane of the transistor package, (see Fig. 2) which points

24、 define the reference plane of the transistor terminals. In special packages not provided with leads (e.g. strip-line or coaxial packages), the transistor terminals must be specifically defined for each particular package. 2. MOUNTS FOR SINGLE-ENDED AXIAL-LEAD TRANSISTORS The transistor mount must s

25、atisfy the following requirements: a- b- C- d- e- f- g- h- i- It shall have two well-shielded terminals, preferably coaxial, to which ports one and two of the transistor-under-test are connected. It shall have two ground connections to which the common terminal and a possible shield of the transisto

26、r package are connected. The magnitude of the transfer susceptance between the two shielded terminals (when no device is inserted in the mount) shall be less than 1) 5%* of the magnitude of the reverse transfer susceptance of the transistor-under-test, or 2)xs than that susceptance corresponding to

27、a capacitance of 0.001 pF,* whichever is greater. The shielded terminals shall be designed to eliminate the high-frequency effects of that part of each lead extending from the transistor terminal defined in 1.3 above to the physical extremity of said lead. This is normally achieved by the use of tub

28、ular inputs in which the transistor leads are inserted. The location of the reference plane of the shielded terminals shall be known within less than ? one thousandth of the wave length* at the test frequency. Repeatable low-resistance electrical contact between the transistor leads and the terminal

29、s of the mount shall be made within 0.5 mm (0.02”)* of the intended contact points. No portion of the mount shall extend beyond the reference plane defined in paragraph (e) above. No insulating materials shall be placed in the air-gap between the seating plane of the transistor package and the refer

30、ence plane of the transistor mount (see Fig. 2). When the transistor mount consists of constant-impedance transmission lines, the VSWR introduced by the transistor mount shall be less than (1.01 + 0.03 fGRa)* with respect to the characteristic impedance of the system to which the transistor mount is

31、 connected. The expression fGRs represents the test frequency in gigahertz. RS-372 PatIs j - When transmission lines are used to make the connection between the transistor and the measuring system, a d-c blocked damping resistor may be connected provided the connection is made within 0.5 mm (0.02”)*

32、 of the reference plane of the shielded terminals if a short circuit is effectively reflected at this terminal. 3. THE MEASURING SYSTEM FOR ADMITTANCE PARAMETERS 3.1 General The measuring system must provide a means for applying bias to the transistor under test. The bias system must be such as not

33、to influence the accuracy of the measurements. The signal applied by the measuring system to the transistor must be sufficiently small to satisfy the “small-signal conditions” defined in 1.2. In addition, any spurious signals which might appear at the transistor terminals, and in particular, the loc

34、al oscillator feedthrough when a superheterodyne receiver is used, must be kept at least 20 dB* below the specified small-signal conditions. Ideally, the measurement of an admittance parameter would require a perfect voltage source at one port and a perfect short circuit at the other. Such requireme

35、nts cannot be simultaneously fulfilled in practice; measurements have to be made with finite source impedances or load admittances, or both. The schematic diagram of Fig. 3 illustrates the general case and the specifications are given below. 3.2 Source impedance and load admittance The effective imp

36、edance of the source and the effective admittance of the load applied at the specified terminals of the transistor-under-test must satisfy the following conditions: /%I YM o.l*, (8) IZSJ IYa) o.J*, (9) lZs/ JYb 1 o.l*, (10) YM/ IYLJ g*, (11) where: ZS = source impedance, YL = load admittance, ya =(y

37、12 Y21)/(Y22+yL), Yb =(Y12Y2l)/(Y11 +Y,), yM = maximum possible value of the magnitude of any of the four admittance parameters. RS.372 Page 5 3.3 Correction formulas For more accurate results, the correction formulas given below and derived in the appendix may be used. Yll =Y;ll +(Ya/Yil +Z,Y;*)l,

38、(12) y22 = yi2l l + (yb/yi2 + ZSYi2)1, (13) Y12=Y;21 +(Yll/yL +zsY22)1, (14) Y2l=Yi11l+(Y22/YL+zsYll)l, (15) where the primed letters represent the measured values of the admittance parameters whereas the unprimed letters represent the true values of the admittance parameters. The values of the sour

39、ce impedance ZS and of the load admittance YL must be known within + lo%.* It is recognized that since Y, and Yb contain the true values, successive approximations may be necessary; however, in most cases the true values may be replaced by the measured values in calculating Ys and Yb. 3.4 Transmissi

40、on lines Transmission lines may be used to make the connection between the transistor mount and the measuring system. These lines may include adjustable-length sections and may also be used for impedance transformations. However, the VSWR created by any residual reflections in the lines must not exc

41、eed (1.025 + 0.005 fCHa)* where fCHr represents the test frequency expressed in gigahertz. Also, the errors in the measured parameters caused by losses in the lines must be less than lo%.* If - these errors exceed l%* appropriate corrections should be made. - APPENDIX 1. Derivation of formulas ( 12)

42、 and (13) Let the source driving the transistor-under-test be characterized bv the voltage vr and by the impedance 2s (see Fig. 3). The value of y; 1 may be expressed by il 1 yi*= = - u (16) vs Zs + l/(Yll -Ys) which, solved for 11, yields 1 - ZSYa + YalYi * Yl=Yii 1 - ZsYi 1 (17) If condition (8) i

43、s taken into consideration, the above equation can be modified to give Yii =Yii 1 + IYJYi 1 + + ZsY i i(l - ZsYa)l However, because of condition (9) the term Zsy, can be neglected, and (18) reduces to (18) Yll =Yyii l +(Ya/Yil +ZsYil)l. Formula (13) may be obtained by a similar derivation. 2. Deriva

44、tion of formulas (14) and (IS) The value of yi 1 is given by Yil = - YLV2/VS, and the ratios Q/V, and VI /vg by (19) (20) v2 y21 _=_ “1 y22 + YL. and “1 1 -= “S 1 + Z,(Yll - ZSYa) Combining (20), (21) and (22) yields (21) (22) Y21 = Yil (1 + Y22/YL) (1 + ZSYI 1 - ZSYEJ (2% US-372 Page 7 Substituting

45、 the values of ys in Eq. (23) and rearranging the terms yields f Y22 Y21 =Yil 1+- +zSYllI+(Y22- YL y12y21),YLl Yl 1 (24) Since the absolute value of the expression YlZY21 (Y22 - - )/YL (25) Yl 1 is less than 2y/IYkl and consequently less than 0.2, it can be neglected with respect to unity in Eq. (24

46、), which after this simplification, reduces to y21 “y;l+(Y22/YL+zsY11)1. Formula (14) may be obtained by a similar derivation. (26) M-372 Pago 8 4 -0 i2 + 1 A: o- t “1 Yll Y12”2 Y21”l y22 : j- “2 Fig. 1 - Admittance parameters of transistor-under-test REFERENCE PLANE TRANSISTOR TERMINALS - Fig. 2 -

47、Transistor Terminals RS-372 Page 9 it i2 - - ZS + TRANSISTOR UNDER I- v2 YL TEST Fig. 3a - Source impedance and load admittance shown for Y11 and Y21 ii i2 - - zs + _I + + TRANSISTOR YL Vl UNDER I- _I v2 vs TEST Fig. 3b - Source impedance and load admittance shown for Y 12 and Y22 RELATED EIA STANDA

48、RDS In addition to this Standard, the following EIA Standards are available on measurements of semiconductor devices in VHF and UHF applications: RS-306 Standards for Measurement of Small Signal HF, VHF and UHF Power Gain Transistors (NEMA Publication No.SK506-1965) . . . . . . . . . . . . . . . . .

49、 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . $ .60 RS-3 11 Measurement of Transistor Noise Figure at HF and VHF (NEMAPublication No. SK 509-1965) . . . . . . . . . . . . . . . . . . . . . . $1.00 RS-371 The Measurement of Small Signal VHF-UHF Transistor Short-Circuit Forward Current Transfer Ratio . . . . . . . . . . . . . . . . . . . . . . . $1.40 Minimum Order $1 .OO For a free and complete list of EIA Standards and Publications write: Engineering Department Electronic Industries Association 2001 Eye Street, N.W. Washington, D.C. 20006