JEDEC JESD50B 01-2008 Special Requirements for Maverick Product Elimination and Outlier Management.pdf

1、JEDEC STANDARD Special Requirements for Maverick Product Elimination and Outlier Management JESD50B.01 (Minor Revision of JESD50B, October 2008) NOVEMBER 2008 (Reaffirmed: JUNE 2012) JEDEC SOLID STATE TECHNOLOGY ASSOCIATION NOTICE JEDEC standards and publications contain material that has been prepa

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3、g interchangeability and improvement of products, and assisting the purchaser in selecting and obtaining with minimum delay the proper product for use by those other than JEDEC members, whether the standard is to be used either domestically or internationally. JEDEC standards and publications are ad

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6、ltimately become an ANSI standard. No claims to be in conformance with this standard may be made unless all requirements stated in the standard are met. Inquiries, comments, and suggestions relative to the content of this JEDEC standard or publication should be addressed to JEDEC at the address belo

7、w, or refer to www.jedec.org under Standards and Documents for alternative contact information. Published by JEDEC Solid State Technology Association 201 3103 North 10th Street Suite 240 South Arlington, VA 22201-2107 This document may be downloaded free of charge; however JEDEC retains the copyrigh

8、t on this material. By downloading this file the individual agrees not to charge for or resell the resulting material. PRICE: Contact JEDEC Printed in the U.S.A. All rights reserved PLEASE! DONT VIOLATE THE LAW! This document is copyrighted by JEDEC and may not be reproduced without permission. For

9、information, contact: JEDEC Solid State Technology Association 3103 North 10th Street Suite 240 South Arlington, VA 22201-2107 or refer to www.jedec.org under Standards-Documents/Copyright Information. JEDEC Standard No. 50B.01 -i- SPECIAL REQUIREMENTS FOR MAVERICK PRODUCT ELIMINATION AND OUTLIER MA

10、NAGEMENT Contents Page Foreword ii Introduction ii 1 Scope 1 2 Terms and definitions 2 3 General requirements 3 3.1 Prerequisites 3 3.2 Documentation 3 3.3 Maverick and Outlier identification and management system 4 3.4 MPE alerts and corrective actions 6 4 Self audit 6 Annex A Guidelines for outlie

11、r identification and removal 7 Annex B Differences between JESD50B.01 and JESD50B 10 JEDEC Standard No. 50B.01 -ii- SPECIAL REQUIREMENTS FOR MAVERICK PRODUCT ELIMINATION AND OUTLIER MANAGEMENT Foreword This standard replaces both JESD50A and JESD62A. Introduction The component quality and reliabilit

12、y performance currently being achieved by the electronic component industry has improved to a level where product anomalies have become a major impact to the end user. These situations have been called “Maverick Product” problems. These problems can occur in any commodity and the different performan

13、ce of Maverick Product can significantly impact the expected performance of the commodity. Causes of Maverick Product can vary across the entire spectrum of processes including, but not limited to, fabrication, assembly, test, packing, and shipping operations. Maverick Product can result in one or m

14、ore populations of material having an actual or potential problem that may go undetected until its use in the final application. The impact of this product on user quality, functionality and field reliability is costly, in terms of replacement costs, loss of business, and user satisfaction. The prim

15、ary consideration is to protect the user from the potential impact of processing variation anomalies. Problem prevention is accomplished by eliminating atypical product and by using failure mechanism-based product monitors, process controls, and user data. Yield improvement programs do not necessari

16、ly provide this protection. Maverick products are often eliminated using statistical quality control techniques including lot acceptance inspections. Due to inadequate, incomplete, or impossible to characterize device performance possibilities, some device characteristics or parameters ma y be incom

17、pletely tested or inspected or not tested or inspected at all; thus, cannot be eliminated by standard statistical quality control based on manufacturer determined data only. Mavericks may occur within either specification or statistical control limits but are not part of the normal distribution that

18、 describes the population or process. Outliers are a subset of mavericks that are within specification but unusual compared to the prevailing distribution. JEDEC Standard No. 50B.01 Page 1 SPECIAL REQUIREMENTS FOR MAVERICK PRODUCT ELIMINATION AND OUTLIER MANAGEMENT (From JEDEC Board Ballot JCB-08-62

19、, formulated under the cognizance of JC-14.3 Committee on Silicon Devices Reliability Qualification and Monitoring) 1 Scope The Maverick Product Elimination (MPE) and Outlier Management Standard was created to identify supplier requirements to improve the delivered quality and reliability of electro

20、nic components, and to develop the programs and discipline required to minimize the probability of the user of electronic components receiving Maverick Product. This standard applies to the identification, control, and disposition of Maverick Product that can occur during fabrication, assembly, test

21、, packing, or shipping of any electronic component. It can be implemented for an entire product line or to segregate product that has a higher probability of adversely impacting quality or reliability. These activities may require special effort and, therefore can only be activated by mutual agreeme

22、nt between the user and the supplier. This system is known as an Outlier (or otherwise Maverick) Identification and Management System (OIMS) Outlier Identification and Management System (OIMS) is to identify process and defect anomalies, improve process controls, and improve end-user quality and rel

23、iability and to identify the root cause of the Outlier product. 2 Terms and definitions lower specification limit (LSL): The lower specification limit as defined in the component specification. maverick product: Product that exhibits significant anomalous characteristics that may cause a higher-than

24、-normal level of failure anywhere in the users application or users manufacturing line. NOTE 1 In this definition, “product” includes the electronic component, the first level packing (e.g., tray, tube, and tape and reel), the shipping container, labeling, and paperwork. NOTE 2 These significant ano

25、malous characteristics can include initial quality defects, time-dependent reliability defects, defects that affect next level of manufacturing, defects in product delivery process (such as labeling or shipping media), and defects in business process (such as shipping information). The characteristi

26、cs may or may not be part of an existing product or process monitor, test, or inspection activity. NOTE 3 Maverick product may come from known noncompliant product, from compliant product that has a significant difference when compared to “typical“ product (but is still within specification limits),

27、 or from “normal“ product due to some previously unknown or unmonitored cause. JEDEC Standard No. 50B.01 Page 2 2 Terms and definitions (contd) noncompliant product: Product that fails to comply with user requirements, manufacturers specifications, or statistical process control levels that the supp

28、lier has deemed critical to reliability. outlier product: Product that meets manufacturer specifications and user requirements but exhibits anomalous characteristics with respect to a normal population (an example of which is depicted by the histogram in the figure), and which may be subject to a hi

29、gher-than-normal level of failures in the users application. LSL USLStatisticalTest LimitsOutliers OutliersFigure 1 Graphical representation of statistical test limits and outliers product traceability: A methodology for tracing products, forward or backward, through the manufacturing flow to isolat

30、e materials that could be similar to product identified as having quality or reliability problems. NOTE 1 For forward traceability, all products associated with a process step must be identifiable. NOTE 2 Backward traceability is the identification of the product at all stages from shipped product t

31、hrough raw material. rework: (1) The repetition of any operation or process step or sequence that creates or changes a portion of the devices structure, assembly, testing, or packing. (2) The intentional execution of operations not normally part of the manufacture of the item. robust mean robust var

32、iance: A mean variance calculated using a robust estimation procedure. robust estimation: A procedure for estimating statistics, e.g., mean and variance, that performs well when there are departures (outliers) from the ideal conditions that have been postulated for the model. NOTE The estimate of th

33、e sample mean and/or variance is often made robust by a rejection-of-outliers procedure or the use of a trimmed mean. upper specification limit (USL): The upper specification limit as defined in the component specification. JEDEC Standard No. 50B.01 Page 3 3 General requirements 3.1 Prerequisites 3.

34、1.1 Statistical process control (SPC) program Each supplier shall define and implement a Statistical Process Control (SPC) system involving all critical process nodes. Other useful references to correlate product characteristics and parameters, where applicable, to process controls include JEP121, J

35、EP132, and JEP131. 3.1.2 Failure mechanism driven reliability monitoring program Each supplier shall have a failure mechanism-driven reliability-monitoring program for design and control of processes and products. (Ref. JESD659 or equivalent.) 3.1.3 Product change notification (PCN) program Each sup

36、plier shall have a PCN (Product Change Notification) Program in place. (Ref. JESD46 or equivalent.) 3.1.4 Outlier Identification and Management System for Electronic Components Each supplier shall have an outlier identification and management system in place for setting yield cut limits. 3.2 Documen

37、tation 3.2.1 MPE documentation requirements Each supplier shall maintain documentation (per ASQC/ANSI-Q90 or ISO9000 Quality Records requirements) supporting the following items to ensure program consistency through time. a) The details of the suppliers implementation of MPE. b) Records of all cases

38、 of suspected Outlier (or otherwise Maverick) Product. The results of investigative activity shall be recorded. Any corrective action taken as a result shall be documented. c) Records of all significantly higher fallout as reported by customers. This fallout could be at board assembly, at system ass

39、embly, or in the field. A summary of the suppliers investigative activity shall be recorded. If the higher fallout was verified to be an MPE incident, then the supplier must document the following: 1) Action taken because of the incident to resolve the users problem. 2) Root cause of the Outlier (or

40、 otherwise Maverick) Product. 3) Corrective action taken by the supplier or user to eliminate recurrence. (Ref. JESD671 or equivalent.) NOTE These records may be shared with the user at the discretion of the supplier. JEDEC Standard No. 50B.01 Page 4 3.2 Documentation (contd) 3.2.2 Record retention

41、All incidences recorded in 3.2.1 b) and 3.2.1 c) shall be retained for a minimum of 2 years. Where practical, retention of these records for five years is recommended. 3.3 Maverick and outlier identification and management system OIMS test limits represent the application of statistical techniques f

42、or the removal of abnormal parts during part level testing (see Figure 2.4.1). A component specification usually defines the requirements needed for the part to work properly in the application. Every part (part as used here refers to a supplier part number) is built with a particular design and pro

43、cess that, if processed correctly, shall yield a certain consistent set of characteristic test results. OIMS uses statistical techniques to establish the limits on these test results. OIMS test limits are set up to remove these outliers (parts whose parameters are statistically different from the ty

44、pical part) and should have minimal yield impact on correctly processed parts from a well-controlled process. The test limits may represent test data having either a symmetrical or skewed distribution. This test methodology is not limited to the standard component specification tests, but may also i

45、nclude extended operating tests (tests beyond the component specification requirements) to improve the ability to detect special abnormal conditions and increase the sensitivity of this testing technique. The only restriction on extended operating tests is that the test shall not reduce the reliabil

46、ity of the parts that pass the test, and test data must be obtained under the same test conditions. The following section establishes the minimum implementation requirements for this standard 3.3.1 Test Limits The supplier shall establish a minimum and maximum acceptable yield at critical process st

47、eps (at least one) by product or product family (Ref. EIA-557 or equivalent). Any product above the maximum acceptable yield must be evaluated to determine whether the product was tested properly. Generally accepted statistical methods shall be used to set minimum and maximum yield limits. NOTE smal

48、l lot sizes may be exempted from the maximum yield calculation. In addition, the supplier shall establish outlier limits for important characteristics with the greatest probability of affecting quality and reliability. Where applicable, the supplier shall establish minimum and maximum criteria for a

49、cceptable sampling results (Ref. EIA-554 or equivalent). The supplier shall establish and use a statistical method for identifying and removing parts with electrically abnormal characteristics (outliers), with defined outlier electrical test limits. A guideline of how to apply outlier identification and removal can be found in Annex B. Test limits may be either static or dynamic. Static limits are established then used without modification for some period of time. Dynamic limits start with static limits but establish new test limits on a