JEDEC JESD51-1995 Methodology for the Thermal Measurement of Component Packages (Single Semiconductor Device)《元件套件的热测方法(单半导体器件)》.pdf

1、 EIA JESDSL 95 3234600 0567393 620 EINJEDEC STANDARD Methodology for the Thermal Measurement of Component Packages (Single Semiconductor Device) EINJESDSl DECEMBER 1995 ELECTRONIC INDUSTRIES ASSOCIATION ENGINEERING DEPARTMENT EIA JESDSL 95 I 3234600 0567394 567 I NOTICE EWJEDEC Standards and Publica

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8、ASSOCIATION 1995 Engineering Department 2500 Wilson Boulevard Arlington, VA 2220 1 “Copyright“ does not apply to JEDEC member companies as they are fiee to duplicate this document in accordance with the latest revision of the JEDEC Publication 2 1 “Manual of Organization and Procedure“. PRICE: Pleas

9、e refer to the current Catalog of EU, JEDEC, and TIA STANDARDS and ENGINEERING PUBLICATIONS or call Global Engineering Documents, USA and Canada (1-800-854-7179) International (303-397-7956) Printed in U.S.A. All rights reserved EIA JESDSL 95 3234600 0567395 4T3 = PLEASE! DONT VIOLATE THE LAW! This

10、document is copyrighted by the EIA and may not be reproduced without permission. Organizations may obtain permission to reproduce a limited number of copies through entering into a license agreement. For information, contact: Global Engineering Documents 15 Inverness Way East Englewood, CO 801 12-57

11、04 or call U.S.A. and Canada 1-800-854-71 79, International (303) 397-7956 EIA JESDSL 95 m 3234600 05b7Lb 33T W EINJEDEC Standard No. 5 1 METHODOLOGY FOR TEIE THERMAL MEASUREMENT OF COMPONENT PACKAGES (SINGLE SEMICONDUCTOR DEVICE) (From JEDEC Council Ballot JCB-95-28, formulated under the cognizance

12、 of JC-15 Committee on Electrical and Thermal Characterization Techniques for Electronic Packages and Interconnects.) 1. INTRODUCTION Page 1 2. SCOPE 1 3. RATIONALE 2 4. PURPOSE 5. DATA PRESENTATION 2 2 EIA JESDSL 95 = 3234600 0567397 276 H m THERMAL THERMAL COMPONENT MEASUREMENT ENVIRONMENT MOUNTIN

13、G 1. 2. DEVICE CONSTRUCTION EINJEDEC Standard No. 5 1 Page 1 Electrical Natural Minimum Conduction Test Method Convection Thermal Test Board infrared Forced High Conduction Test Method Convection Thermal Test Board METHODOLOGY FOR TEE THERMAL MEASUREMENT OF COMPONENT PACKAGES (SINGLE SEMICONDUCTOR D

14、EVICE) Resistive Heating Thermal Test Die Active Device Thermal Test Die INTRODUCTION This document provides an overview of the methodology necessary for making meaningful thermal measurements on packages containing single chip semiconductor devices. The actual methodology components are contained i

15、n separate detailed documents. SCOPE The measurement methodology described herein is distributed among several documents so that the appropriate combination of documents can be selected to meet specific thermal measurement requirements. This document provides the OVERVIEW; the rest of the documents

16、are grouped as shown below: OVERVIEW t- Each group will have one or more applicable documents to reflect different thermal measurement requirements. Because environmental conditions, component mounting approaches and device construction techniques and processes will change as technology changes, add

17、itional documents will be added to these groups as the needs arise and standards established. As appropriate, each of these documents will contain terminology and symbolic definitions specific to the material covered by the individual document. EIA JESDSL 95 3234600 05b7L98 LO2 EINJEDEC Standard No.

18、 5 1 Page 2 METHODOLOGY FOR THE THERMAL MEASUREMENT OF COMPONENT PACKAGES (SINGLE SEMICONDUCTOR DEVICE) 3. RATIONALE The junction temperature of a semiconductor device greatly influences the performance, reliability, quality and cost of the device. This document, and the subsequent documents it call

19、s on, provides a standard for thermal measurements that, if followed fully, will provide correct and meaningful data that will allow for determination of junction temperature for specific conditions, e.g., device environment, mounting and construction. The data can be used for package design evaluat

20、ion, device (i.e., chip/package combination) characterization, reliability predictions, etc. 4. PURPOSE Two key thermal parameters for any semiconductor device are junction temperature (Tj) and thermal resistance (ReJx or Im). The former is the prime parameter while the latter is a vehicle for deter

21、mining the former. Since Tj usually can not be measured directly, the following approach is used: TJ = TJO_+ ATJ where T, is the junction temperature before application of power OC ATj is the change in junction temperature due to applied power “CI Under carefully defined conditions for a specific en

22、vironment, the change in junction temperature can be determined as follows: where P, is power dissipated in the device (also referred to as heating power) Wl Rem is the thermal resistance from the device junction to the specific environment (alternative symbol is e,) “C/W The thermal resistance term

23、 (ReJX or em) is highly dependent on the environment surrounding the device. The two most common environments, still-air and infinite heat sink., usually define the practical limits of thermal resistance, but do not represent typical integrated circuit environments. The Environmental and Component M

24、ounting documents that accompany this document provide alternatives that approach those found in actual semiconductor applications. 5. DATA PRESENTATION Theml data are not meaningful unless all the pertinent test condition information is provided with the actual thermal data. Because the test condit

25、ions and data will vary with the type of thermal test being performed, the documents for each of the measurement areas listed below in table 1 state the thermal information necessary for a complete description of the data. EIA JESD5L 95 3234600 05b7199 049 m Thermal Measurement Environmental EINJEDE

26、C Standard No. 5 1 Page 3 Refer to appropriate document I Refer to appropriate document Refer to auurouriate document I Refer to auurouriate document METHODOLOGY FOR THE THERMAL MEASUREMENT OF COMPONENT PACKAGES (SINGLE SEMICONDUCTOR DEVICE) Component Mounting Device Construction Table 1. Thermal me

27、asurement test condition and data uarameter summary Refer to appropriate document Refer to appropriate document Refer to appropriate document Refer to appropriate document Environmental conditions, component mounting approaches and device construction techniques and processes will change as technology and applications change, thus necessitating continual additions to each of the measurement area groups listed in table 1.