JEDEC JESD94B-2015 Application Specific Qualification Using Knowledge Based Test Methodology.pdf

1、JEDEC STANDARD Application Specific Qualification Using Knowledge Based Test Methodology JESD94B (Revision of JESD94A, July 2008, Reaffirmed September 2011) OCTOBER 2015 JEDEC SOLID STATE TECHNOLOGY ASSOCIATION NOTICE JEDEC standards and publications contain material that has been prepared, reviewed

2、, and approved through the JEDEC Board of Directors level and subsequently reviewed and approved by the JEDEC legal counsel. JEDEC standards and publications are designed to serve the public interest through eliminating misunderstandings between manufacturers and purchasers, facilitating interchange

3、ability and improvement of products, and assisting the purchaser in selecting and obtaining with minimum delay the proper product for use by those other than JEDEC members, whether the standard is to be used either domestically or internationally. JEDEC standards and publications are adopted without

4、 regard to whether or not their adoption may involve patents or articles, materials, or processes. By such action JEDEC does not assume any liability to any patent owner, nor does it assume any obligation whatever to parties adopting the JEDEC standards or publications. The information included in J

5、EDEC standards and publications represents a sound approach to product specification and application, principally from the solid state device manufacturer viewpoint. Within the JEDEC organization there are procedures whereby a JEDEC standard or publication may be further processed and ultimately bec

6、ome an ANSI standard. No claims to be in conformance with this standard may be made unless all requirements stated in the standard are met. Inquiries, comments, and suggestions relative to the content of this JEDEC standard or publication should be addressed to JEDEC at the address below, or refer t

7、o www.jedec.org under Standards and Documents for alternative contact information. Published by JEDEC Solid State Technology Association 2015 3103 North 10th Street Suite 240 South Arlington, VA 22201-2107 This document may be downloaded free of charge; however JEDEC retains the copyright on this ma

8、terial. By downloading this file the individual agrees not to charge for or resell the resulting material. PRICE: Contact JEDEC Printed in the U.S.A. All rights reserved PLEASE! DONT VIOLATE THE LAW! This document is copyrighted by JEDEC and may not be reproduced without permission. For information,

9、 contact: JEDEC Solid State Technology Association 3103 North 10th Street Suite 240 South Arlington, VA 22201-2107 or refer to www.jedec.org under Standards-Documents/Copyright Information. JEDEC Standard No. 94B -i- APPLICATION SPECIFIC QUALIFICATION USING KNOWLEDGE BASED TEST METHODOLOGY Contents

10、Page Introduction ii 1 Scope 1 2 Terms and definitions 1 3 References 4 4 Knowledge Based Test Method Flow 5 5 Determining application specific test requirements 6 6 Identification of potential failure mechanisms and corresponding failure modes 7 7 Selection and application of reliability models 8 8

11、 Qualification strategy: selection of stress test and test hardware 8 9 Application of stress test conditions and durations 9 10 Establish product performance 11 11 Applying application specific test methodology 12 Annex A (informative) Application Specific Methodology Deterministic illustration 13

12、Annex B (informative) Product Design with Stochastic Use Condition Analysis 20 Annex C (informative) Bibliography 38 Annex C (informative) Differences between JESD94B and JESD94A 39 JEDEC Standard No. 94B -ii- APPLICATION SPECIFIC QUALIFICATION USING KNOWLEDGE BASED TEST METHODOLOGY Introduction The

13、 solid state device industry manufactures devices that are used in a wide range of applications. Consequently, the accelerated stress portion of the qualification regime used to assess the reliability performance of these devices should be customized to reconcile their design and functionality to th

14、e range of end use applications, based upon knowledge of the customers end use application conditions, expected use environment, life time requirements, potential failure mechanisms, and associated failure models. The practice of using prescribed reliability stress test conditions, durations, sample

15、 sizes, and acceptance criteria may be inappropriate, especially with the ever-evolving applications and material sets found in the solid state device industry. The historically prescribed stress tests may either produce false failures or not accelerate valid failure mechanisms because the stress co

16、nditions do not correlate appropriately to the actual use environment. JEDEC Standard No. 94B Page 1 APPLICATION SPECIFIC QUALIFICATION USING KNOWLEDGE BASED TEST METHODOLOGY (From JEDEC Board Ballot JCB-15-34, formulated under the cognizance of the JC-14.3 Subcommittee on Silicon Devices Reliabilit

17、y Qualification and Monitoring.) 1 Scope The method described in this document applies to all application specific reliability testing for solid state device with known failure mechanisms where the test duration and conditions vary based on application variables. This document does not cover reliabi

18、lity tests that are characterization based or essentially go/no-go type tests, for example, ESD, latch-up, or electrical over stress. Also, it does not attempt to cover every failure mechanism or test environment, but does provide a methodology that can be extended to other failure mechanisms and te

19、st environments. The purpose of this document is to provide a method for developing an application specific reliability evaluation methodology based on the use conditions the solid state device is expected to experience in the field. It assumes that the failure mechanisms and models, relevant to the

20、 product being tested, are a known entity. 2 Terms and definitions acceleration factor (A, AF): For a given failure mechanism, the ratio of the time it takes for a certain fraction of the population to fail, following application of one stress or use condition, to the corresponding time at a more se

21、vere stress or use condition. NOTE 1 Times are generally derived from modeled time-to-failure distributions (lognormal, Weibull, exponential, etc.). NOTE 2 Acceleration factors can be calculated for temperature, electrical, mechanical, environmental, or other stresses that can affect the reliability

22、 of a device. NOTE 3 Acceleration factors are a function of one or more of the basic stresses that can cause one or more failure mechanisms. For example, a plot of the natural log of the time-to-failure for a cumulative constant percentage failed (e.g., 50%) at multiple stress temperatures as a func

23、tion of 1/kT, the reciprocal of the product of Boltzmanns constant in electronvolts per kelvin and the absolute temperature in kelvin, is linear if one and only one failure mechanism is involved. The best-fit linear slope is equal to the apparent activation energy in electronvolts. NOTE 4 The abbrev

24、iation AF is often used instead of the symbol A. JEDEC Standard No. 94B Page 2 2 Terms and definitions (contd) environmental relative humidity: The relative humidity in the area immediately surrounding a specified component in an application. environmental temperature cycle: A temperature cycle in a

25、n application resulting from environmental temperature changes. environmental temperature range: The temperature range found in the area or enclosure surrounding an application. field lifetime: (1) The anticipated time a product will last in the field determined solely by its ability to function. (2

26、) The anticipated time a product will be in use in the field determined by need rather than by its ability to function. minicycle: A temperature cycle in an application resulting from a small degree of change in the operational temperatures (e.g., due to PC program variations, a typical minicycle ma

27、y have up to 5 C change). nonoperating lifetime: The length of time that a component is not operating in an application. NOTE The nonoperating lifetime may be calculated by subtracting the power-on-hours (POH) from the field lifetime. operating lifetime: The length of time that a component is expect

28、ed to function in an application at or below the predicted failure rate, stated in power-on-hours (POH). operating temperature cycle range: The temperature range of a component caused by power cycling. power cycle: A temperature cycle in an application resulting from cycling power on and off. NOTE F

29、or applications with transient states such as mini-cycle, hibernation, standby, or systems with redundant or cyclic states, power on and off phases may require additional delineation for requirements computation. shipping environment: The effects to which a component may be exposed while being shipp

30、ed. Potential effects include temperature, relative humidity, and radiation. shock and vibration condition: The shock and vibration experienced by an application in manufacturing, shipment, operation, and user handling (user transportation and/or regular operation). JEDEC Standard No. 94B Page 3 2 T

31、erms and definitions (contd) storage environment: The effects to which a component may be exposed while being stored in a nonoperating state. Potential effects include temperature, relative humidity, and radiation. storage lifetime: The length of time that a component is in storage prior to usage in

32、 an application. use conditions: The various stages to which a component may be exposed starting from manufacturing and processing through shipping, storage, and useful life. NOTE 1 The useful life normally consists of the operating, nonoperating, and storage lifetimes. NOTE 2 Depending on the appli

33、cation and product usage, some of these stages may be more dominant and require additional consideration for requirements estimation. Figure 1 Illustration of typical use conditions End-user Environment Component Assembly Test Shipping Storage Product appropriate reliability models and acceleration

34、factors (JEP122 and JESD91 respectively or similar documents) shall be implemented or new ones may need to be developed; and lastly a qualification strategy shall be established. Finally, device performance from the application of stress tests (JESD22-Axxx and JESD22-Bxxx) would be reported. These s

35、teps are outlined in clause 5 thru clause 11. Figure 2 Basic step by step flow of the knowledge based test method Customers Market Component / device 1 2 3 4 5 6 Execute Report 7 Environment (T, RH, ) System hence it is recommended that appropriate evaluation is conducted to determine applicability

36、of those parameters. Equation 1 is historical Norris-Landzberg modification of the Coffin-Manson equation 12: =stressfieldamstressfieldnfieldstressfieldstressTTkEffTTNNAFmax,max,11exp(A.1) Constants appropriate to eutectic (SnPb) solder joint reliability are listed below 12: n = 1.9 m = 1/3 Ea/k = 1

37、414 Since k (Boltzmanns constant) 8.617e-5 eV/K, Ea 0.122eV Shown below are computations using the Norris-Landzberg equation with the Telecom Hand-Held application conditions found in Table A.1. The computations for three different thermal cycling conditions are given in Table A.2, along with the to

38、tal number of cycles and acceleration factors. JEDEC Standard No. 94B Page 16 Annex A Application specific methodology (contd) A.2 Accelerated thermal cycle comparison (contd) Table A.2 Temperature cycling acceleration factors and test cycles for Telecom Hand-Held Acceleration Factor (AF) / Applicat

39、ion Test Cycles Temperature Cycling Test Conditions JESD22-A104 Condition B (-55 C 125 C) Condition G (-40 C 125 C) Condition J (0 C 100 C) T stress(125 C (-55 C) = 180 C (125 C (-40 C) = 165 C (100 C 0 C) = 100 C T max-stress125C 125 C 100 C Tfield talk(55 C 32 C) = 23 C Tfield standby(32 C 30 C) =

40、 2 C field6 stress48 Telecom Hand Held Acceleration Factor (AF) Talk: AF 53 / 412 cycles Standby: AF 7630 / 1 cycle Talk: AF 45 / 486 cycles Standby: AF 6467 / 1 cycle Talk: AF 14 / 1595 cycles Standby: AF 1968 / 1 cycle Total Number of Cycles Needed 413 Cycles 487 Cycles 1596 Cycles JEDEC Standard

41、No. 94B Page 17 Annex A Application specific methodology (contd) A.3 Accelerated temperature, humidity and bias example This example will illustrate the methodology for calculating the acceleration factors and stress duration for Temperature Humidity and Bias Stress. The HAST stress per JESD22-A110-

42、B, will be employed to demonstrate the methodology for the Aluminum corrosion failure mechanism for the Telecom Hand-Held application conditions listed in Table A.1. The Peck power law model is used for the Aluminum corrosion failure mechanism (ref. JEP122A): kTENoaeVfRHATF =)(A.2) where: Ao= scale

43、factor RH = RHdiesurface= Relative Humidity (%) at die surface N = 2.7 3.0 Ea = 0.7 1.0 eV f(V) = function of applied voltage The Relative Humidity at the die surface (RHdiesurface) in equilibrium is calculated using the following relationships, from C.G. Shirley, The Reliability Models and Life Pre

44、diction for Intermittently-Powered Non-Hermetic Components, Proceedings of IRPS-1994, pg. 72. )(32)(TdTcTbasateTP+=(A.3) where: Psat is in KiloPascals a = 16.0332248 b = -3515.13806 c = -290850.583 d = 5097236.05 T = Temperature in K NOTE Psatcan be obtained also from a standard reference table. and

45、 )()(diesurfaceTsatambTsatambdiesurfacePPRHRH =(A.4) JEDEC Standard No. 94B Page 18 Annex A Application specific methodology (contd) A.3 Accelerated temperature, humidity and bias example (contd) For the Telecom Hand Held application, the rise in the I.C. junction temperature, Tj, is calculated for

46、the various operating conditions: Tj (C) = Power Dissipation x Package Thermal Impedance = PD x ja (A.5) For this example, it is assumed that Tambient,application = 30oC and RHapplication = 70%. The Psat(Tamb) and Psat(Tdiesurface) are calculated using equation (2).RHdiesurfaceis calculated using eq

47、uation (A.4). The results of these calculations are shown in Table A.3. Table A.3 Calculations results for operating modes and conditions Operating Mode Talk Standby Shutdown Tamb (oC) 30 30 30 Tj(C) 25 2 0 Tdiesurface (oC) 55 32 30 Psat(Tamb)4.3 4.3 4.3 Psat(Tdiesurface)15.8 4.8 4.3 RHamb(%) 70 70

48、70 RHdiesurface(%) 18.9 62.5 70 The HAST stress environmental condition is 130 oC/85% RH. The power dissipation of the product during HAST stress is minimized so that the RHdiesurface RHHAST ambient. In addition, f(V) is assumed to be 1 since the same bias conditions used in the application are appl

49、ied to the product in the HAST stress. The acceleration factor for HAST stress can be calculated by equation (1). Two different sets of values for N and Ea are used in the example for comparative purposes. The moisture saturation time for the package is assumed to be 24 hours for HAST. The saturation time for application ambient is neglected. The equivalent stress time for each mode is calculated by: AFLifeinTimeTotalttHASTsatHAST_,+=(A.6) where: To