1、ANSI INCITS 367-2003for Information Technology SCSI Parallel Interface-5 (SPI-5)ANSIINCITS 367-2003ANSIINCITS 367-2003American National Standardfor Information Technology SCSI Parallel Interface-5 (SPI-5)SecretariatInformation Technology Industry Council (ITI)Approved June 5, 2003American National S
2、tandards Institute, Inc.AbstractThis standard defines the electrical measurement techniques and acceptable performance limits for vari-ous test parameters on the collection of wires, connectors, and circuits that form the electrical path be-tween SCSI devices. This document specifies the details of
3、the measurement methodology to minimizethe error in results from different electrical testing laboratories. Details are given at each stage of testingincluding calibration, fixturing and sample preparation.Approval of an American National Standard requires review by ANSI that therequirements for due
4、 process, consensus, and other criteria for approval havebeen met by the standards developer.Consensus is established when, in the judgement of the ANSI Board ofStandards Review, substantial agreement has been reached by directly andmaterially affected interests. Substantial agreement means much mor
5、e thana simple majority, but not necessarily unanimity. Consensus requires that allviews and objections be considered, and that a concerted effort be madetowards their resolution.The use of American National Standards is completely voluntary; theirexistence does not in any respect preclude anyone, w
6、hether he has approvedthe standards or not, from manufacturing, marketing, purchasing, or usingproducts, processes, or procedures not conforming to the standards.The American National Standards Institute does not develop standards andwill in no circumstances give an interpretation of any American Na
7、tionalStandard. Moreover, no person shall have the right or authority to issue aninterpretation of an American National Standard in the name of the AmericanNational Standards Institute. Requests for interpretations should beaddressed to the secretariat or sponsor whose name appears on the titlepage
8、of this standard.CAUTION NOTICE: This American National Standard may be revised orwithdrawn at any time. The procedures of the American National StandardsInstitute require that action be taken periodically to reaffirm, revise, orwithdraw this standard. Purchasers of American National Standards mayre
9、ceive current information on all standards by calling or writing the AmericanNational Standards Institute.American National StandardPublished byAmerican National Standards Institute, Inc.25 West 43rd Street, New York, NY 10036Copyright 2003 by Information Technology Industry Council (ITI)All rights
10、reserved.No part of this publication may be reproduced in anyform, in an electronic retrieval system or otherwise,without prior written permission of ITI, 1250 Eye Street NW, Washington, DC 20005. Printed in the United States of AmericaCAUTION: The developers of this standard have requested that hol
11、ders of patents that may berequired for the implementation of the standard disclose such patents to the publisher. However,neither the developers nor the publisher have undertaken a patent search in order to identifywhich, if any, patents may apply to this standard. As of the date of publication of
12、this standardand following calls for the identification of patents that may be required for the implementation ofthe standard, no such claims have been made. No further patent search is conducted by the de-veloper or publisher in respect to any standard it processes. No representation is made or imp
13、liedthat licenses are not required to avoid infringement in the use of this standard.iContentsPageForeword . xxiIntroduction xxiii1 Scope .12 Normative references .32.1 Normative references 32.2 Approved references .32.3 References under development 42.4 Other references .43 Definitions, symbols, ab
14、breviations, and conventions 43.1 Definitions .43.2 Symbols and abbreviations .113.3 Keywords 113.4 Conventions 123.5 Notation for Procedures and Functions .134 General .144.1 General overview 144.2 Cables, connectors, signals, transceivers .144.3 Physical architecture of bus segment .144.4 Driver-r
15、eceiver connections 154.5 Physical topology details and definitions .154.6 Bus segment loading .174.7 Termination requirements .184.8 SCSI device Addressing .184.9 Clocking methods for data transfers .184.10 Paced transfer on a SCSI bus .214.11 Data transfers 234.11.1 Data transfer modes .234.11.1.1
16、 Asynchronous transfers 234.11.1.2 Synchronous transfers 234.11.1.3 Paced transfers .234.11.2 ST DATA phase parallel transfers 234.11.3 DT DATA phase parallel transfers .244.11.3.1 DT DATA phase parallel transfers format .244.11.3.2 Data group transfers .244.11.3.3 Information unit transfers 244.12
17、Negotiation 254.12.1 Negotiation introduction .254.12.2 Negotiation algorithm .254.12.3 When to negotiate 264.12.4 Negotiable fields .274.12.4.1 Negotiable fields introduction 274.12.4.2 Transfer agreements .284.12.4.3 Transfer period factor 294.12.4.4 REQ/ACK offset 314.12.4.5 Transfer width expone
18、nt 324.12.4.6 Protocol options 324.12.4.6.1 Protocol options introduction 324.12.4.6.2 IU_REQ 334.12.4.6.3 DT_REQ .344.12.4.6.4 QAS_REQ 344.12.4.6.5 HOLD_MCS .34ii4.12.4.6.6 WR_FLOW .354.12.4.6.7 RD_STRM 354.12.4.6.8 RTI .354.12.4.6.9 PCOMP_EN .354.12.5 Negotiable field combinations 364.12.6 Message
19、 restrictions 384.12.7 Negotiation message sequences .384.12.7.1 Negotiation message sequences overview .384.12.7.2 SCSI initiator port originated PPR negotiation 394.12.7.3 SCSI initiator port originated WDTR negotiation .414.12.7.4 SCSI initiator port originated SDTR negotiation 434.12.7.5 SCSI ta
20、rget port originated WDTR negotiation .454.12.7.6 SCSI target port originated SDTR negotiation 474.13 Protocol .495 SCSI parallel interface connectors .525.1 SCSI parallel interface connectors overview .525.2 Nonshielded connector .525.2.1 Nonshielded connector alternative 1 - A cable .525.2.2 Nonsh
21、ielded connector alternative 2 - A cable .525.2.3 Nonshielded connector alternative 3 - P cable .535.2.4 Nonshielded connector alternative 4 535.3 Shielded connector .595.3.1 Shielded connector overview .595.3.2 Shielded connector alternative 1 - A cable .595.3.3 Shielded connector alternative 2 - A
22、 cable .595.3.4 Shielded connector alternative 3 - P cable .595.3.5 Shielded connector alternative 4 - P cable .595.4 Connector contact assignments 675.4.1 Connector contact assignments overview 675.4.2 Differential connector contact assignments .686 SCSI bus segment interconnect .716.1 SCSI bus seg
23、ment interconnect overview 716.2 SCSI bus segment cables .716.3 Interconnect characteristics for signals .726.3.1 SCSI bulk cable 726.3.2 Minimum conductor size for signals .736.3.3 Local transmission line impedance 736.3.4 Extended distance transmission line impedance .736.3.5 Capacitance .736.3.6
24、Differential propagation time and propagation time skew 736.3.7 Differential attenuation .736.3.8 Crosstalk 746.4 Decoupling characteristics for TERMPWR lines .746.5 Connection requirements for RESERVED lines 756.6 Cables used with LVD transceivers 756.7 LVD stub length and spacing 767 SCSI parallel
25、 interface electrical characteristics .777.1 SCSI parallel interface electrical characteristics overview 777.2 LVD termination .777.2.1 LVD termination overview 777.2.2 LVD driver characteristics 827.2.3 LVD receiver characteristics 857.2.4 LVD capacitive loads 867.2.4.1 Management of LVD release gl
26、itches .88iii7.2.5 SE/HVD transmission mode detection .907.2.5.1 SE/HVD transmission mode detection overview .907.2.5.2 LVD DIFFSENS driver 907.2.5.3 LVD DIFFSENS receiver .917.3 Terminator power 938 SCSI bus signals 958.1 SCSI bus signals overview 958.2 Signal descriptions 958.3 LVD Signal states 9
27、88.4 OR-tied signals 998.5 Signal sources .999 SCSI parallel bus timing .1019.1 SCSI parallel bus timing values 1019.2 Timing description .1079.2.1 Arbitration delay .1079.2.2 ATN transmit setup time .1089.2.3 ATN receive setup time 1089.2.4 Bus clear delay .1089.2.5 Bus free delay 1089.2.6 Bus set
28、delay 1089.2.7 Bus settle delay 1099.2.8 Cable skew .1099.2.9 Chip noise in receiver .1099.2.10 Clock jitter 1099.2.11 Crosstalk time shift .1099.2.12 Flow control receive hold time 1099.2.13 Flow control receive setup time 1099.2.14 Flow control transmit hold time 1099.2.15 Flow control transmit se
29、tup time 1099.2.16 Offset induced time asymmetry 1109.2.17 pCRC receive hold time .1109.2.18 pCRC receive setup time .1109.2.19 pCRC transmit hold time 1109.2.20 pCRC transmit setup time 1109.2.21 Data release delay .1109.2.22 DIFFSENS voltage filter time .1109.2.23 Physical disconnection delay .110
30、9.2.24 Power on to selection .1109.2.25 QAS arbitration delay .1119.2.26 QAS assertion delay 1119.2.27 QAS release delay .1119.2.28 QAS non-DATA phase REQ(ACK) period .1119.2.29 Receive assertion period 1119.2.30 Receive hold time .1119.2.31 Receive internal hold time 1119.2.32 Receive internal setu
31、p time 1119.2.33 Receive negation period 1129.2.34 Receive setup time . 1129.2.35 Receive REQ(ACK) period tolerance .1129.2.36 Receive REQ assertion period with P_CRCA transitioning .1129.2.37 Receive REQ negation period with P_CRCA transitioning 1129.2.38 Receive Skew Compensation 1129.2.39 Receive
32、r amplitude time skew .1129.2.40 Receiver de-skewed data valid window .1129.2.41 REQ(ACK) period .113iv9.2.42 Reset delay 1139.2.43 Reset hold time 1139.2.44 Reset to selection .1139.2.45 Residual skew error .1149.2.46 Selection abort time .1149.2.47 Selection time-out delay .1149.2.48 Signal timing
33、 skew .1149.2.49 Skew correction range .1149.2.50 Strobe offset tolerance .1159.2.51 System deskew delay 1159.2.52 System noise at launch 1159.2.53 System noise at receiver 1159.2.54 Time asymmetry .1159.2.55 Transmit assertion period .1159.2.56 Transmit hold time 1169.2.57 Transmit ISI Compensation
34、 1169.2.58 Transmit negation period .1169.2.59 Transmit setup time 1169.2.60 Transmit REQ(ACK) period tolerance 1169.2.61 Transmit REQ assertion period with P_CRCA transitioning 1169.2.62 Transmit REQ negation period with P_CRCA transitioning .1169.2.63 Transmitter skew 1169.2.64 Transmitter time as
35、ymmetry .1179.3 Measurement points 1179.3.1 Measurement points overview .1179.3.2 LVD measurement points .1189.4 Receiver Masks .1209.4.1 Synchronous transfers and for fast-160 paced transfer clocking signals .1209.4.2 Paced transfers with precompensation enabled on fast-160 .1219.4.3 Paced transfer
36、s with precompensation disabled on fast-160 and fast-320 1239.5 Timing parameters 1299.6 Setup and hold timings 1299.6.1 ST data transfer calculations 1299.6.2 DT data transfer calculations .13010 SCSI bus phases 13210.1 SCSI bus phases overview .13210.2 BUS FREE phase .13210.3 Expected and unexpect
37、ed bus free phases 13210.4 Arbitration 13310.4.1 Arbitration and QAS overview 13310.4.2 NORMAL ARBITRATION phase 13310.4.3 QAS protocol 13410.4.4 QAS phase .13510.5 SELECTION phase .13610.5.1 Selection Overview 13610.5.2 Selection using attention condition .13710.5.2.1 Starting the SELECTION phase w
38、hen using attention condition 13710.5.2.2 Information unit transfers disabled 13710.5.2.3 Information unit transfers enabled .13710.5.2.4 Selection using attention condition time-out procedure 13710.5.3 Selection without using attention condition 13810.5.3.1 Information unit transfers disabled or en
39、abled 13810.5.3.2 Selection without using attention condition time-out procedure 13810.6 RESELECTION phase 13910.6.1 RESELECTION phase overview 13910.6.2 Physical reconnection 139v10.6.3 Physical reconnection time-out procedure .14010.7 Information transfer phases 14010.7.1 Information transfer phas
40、es overview 14010.7.2 Asynchronous transfer .14110.7.3 Synchronous transfer .14210.7.3.1 Synchronous transfer overview .14210.7.3.2 ST synchronous transfer .14210.7.3.3 DT synchronous transfer .14310.7.3.3.1 DT synchronous transfer overview .14310.7.3.3.2 Information unit transfer .14310.7.3.3.3 DT
41、DATA IN phase information unit transfer exception condition handling .14410.7.3.3.4 DT DATA OUT phase information unit transfer exception condition handling 14510.7.3.3.5 Data group data field transfer .14610.7.3.3.6 Data Group Pad field and pCRC field transfer to SCSI initiator port 14610.7.3.3.7 D
42、ata Group Pad field and pCRC field transfer to SCSI target port 14810.7.4 Paced transfer 14910.7.4.1 Paced transfer overview 14910.7.4.2 Paced transfer training pattern 15010.7.4.2.1 Training pattern overview .15010.7.4.2.2 DT DATA IN phase training pattern .15110.7.4.2.3 DT DATA OUT phase training
43、pattern .15210.7.4.3 P1 data valid/invalid state transitions 15310.7.4.3.1 P1 data valid/invalid state transitions overview 15310.7.4.3.2 Starting pacing transfers at end of training pattern 15410.7.4.3.3 Starting pacing transfers with no training pattern .15410.7.4.3.4 Ending pacing transfers .1551
44、0.7.4.4 Paced information unit transfer .15510.7.4.5 Deskewing .15610.7.5 Wide transfer 15610.8 COMMAND phase 15710.8.1 COMMAND phase description .15710.8.2 COMMAND phase exception condition handling .15710.9 DATA phase 15810.9.1 DATA phase overview 15810.9.2 DT DATA IN phase .15810.9.3 DT DATA OUT
45、phase .15810.9.4 ST DATA IN phase .15810.9.5 ST DATA OUT phase .15810.10 STATUS phase .15810.10.1 STATUS phase description 15810.10.2 STATUS phase exception condition handling 15910.11 MESSAGE phase 15910.11.1 MESSAGE phase overview .15910.11.2 MESSAGE IN phase 15910.11.3 MESSAGE IN phase exception
46、condition handling 15910.11.4 MESSAGE OUT phase 15910.11.5 MESSAGE OUT phase exception condition handling 16010.12 Signal restrictions between phases .16011 DATA BUS protection .16211.1 DATA BUS protection overview 16211.2 ST DATA BUS protection using parity 16211.3 DT DATA BUS protection using CRC
47、.16211.3.1 DT DATA BUS protection using CRC overview .16211.3.2 Error detection capabilities .16211.3.3 Order of bytes in the CRC field 16311.3.4 CRC generation and checking .165vi11.3.5 Test cases 16512 SCSI bus conditions .16612.1 SCSI bus conditions overview .16612.2 Attention condition .16612.3
48、Bus reset condition 16712.4 Hard reset .16712.5 Reset events .16812.5.1 Reset events overview .16812.5.2 Bus reset event 16812.5.3 Power on reset event .16812.5.4 Target reset event 16813 SCSI bus phase sequences .16913.1 SCSI bus phase sequences overview .16913.2 Phase sequences with information un
49、its disabled 17013.2.1 Phase sequences for physical reconnection or selection using attention condition .17013.2.2 Phase sequences for selection without using attention condition 17113.3 Phase sequences with information unit enabled .17213.3.1 Phase sequences for physical reconnection or selection without using attention condition 17213.3.2 Phase sequences for selection using attention condition 17314 SPI information units 17414.1 SPI information unit overview 17414.2 Information unit transfer logical operations .17414.3 SPI information units .18014.3.1 SPI command information unit .18014
