1、 TIA-5041 May 2016Future Advanced SATCOM Technologies (FAST) Open Standard Digital- If Interface (OSDI) for SATCOM Systems ANSI/TIA-5041-2016 APPROVED: APRIL 20, 2016 NOTICE TIA Engineering Standards and Publications are designed to serve the public interest through eliminating misunderstandings bet
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19、ATION OF DAMAGES IS A FUNDAMENTAL ELEMENT OF THE USE OF THE CONTENTS HEREOF, AND THESE CONTENTS WOULD NOT BE PUBLISHED BY TIA WITHOUT SUCH LIMITATIONS. ANSI/TIA-5041 iii Acknowlegements The development of this specification required the hard work, and dedication of all the participants directly invo
20、lved, at the time of the final ballot. However the following individuals, some not active at the time of final ballot, have made substantial contributions. Their contributions are unmeasurable, from fueling motivation through their vision, to supporting the research and development, and providing th
21、e necessary resources to enable this development. Gary P. Martin, SES US ARMY Henry J. Muller Jr, SES US ARMY John S. Willison, SES US ARMY Dr. Paul G. Zablocky, SES US ARMY Seth A. Spoenlein, US ARMY Johnathan S. Keller, US ARMY Gerald Michael, US ARMY (retired) Wayne A. Schoonveld, US ARMY Herald
22、Beljour, US ARMY Ogechi Palmer, US ARMY Dahesh Khalil, US ARMY Noel Acevedo, US ARMY Bruce T. Bennett, SES DISA (retired) Martin R. Gross, SES DISA Robert J. Willett, DISA Gregory J. Van Dyke, DISA Ronald Kearns, DISA Kensing Quock, DISA Dr. Kurt A. Fiscko, SES US NAVY Dr. Roy A. Axford Jr, US NAVY
23、William Y. Joo, US NAVY Shane Transue, US NAVY John R. Morris, US AIR FORCE Shawn M. Patterson, US AIR FORCE Benjamin Bythewood, US AIR FORCE Dennis A. Wagner, Welkin Sciences Blair Sawyer, Welkin Sciences Aaron Patton, Welkin Sciences Mike Phillips, Welkin Sciences William Sward, Welkin Sciences To
24、dd J. Reinking, Welkin Sciences John Branscum, Comtech EF Data Jeff Harig, Comtech EF Data Cris Mamaril, Comtech EF Data Kasra Toyserkani, Comtech EF Data Michael J. Beeler, Cometech EF Data Jeff Hannon, Cometech EF Data Dr. Alan J. Michaels, Virginia Tech Lane Cohee, Harris Corp Dr. Rich Yost, Harr
25、is Corp Rod Nelson, Harris Corp Mike OReilly, Harris Corp Ray Mathes III, Harris Corp Daniel Losada, Hughes Network Systems Mark Wickham, Hughes Network Systems Victor Liau, Hughes Network Systems ANSI/TIA-5041 iv Tony Noerpel, Hughes Network Systems Raghu Janardhan, Hughes Network Systems Jerry Mel
26、eski, RT Logic Doug Heath, RT Logic Bill Asiano, RT Logic David Landon, L3 Communications DeLon Jones, L3 Communications Lee Butterfield, L3 Communications James Dyal, L3 Communications Fritz Fisher, L3 Communications Carl Christensen, L3 Communications ANSI/TIA-5041 v TABLE OF CONTENTS SECTION PAGE
27、 1.0 INTRODUCTION/SCOPE 1-1 1.1 REFERENCES .1-1 1.2 GOVERNMENT DOCUMENTS .1-1 1.3 OTHER DOCUMENTS AND STANDARDS .1-1 1.4 REVISION NOTES .1-2 2.0 FAST DIGITAL IF ARCHITECTURE .2-1 2.1 OSDI OBJECTS AND CLASSES 2-5 2.2 OSDI PROTOCOL STACK .2-8 3.0 DIGITAL CONVERSION SUBSYSTEM 3-1 4.0 WIDEBAND SIGNAL PR
28、OCESSOR 4-1 5.0 DIGITAL MODEMS .5-1 6.0 MONITOR the fundamental constraint on this sampling process is that of the Nyquist sampling criterion, which is dependent only on the instantaneous bandwidth of the actual communications signal. The scalability of this functional architecture to simultaneous p
29、rocessing of multiple signals, and the associated impacts of the ADC/DAC location within the architecture are the core drivers of the present model for digital IF SATCOM. The digital IF architecture shall be capable of supporting point-to-point SCPC links, all varieties of communications links (SCPC
30、, FDMA, TDMA, CDMA, MFTDMA), distributed apertures, and also new desired capabilities for switching signal streams between distant terminals. A top-level view of the digital IF architecture, capturing a single digital IF messaging stream (up to 1 GHz instantaneous bandwidth) as integrated into a not
31、ional fixed strategic terminal, is shown in Figure 2-2. ANSI/TIA-5041 2-2 Figure 2-2. Top-Level Digital IF FAST Architecture ANSI/TIA-5041 2-3 This digital IF architecture is generally based on an adaptation of a multiband, single aperture, fixed strategic terminal.1The architecture is composed of a
32、ssemblies notionally located at an electronics building (EB), a pedestal, and the aperture/hub assembly. Functionally, the digital IF FAST architecture may be decomposed into an RF section (subsystems in red) and the core digital IF processing components (subsystems in gray). In many ways the termin
33、al architecture for the RF section can be translated to the analog IF architecture definition in MIL-STD-188-164B 3, and the digital IF processing represents an aggregation of MIL-STD-188-165A 4 and MIL_STD-188-165B 5 requirements for parallel modems. Supporting these core processing elements is an
34、infrastructure for terminal controls (subsystems in green), frequency and timing synchronization (subsystems in purple), and user data interfaces (subsystems in cyan). Note that the specific separation of the user signal plane (connections in navy), the control plane (connections in green), and the
35、user data plane (connections in cyan) adhere to the terminal segmentation as defined in the government reference architecture (GRA) 3.0 framework 2, ensuring commonality with analog IF terminals.2The core functions of the RF section include block frequency translation from the L-band IF (1-2 GHz) in
36、 the block up-/down-converters (BUC/BDC), amplification in the high-power amplifiers (HPA), noise figure optimized wideband reception in the low noise amplifier (LNA), and potentially multiband feed assemblies integrated into a single aperture. The architecture diagram shown in Figure 2-2 offers ins
37、ight to the potential for multiple RF bands, each interfacing to a unique digital IF digital conversion subsystem (DCS), although only one aperture is detailed out for simplicity. Additional RF functions within the hub/pedestal include the scanning/tracking receivers, mechanical/environmental regula
38、tion subsystems, and local test equipment (performance monitoring and test subsystem, PMTS) supporting real-time measurement of gain/flatness/spectral characteristics. Given that the RF section is not the core focus of the OSDI definition, these architectural components are intended primarily as rep
39、resentative placeholders for a chosen implementation. The most relevant characteristic is the IF input/output that supports up to 1 GHz of instantaneous bandwidth as supplied to the interface of the DCS. The digital IF terminal processing section interfaces to the L-band IF signal, digitizes the wid
40、eband signal in the DCS, and transports the digitized wideband signals over Ethernet, using a VITA-49-compliant sample encapsulation 11 to the wideband signal processor (WSP). The signal plane interface between the DCS and WSP conveys signals at a digital quadrature baseband level, limited in bandwi
41、dth only by the transport mechanism, which at the time of this writing would default to 10GbE for cost and availability objectives. All routing of the different digital IF sample streams is supported with virtual LANs (VLAN) tagging to logically separate streams. The DCS, Ethernet switching, and WSP
42、 take the place of the fine-tune converters and L-band switching subsystem (LSS) in an analog IF architecture. Once signals are received, the WSP acts primarily as the system channelizer and gain control manager. The WSP also converts the filtered/rate-adjusted signals to digital quadrature baseband
43、, reducing the signal sample rate in messages to the banks of digital modems. “Rate adjustment” within the WSP involves increasing or reducing the sample rate of each sample stream in binary steps to a fixed set of sample rates;3note that the actual signal bandwidth can be any value, with the sample
44、 rate chosen as the next a “level” up to meet appropriate sampling criterion. The VITA-49-encapsulated sample streams provided between the WSP and digital modems (DM) contain the carrier-specific baseband quadrature samples processed by the DM for signal transmissions/reception. The DM is effectivel
45、y a pure digital baseband processor, strictly producing/receiving samples at baseband. Within the digital IF transport sections of the FAST architecture, various opportunities exist for differential routing of quadrature sample streams among like components; i.e., the DCS can route portions or mirro
46、r images of the digitized spectrum to multiple WSPs (not shown) and/or the WSP could interface to multiple DCS entities in a distributed aperture architecture extension. Each of these core digital IF processing subsystems are 1Numerous other terminal configurations are enabled via the digital IF int
47、erfaces presented in this ICD the exemplary architecture and associated description are presented here as a concrete example rather than an all-inclusive framework. 2The GRA 3.0 terminal definition supports drop-in replacement of its Programmable Modem Modules (PMMs) with an L-band IF interface and
48、Ethernet-based Control Plane/Data plane interfaces. In that structure, the entire collection of digital IF processors may be viewed in the aggregate as a single multi-carrier PMM supporting multiple user data streams. 3Binary steps in the sample rate interpolation/decimation significantly improves t
49、he computational efficiency of the process via selectable stages of halfband filtering, so is integrated as a core provision of the WSP functional processing. ANSI/TIA-5041 2-4 described, along with top-level functional requirements, in subsequent sections prior to detailed definition of their interfaces. The supporting elements of the digital IF architecture are in many ways similar to the existing analog IF terminal types (GRA 3.0 compliance assumed), with distinctions noted below. The terminal control infrastructure is generally broken into three components: The termina
