1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R210-92. 92-05-15 M. A. Frye B Incorporate revision A NOR. Update drawing to current requirements. Editorial changes throughout. - drw 05-04-13 Raymond Monnin CURRENT CAGE CODE 67268 THE ORIGINAL FIRST SHEET OF
2、 THIS DRAWING HAS BEEN REPLACED. REV SHET REV SHET REV STATUS REV B B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 PMIC N/A PREPARED BY Marcia B. Kelleher DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY D. A. DiCenzo COLUMBUS, OHIO 43218-3990 http:/www.
3、dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY N. A. Hauck MICROCIRCUIT, LINEAR, QUAD DIFFERENTIAL AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 87-07-06 LINE RECEIVER, MONOLITHIC SILICON AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 14933 5962-87616 SHE
4、ET 1 OF 13 DSCC FORM 2233 APR 97 5962-E260-05 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87616 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. S
5、COPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-87616 01 E A Drawing number Device
6、 type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type. The device type identifies the circuit function as follows: Device type Generic number Circuit function 01 26LS32B Quad differential line receiver 1.2.2 Case outlines. The case outlines are as designated in MIL-STD-18
7、35 and as follows: Outline letter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 Dual-in-line F GDFP2-F16 or CDFP3-F16 16 Flat pack 2 CQCC1-N20 20 Square leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute ma
8、ximum ratings. Supply voltage range . -0.5 V to +7.0 V Input voltage range -1.5 V to +7.0 V Storage temperature range -65C to +165C Maximum power dissipation (PD) 1/ . 400 mW Lead temperature (soldering, 10 seconds) +300C Thermal resistance, junction-to-case (JC). See MIL-STD-1835 Junction temperatu
9、re (TJ) . +150C 1.4 Recommended operating conditions. Supply voltage (VCC) 4.5 V to 5.5 V Minimum high level input voltage (VIH). 2.0 V Maximum low level input voltage (VIL) 0.8 V Ambient temperature range (TA) -55C to +125C _ 1/ Must withstand the added PDdue to short circuit test; e.g., IOS. Provi
10、ded by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87616 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, s
11、tandards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - In
12、tegrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings.
13、MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedenc
14、e. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirement
15、s. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has
16、 been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modificatio
17、ns to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2
18、 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall
19、 be as specified on figure 1. 3.2.3 Block diagram. The block diagram shall be as specified on figure 2. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full ambient operatin
20、g temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STA
21、NDARD MICROCIRCUIT DRAWING SIZE A 5962-87616 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TA +125C unless otherwise specified Group A subgroups Device type Limits U
22、nit Min Max Differential input voltage VTHVOUT= VOLor VOH0 V VCM +5 V 1, 2, 3 All -120 +120 mV 1/ -7 V VCM +12 V -200 +200 Input resistance RIN -15 V VCM +15 V (one input ac GND) 2/ 1, 2, 3 All 6.0 k Input current (under test) IINVIN= +15 V, other input -15 V VIN +15 V 1, 2, 3 All +2.3 mA Input curr
23、ent (under test) IINVIN= -15 V, other input -15 V VIN +15 V 1, 2, 3 All -2.8 mA High level output voltage VOHVCC= 4.5 V, ENABLEV = 0.8 V, IOH= -12 mA 1, 2, 3 All 2.0 V VIN= +1.0 V IOH= -1 mA 2.4 Low level output voltage VOLVCC= 4.5 V, ENABLEV = 0.8 V, IOH= 16 mA 1, 2, 3 All 0.4 V VIN= -1.0 V IOH= 24
24、 mA 0.5 Enable clamp voltage VICIIN= -18 mA, VCC= 4.5 V 1, 2, 3 All -1.5 V Off-state (high impedance) IOVCC= 5.5 V VOUT= 2.4 V 1, 2, 3 All +50 A output current VOUT= 0.4 V -50 High level input current IIH1VCC= 5.5 V, VIN= 2.7 V 1, 2, 3 All +20 A Low level input current IILVCC= 5.5 V, VIN= 0.4 V 1, 2
25、, 3 All -0.36 A High level input current IIH2VCC= 5.5 V, VIN= 5.5 V 1, 2, 3 All +100 A Output short circuit current 3/ IOSVCC= 5.5 V, VOUT= 0 V, VIN= +1.0 V 1, 2, 3 All -30 -120 mA Supply current ICCVCC= 5.5V, All VIN= GND, outputs disabled 1, 2, 3 All 70 mA Input hysteresis VHYSTVCC= 5.0 V 1, 2, 3
26、All 65 240 mV Open circuit input voltage VIOC1, 2, 3 All 1.5 3.0 V Functional test See 4.3.1c 7, 8 All See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87616 DEFENSE SUPPLY CENTE
27、R COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - continued. Test Symbol Conditions -55C TA +125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max Propagation delay from input to tPLHCL= 5
28、0 pF, RL1= 1k, TA= +25C 4/ 9 All 21 ns output RL2= 280, See figures 3 and 4 5/ 9, 10, 11 26 Propagation delay from input to tPHLTA= +25C 4/ 9 21 output 5/ 9, 10, 11 26 Propagation delay from ENABLE to tPZHTA= +25C 4/ 9 16 output 5/ 9, 10, 11 22 Propagation delay from ENABLE to tPZLTA= +25C 4/ 9 22 o
29、utput 5/ 9, 10, 11 33 Propagation delay from ENABLE to tPHZCL= 5 pF, RL1= 1k, TA= +25C 4/ 9 All 18 ns output RL2= 280, See figures 3 and 4 5/ 9, 10, 11 27 Propagation delay from ENABLE to tPLZTA= +25C 4/ 9 18 output 5/ 9, 10, 11 27 Propagation delay skew tSKEW|tPLH-tPHL| See figures 3 and 4 TA= +25C
30、 4/ 9 All 3.0 ns / 9, 10, 11 4 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87616 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 6 DSCC FORM
31、2234 APR 97 TABLE I. Electrical performance characteristics - continued. Test Symbol Conditions -55C TA +125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max Propagation delay from ENABLE to tPZHCL= 50 pF, RL1= 1k, TA= +25C 4/ 9 All 26 ns output RL2= 280, See figures 3 a
32、nd 4 5/ 9, 10, 11 39 Propagation delay from ENABLE to tPZLTA= +25C 4/ 9 33 output 5/ 9, 10, 11 49 Propagation delay from ENABLE to tPHZCL= 5 pF, RL1= 1k, TA= +25C 4/ 9 All 20 ns output RL2= 280, See figures 3 and 4 5/ 9, 10, 11 30 Propagation delay from ENABLE to tPLZTA= +25C 4/ 9 20 output 5/ 9, 10
33、, 11 30 1/ Input voltage is not tested directly due to tester accuracy limitations but is tester correlated. 2/ RINis not directly tested but is correlated. 3/ Not more than one output should be shorted at a time. Duration of short circuit test should not exceed one second. 4/ VCC= 5.0 V. 5/ VCC= 4.
34、5 V to 5.5 V. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87616 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 Device Type 01 Case outlines E and F
35、 2 Terminal number Terminal symbol 1 INPUT A- NC 2 INPUT A+ INPUT A- 3 OUTPUT A INPUT A+ 4 ENABLE OUTPUT A 5 OUTPUT C ENABLE 6 INPUT C+ NC 7 INPUT C- OUTPUT C 8 GND INPUT C+ 9 INPUT D- INPUT C- 10 INPUT D+ GND 11 OUTPUT D NC 12 ENABLE INPUT D- 13 OUTPUT B INPUT D+ 14 INPUT B+ OUTPUT D 15 INPUT B- EN
36、ABLE 16 VCCNC 17 - - - OUTPUT B 18 - - - INPUT B+ 19 - - - INPUT B- 20 - - - VCCFIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87616 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, O
37、HIO 43218-3990 REVISION LEVEL B SHEET 8 DSCC FORM 2234 APR 97 FIGURE 2. Block diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87616 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION L
38、EVEL B SHEET 9 DSCC FORM 2234 APR 97 Note: CLincludes text fixture capacitance. Switch matrix Parameter SW1 SW2 tPLHClosed Closed tPHLClosed Closed tZLClosed Open tZHOpen Closed tLZClosed Closed tHZClosed Closed FIGURE 3. AC test circuit. Provided by IHSNot for ResaleNo reproduction or networking pe
39、rmitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87616 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 10 DSCC FORM 2234 APR 97 1. Pulse generator for all pulses: Rate 1.0 MHz; ZO= 50 ohms; tr 2.5 ns; tf 2.5 ns. 2. CLincludes probe and ji
40、g capacitance. 3. All diodes are 1N916 or 1N3064. FIGURE 4. Switching time waveforms. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87616 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LE
41、VEL B SHEET 11 DSCC FORM 2234 APR 97 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible
42、due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced
43、with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein
44、). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required
45、 in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activi
46、ty retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-3
47、8535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, C, or D.
48、 The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electri
