1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Correction to case outline dimensions. Changes to table I. 87-11-17 M. A. Frye B Change data hold time limits. Change conditions for reference output voltage. Change footnote 2. Add footnote to reference input resistance test. Delete compliance v
2、oltage test. Device type 01 inactive for new design, see table I footnote 4/. 89-01-09 M. A. Frye C Redraw. Update drawing to current requirements. Editorial changes throughout. - -drw 08-04-02 Robert M. Heber THE ORIGINAL FIRST SHEET OF THIS DRAWING HAS BEEN REPLACED. CURRENT CAGE CODE 67268 REV SH
3、ET REV SHET REV STATUS REV C C C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PREPARED BY Joseph A. Kerby DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY D. H. Johnson COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY AL
4、L DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, LINEAR, MICROPROCESSOR COMPATIBLE, 12-BIT D/A CONVERTER, AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 87-03-19 MONOLITHIC SILICON AMSC N/A REVISION LEVEL C SIZE A CAGE CODE 14933 5962-87801 SHEET 1 OF 11 DSCC FORM 2233 APR 97
5、 5962-E323-08 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87801 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing des
6、cribes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-87801 01 X A Drawing number Device type (see 1.2.1) Case outline(s
7、ee 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type. The device type identifies the circuit function as follows: Device type Generic number Circuit function 01 AD567 12-bit current output D/A converter, microprocessor compatible. 1.2.2 Case outline. The case outline is as designated in MIL-STD-1835 as
8、 follows: Outline letter Descriptive designator Terminals Package style X GDIP1-T28 or CDIP2-T28 28 Dual-in -line 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. VCCto POWER GROUND . 0 V dc to +18 V dc VEEto POWER GROUND 0 V dc to -18 V
9、dc Voltage on DAC OUT (pin 2) . -3 V dc to +12 V dc Digital inputs (pins 10-15, 17-28) to POWER GROUND -1.0 V dc to 7.0 V dc VREFIN to REF GND 12 V dc BIP OFFSET to REF GND. 12 V dc 10 V SPAN R to REF GND 12 V dc 20 V SPAN R to REF GND 24 V dc VREFOUT short to POWER GROUND. Continuous Power dissipat
10、ion (PD) . 1,000 mW Storage temperature range -65C to +150C Lead temperature (soldering, 10 seconds) +300C Thermal resistance, junction-to-case (JC). See MIL-STD-1835 Thermal resistance, junction-to-ambient (JA) 60C/W 1.4 Recommended operating conditions. Supply voltage, VCC. +15 V dc Supply voltage
11、, VEE-15 V dc Ambient operating temperature range (TA) -55C to +125C Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87801 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 3 DSC
12、C FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solici
13、tation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF
14、 DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins
15、 Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a
16、specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Li
17、sting (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML f
18、low as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with M
19、IL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outline. The case outline shall be in accordance with
20、1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Functional block diagram. The functional block diagram shall be as specified on figure 3. 3.3 Electrical performance chara
21、cteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full ambient operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. Th
22、e electrical tests for each subgroup are described in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87801 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 4 DSCC FORM
23、 2234 APR 97 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations
24、, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ cert
25、ification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of co
26、mpliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appen
27、dix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to
28、review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-8
29、7801 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ -55C TA +125C unless otherwise specified Group A subgroups Device type Limits Unit Min MaxRelative accuracy RA1 01 1
30、/2 LSB All bits with positive errors on; All bits with negative errors on. 2, 3 3/4 Differential nonlinearity DNL Major carry errors 1 01 3/4 LSB 2, 3 1 Gain error AEAll bits on 1 01 0.25 %FSR Gain temperature coefficient TCAE2, 3 30 ppm of FSR/C Unipolar offset error VOSAll bits off 1 01 0.05 %FSR
31、Unipolar offset temperature coefficient TCVOS2, 3 2 ppm of FSR/C Bipolar zero error BPZEMSB on, all other bits off; bipolar mode 1 01 0.15 %FSR Bipolar zero temperature coefficient TCBPZE2, 3 10 ppm of FSR/C Reference input resistance 2/ RINTA= +25C 1 01 15 25 k Output resistance ROUTExcluding span
32、resister TA= +25C 1 01 6 10 k Reference output voltage 3/ VREFUnipolar mode, 1.1 mA external load, VCC= +12 V, VEE= -12 V 1, 2, 3 01 9.9 10.10 V Output current 4/ IOUTUnipolar mode, VIH= 5 V, All bits on, TA= +25C 1 01 -1.6 -2.4 mA Bipolar mode, VIH= 5 V, All bits on, TA= +25C 0.8 1.2 Power supply r
33、ejection ratio 4/ PSRR +11.4 V VCC +16.5 V TA= +25C 1 01 10 ppm of FSR/% -16.5 V VCC -11.4 V TA= +25C 25 Power supply current 4/ ICCVCC= +16.5 V, VEE= -16.5 V All bits low, TA= +25C 1 01 5 mA IEE-25 Power dissipation 4/, 5/ PD1 01 495 mW See footnotes at end of table. Provided by IHSNot for ResaleNo
34、 reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87801 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - continued. Test Symbol Conditio
35、ns 1/ -55C TA +125C unless otherwise specified Group A subgroups Device type Limits Unit Min MaxDigital input high voltage 4/ VIHTA= +25C 1 01 2.0 V Digital input low voltage VIL1 01 0.8 V 2, 3 0.7 Digital input high current 4/ IIHVIH= 5.5 V, TA= +25C 1 01 300 A Digital input low current 4/ IILVIL=
36、0 V, TA= +25C 1 01 100 A Functional tests See 4.3.1c 7, 8 01 Output current settling time tSLSee figure 4, TA= +25C 2/, 4/ 9 01 500 ns Write pulse width tWR100 Data setup time tDW50 Data hold time tDH10 CS valid to end of WR tCW100 Address valid to end of WR tAW100 1/ VCC= +15 V dc, VEE= -15 V dc, 5
37、0 resistor pin 6 to pin 8, pins 10-15 = logic “0”, VIH= 2.0 V, VIL= 0.8 V, unless otherwise specified. 2/ Guaranteed if not tested parameter. 3/ In subgroup 1, the reference output is loaded with 0.5 mA nominal reference current and 1.1 mA bipolar offset current, with the DAC in +10 V range, unipola
38、r mode. In subgroups 2 and 3, only the 0.5 mA reference input current is applied. The reference must be buffered to supply external loads at elevated temperature. 4/ These parametric limits represent +25C characterization and testing only. For these particular parameters, device type 01 does not mee
39、t the full military operating range requirements of 1.2.1 of MIL-STD-883. 5/ Power dissipation performance is checked as part of the power supply current test, ICC, IEE. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SI
40、ZE A 5962-87801 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 7 DSCC FORM 2234 APR 97 Device type 01 Case outline X Terminal number Terminal symbol 1 BIP OFFSET 2 DAC OUT (2 mA F.S.) 3 10 V SPAN R 4 20 V SPAN R 5 REF GND 6 VREFOUT 7 +VCC8 VREFIN 9 -VEE10 CS 11 WR 12
41、 A3 13 A2 14 A1 15 A0 16 POWER GROUND 17 DB0 (LSB) 18 DB1 19 DB2 20 DB3 21 DB4 22 DB5 23 DB6 24 DB7 25 DB8 26 DB9 27 DB10 28 DB11 (MSB) FIGURE 1. Terminal connections. CS WR A3 A2 A1 A0 Operation 1 X X X X X No operation X 1 X X X X No operation 0 0 1 1 1 0 Enable 4 LSBs of first rank 0 0 1 1 0 1 En
42、able 4 middle bits of first rank 0 0 1 0 1 1 Enable 4 MSBs of first rank 0 0 0 1 1 1 Loads second rank from first rank 0 0 0 0 0 0 All latches transparent X = Dont care FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD M
43、ICROCIRCUIT DRAWING SIZE A 5962-87801 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 8 DSCC FORM 2234 APR 97 FIGURE 3. Functional block diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DR
44、AWING SIZE A 5962-87801 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 9 DSCC FORM 2234 APR 97 FIGURE 4. Switching waveforms. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-8
45、7801 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 10 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with me
46、thod 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under docume
47、nt revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA= +125C, minimum.
48、b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. TABLE II. Electrical test requirements. MIL-STD-883 test requirements Subgroups (in accordance with MIL-STD-883, method 5005, table I) Interim electrical parameters (method 5004) 1 Final electrical test parameters (method 5004) 1*, 2, 3 Group A test requirements (m
