ImageVerifierCode 换一换
格式:PDF , 页数:11 ,大小:203.08KB ,
资源ID:689121      下载积分:10000 积分
快捷下载
登录下载
邮箱/手机:
温馨提示:
如需开发票,请勿充值!快捷下载时,用户名和密码都是您填写的邮箱或者手机号,方便查询和重复下载(系统自动生成)。
如填写123,账号就是123,密码也是123。
特别说明:
请自助下载,系统不会自动发送文件的哦; 如果您已付费,想二次下载,请登录后访问:我的下载记录
支付方式: 支付宝扫码支付 微信扫码支付   
注意:如需开发票,请勿充值!
验证码:   换一换

加入VIP,免费下载
 

温馨提示:由于个人手机设置不同,如果发现不能下载,请复制以下地址【http://www.mydoc123.com/d-689121.html】到电脑端继续下载(重复下载不扣费)。

已注册用户请登录:
账号:
密码:
验证码:   换一换
  忘记密码?
三方登录: 微信登录  

下载须知

1: 本站所有资源如无特殊说明,都需要本地电脑安装OFFICE2007和PDF阅读器。
2: 试题试卷类文档,如果标题没有明确说明有答案则都视为没有答案,请知晓。
3: 文件的所有权益归上传用户所有。
4. 未经权益所有人同意不得将文件中的内容挪作商业或盈利用途。
5. 本站仅提供交流平台,并不能对任何下载内容负责。
6. 下载文件中如有侵权或不适当内容,请与我们联系,我们立即纠正。
7. 本站不保证下载资源的准确性、安全性和完整性, 同时也不承担用户因使用这些下载资源对自己和他人造成任何形式的伤害或损失。

版权提示 | 免责声明

本文(DLA DSCC-VID-V62 04622 REV B-2012 MICROCIRCUIT DIGITAL ADVANCED CMOS OCTAL BUFFER DRIVER WITH 3-STATE OUTPUTS MONOLITHIC SILICON.pdf)为本站会员(livefirmly316)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA DSCC-VID-V62 04622 REV B-2012 MICROCIRCUIT DIGITAL ADVANCED CMOS OCTAL BUFFER DRIVER WITH 3-STATE OUTPUTS MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE APPROVED A Add package Y. Update boilerplate to current version. - CFS 06-05-30 Thomas M. Hess B Update boilerplate paragraphs to current requirements. - PHN 12-07-23 Thomas M. Hess CURRENT DESIGN ACTIVITY CAGE CODE 16236 HAS CHANGED NAMES TO: DLA LAND AND MARITIME CO

2、LUMBUS, OHIO 43218-3990 Prepared in accordance with ASME Y14.24 Vendor item drawing REV PAGE REV PAGE REV STATUS OF PAGES REV B B B B B B B B B B B PAGE 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PREPARED BY Charles F. Saffle DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO 43218-3990 Original date of drawing C

3、HECKED BY Charles F. Saffle TITLE MICROCIRCUIT, DIGITAL, ADVANCED CMOS, OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS, MONOLITHIC SILICON YY-MM-DD 03-11-14 APPROVED BY Thomas M. Hess SIZE A CODE IDENT. NO. 16236 DWG NO. V62/04622 REV B PAGE 1 OF 11 AMSC N/A 5962-V085-12 Provided by IHSNot for ResaleNo re

4、production or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04622 REV B PAGE 2 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a high performance octal buffer/driver with 3-state outputs

5、 microcircuit, with an operating temperature range of -55C to +125C. 1.2 Vendor Item Drawing Administrative Control Number. The manufacturers PIN is the item of identification. The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentat

6、ion: V62/04622 - 01 X E Drawing Device type Case outline Lead finish number (See 1.2.1) (See 1.2.2) (See 1.2.3) 1.2.1 Device type(s). Device type Generic Circuit function 01 74AC244-EP Octal buffer/driver with 3-state outputs 1.2.2 Case outlines. The case outline(s) are as specified herein. Outline

7、letter Number of pins JEDEC PUB 95 Package style X 20 JEDEC MS-013 Plastic small-outline Y 20 Plastic small outline 1.2.3 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacturer: Finish designator Material A Hot solder dip B Tin-lead plat

8、e C Gold plate D Palladium E Gold flash palladium Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04622 REV B PAGE 3 1.3 Absolute maximum ratings. 1/ Supply voltag

9、e range (VCC) . -0.5 V to +7.0 V Input voltage range (VI) . -0.5 V to VCC+ 0.5 V 2/ Output voltage range (VO) . -0.5 V to VCC+ 0.5 V 2/ Input clamp current (IIK) (VIVCC) 20 mA Output clamp current (IOK) (VOVCC) 20 mA Continuous output current (IO) (VO= 0 to VCC) 50 mA Continuous current through VCCo

10、r GND . 200 mA Package thermal impedance (JA): Case outline X . 58C/W 3/ Case outline Y . 60C/W 3/ Storage temperature range (TSTG) . -65C to +150C 4/ 1.4 Recommended operating conditions. 5/ Supply voltage range (VCC) . 2.0 V to 6.0 V Minimum high level input voltage (VIH): VCC= 3.0 V 2.1 V VCC= 4.

11、5 V 3.15 V VCC= 5.5 V 3.85 V Maximum low level input voltage (VIL): VCC= 3.0 V 0.9 V VCC= 4.5 V 1.35 V VCC= 5.5 V 1.65 V Input voltage range (VI) . 0.0 V to VCCOutput voltage range (VO) . 0.0 V to VCCMaximum high level output current (IOH): VCC= 3.0 V -12 mA VCC= 4.5 V -24 mA VCC= 5.5 V -24 mA Maxim

12、um low level output current (IOL): VCC= 3.0 V 12 mA VCC= 4.5 V 24 mA VCC= 5.5 V 24 mA Maximum input transition rise or fall rate (t/v) . 8 ns/V Operating free-air temperature range (TA) -55C to +125C 1/ Stresses beyond those listed under “absolute maximum rating” may cause permanent damage to the de

13、vice. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2/ The input

14、and output voltage ratings may be exceeded if the input and output current ratings are observed. 3/ The package thermal impedance is calculated in accordance with JESD 51-7. 4/ Long-term high-temperature storage and/or extended use at maximum recommended operating conditions may result in a reductio

15、n of overall device life. 5/ All unused inputs of the device must be held at VCCor GND to ensure proper device operation. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG N

16、O. V62/04622 REV B PAGE 4 2. APPLICABLE DOCUMENTS JEDEC SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC) JEP95 Registered and Standard Outlines for Semiconductor Devices JESD51-7 High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages (Copies of these documents are available onlin

17、e at http:/www.jedec.org or from JEDEC Solid State Technology Association, 3103 North 10th Street, Suite 240S, Arlington, VA 22201.) 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturers part number as shown in 6.3 herein and as follows: A. Manufacturers n

18、ame, CAGE code, or logo B. Pin 1 identifier C. ESDS identification (optional) 3.2 Unit container. The unit container shall be marked with the manufacturers part number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditions and e

19、lectrical performance characteristics are as specified in 1.3, 1.4, and table I herein. 3.4 Design, construction, and physical dimension. The design, construction, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outlines. The case outlines shall be as shown in 1.2.2 and fig

20、ure 1. 3.5.2 Truth table. The truth table shall be as shown in figure 2. 3.5.3 Logic diagram. The logic diagram shall be as shown in figure 3. 3.5.4 Terminal connections. The terminal connections shall be as shown in figure 4. 3.5.5 Timing waveforms and test circuit. The timing waveforms and test ci

21、rcuit shall be as shown in figure 5. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04622 REV B PAGE 5 TABLE I. Electrical performance characteristics. 1/ Test Sy

22、mbol Conditions VCCTemperature, TADevice type Limits Unit Min Max High level output voltage VOHIOH= -50 A 3.0 V 25C, -55C to 125C 01 2.9 V 4.5 V 4.4 5.5 V 5.4 IOH= -12 mA 3.0 V 25C 2.56 -55C to 125C 2.4 IOH= -24 mA 4.5 V 25C 3.86 -55C to 125C 3.7 5.5 V 25C 4.86 -55C to 125C 4.7 Low level output volt

23、age VOLIOL= 50 A 3.0 V 25C, -55C to 125C 01 0.1 V 4.5 V 0.1 5.5 V 0.1 IOL= 12 mA 3.0 V 25C 0.36 -55C to 125C 0.5 IOL= 24 mA 4.5 V 25C 0.36 -55C to 125C 0.5 5.5 V 25C 0.36 -55C to 125C 0.5 Input current IIData inputs and Control inputs VI= VCCor GND 5.5 V 25C 01 0.1 A -55C to 125C 1.0 Off-state outpu

24、t current IOZVO= VCCor GND VI(OE)= VILor VIH5.5 V 25C 01 0.25 A -55C to 125C 5.0 Quiescent supply current ICCVI= VCCor GND IO= 0 A 5.5 V 25C 01 4.0 A -55C to 125C 80.0 Input capacitance CIVI= VCCor GND 5.0 V 25C 01 2.5 TYP pF Power dissipation capacitance per buffer/driver CpdCL= 50 pF f = 1 MHz 5.0

25、 V 25C 01 45 TYP pF See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04622 REV B PAGE 6 TABLE I. Electrical performance characteristi

26、cs - Continued. 1/ Test Symbol Conditions VCCTemperature, TADevice type Limits Unit Min Max Propagation delay time, A to Y tPLHSee figure 5 3.0 V and 3.6 V 25C 01 2.0 9.0 ns -55C to 125C 1.0 12.5 4.5 V and 5.5 V 25C 1.5 7.0 -55C to 125C 1.0 9.5 tPHLSee figure 5 3.0 V and 3.6 V 25C 2.0 9.0 -55C to 12

27、5C 1.0 12.0 4.5 V and 5.5 V 25C 1.5 7.0 -55C to 125C 1.0 9.0 Output enable time, OE to Y tPZHSee figure 5 3.0 V and 3.6 V 25C 01 2.0 10.5 ns -55C to 125C 1.0 11.5 4.5 V and 5.5 V 25C 1.5 7.0 -55C to 125C 1.0 9.0 tPZLSee figure 5 3.0 V and 3.6 V 25C 2.5 10.0 -55C to 125C 1.0 13.0 4.5 V and 5.5 V 25C

28、1.5 8.0 -55C to 125C 1.0 10.5 Output disable time, OE to Y tPHZSee figure 5 3.0 V and 3.6 V 25C 01 3.0 10.0 ns -55C to 125C 1.0 12.5 4.5 V and 5.5 V 25C 2.5 9.0 -55C to 125C 1.0 10.5 tPLZSee figure 5 3.0 V and 3.6 V 25C 2.5 10.5 -55C to 125C 1.0 13.0 4.5 V and 5.5 V 25C 2.0 9.0 -55C to 125C 1.0 11.0

29、 1/ Testing and other quality control techniques are used to the extent deemed necessary to assure product performance over the specified temperature range. Product may not necessarily be tested across the full temperature range and all parameters may not necessarily be tested. In the absence of spe

30、cific parametric testing, product performance is assured by characterization and/or design. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04622 REV B PAGE 7 Case

31、 X Dimensions Symbol Millimeters Inches Symbol Millimeters Inches Min Max Min Max Min Max Min Max A - 2.65 - 0.104 E 7.39 7.59 0.291 0.299 A1 0.10 0.30 0.004 0.012 E1 10.15 10.65 0.400 0.419 b 0.35 0.51 0.014 0.020 e 1.27 NOM 0.050 NOM c 0.25 NOM 0.010 NOM L 0.40 1.27 0.016 0.050 D 12.70 12.95 0.500

32、 0.510 NOTES: 1. This drawing is subject to change without notice. 2. Body dimensions do not include mold flash or protrusion not to exceed 0.006 inches (0.15 mm). 3. Falls within JEDEC MS-013. 4. All linear dimensions are shown in inches (millimeters). Metric equivalents are given for general infor

33、mation only. FIGURE 1. Case outlines. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04622 REV B PAGE 8 Case Y Dimensions Symbol Millimeters Inches Symbol Millime

34、ters Inches Min Max Min Max Min Max Min Max A - 2.00 - 0.079 E 5.00 5.60 0.197 0.220 A1 0.05 0.15 0.002 0.006 E1 7.40 8.20 0.291 0.323 b 0.35 0.51 0.014 0.020 e 1.27 NOM 0.050 NOM c 0.15 NOM 0.006 NOM L 0.55 1.05 0.022 0.041 D 12.30 12.90 0.484 0.508 NOTES: 1. This drawing is subject to change witho

35、ut notice. 2. Body dimensions do not include mold flash or protrusion not to exceed 0.15 mm (0.006 inches). 3. All linear dimensions are shown in millimeters (inches). Inches equivalents are given for general information only. FIGURE 1. Case outlines - Continued. Provided by IHSNot for ResaleNo repr

36、oduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04622 REV B PAGE 9 (each buffer) Inputs Output OE A Y L L H H L X H L Z FIGURE 2. Truth table. FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo

37、 reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04622 REV B PAGE 10 Case outlines: X and Y Terminal number Terminal symbol Terminal number Terminal symbol 1 1OE11 2A1 2 1A1 12 1Y4 3 2Y4 13 2A2 4

38、 1A2 14 1Y3 5 2Y3 15 2A3 6 1A3 16 1Y2 7 2Y2 17 2A4 8 1A4 18 1Y1 9 2Y1 19 2OE10 GND 20 VCCFIGURE 4. Terminal connections. NOTES: 1. CLincludes probe and jig capacitance. 2. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Wav

39、eform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. 3. All input pulses are supplied by generators having the following characteristics: PRR 1 MHz, ZO= 50, tr 2.5 ns, tf 2.5 ns. 4. The outputs are measured one at a time with one

40、input transition per measurement. 5. For 3-state outputs tests: tPLH/tPHLS1 = Open tPLZ/tPZLS1 = 2 x VCCtPHZ/tPZHS1 = Open FIGURE 5. Timing waveforms and test circuit. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS CO

41、LUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04622 REV B PAGE 11 4. VERIFICATION 4.1 Product assurance requirements. The manufacturer is responsible for performing all inspection and test requirements as indicated in their internal documentation. Such procedures should include proper handlin

42、g of electrostatic sensitive devices, classification, packaging, and labeling of moisture sensitive devices, as applicable. 5. PREPARATION FOR DELIVERY 5.1 Packaging. Preservation, packaging, labeling, and marking shall be in accordance with the manufacturers standard commercial practices for electr

43、ostatic discharge sensitive devices. 6. NOTES 6.1 ESDS. Devices are electrostatic discharge sensitive and are classified as ESDS class 1 minimum. 6.2 Configuration control. The data contained herein is based on the salient characteristics of the device manufacturers data book. The device manufacture

44、r reserves the right to make changes without notice. This drawing will be modified as changes are provided. 6.3 Suggested source(s) of supply. Identification of the suggested source(s) of supply herein is not to be construed as a guarantee of present or continued availability as a source of supply f

45、or the item. DLA Land and Maritime maintains an online database of all current sources of supply at http:/www.landandmaritime.dla.mil/Programs/Smcr/. Vendor item drawing administrative control number 1/ Device manufacturer CAGE code Vendor part number Top-Side Marking V62/04622-01XE 01295 SN74AC244M

46、DWREP SAC244MEP V62/04622-01YE 01295 SN74AC244MNSREP SAC244MEP 1/ The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation. CAGE code Source of supply 01295 Texas Instruments, Inc. Semiconductor Group 8505 Forest lane P.O. Box 660199 Dallas, TX 75243 Point of contact: U.S. Highway 75 South P.O. Box 84, M/S 853 Sherman, TX 75090-9493 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-

copyright@ 2008-2019 麦多课文库(www.mydoc123.com)网站版权所有
备案/许可证编号:苏ICP备17064731号-1