DLA SMD-5962-04230 REV C-2013 MICROCIRCUIT DIGITAL-LINEAR A D CONVERTER 14-BIT 80 MSPS MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add device type 02 and RHA designator “R” requirements. Make changes to 1.2.2, 1.4, and Table I. Make a change to case outline X pin 32 under Figure 2. Add paragraphs 1.5, 4.4.4.1, and Table IIB. Delete AVCC, DVCC, and tCMINtests as specified und

2、er Table I. - ro 08-10-31 R. HEBER B Add device type 03 tested at low dose rate. Make change to paragraphs 1.2.2, 1.4, and 1.5. Make changes to footnotes 1/, 2/, and 3/ as specified under Table I. Make change to Table IIB and paragraph 4.4.4.1. -rrp 11-06-14 C. SAFFLE C Add single event latchup (SEL

3、) testing information for device types 02 and 03. Add paragraph 1.4.1. Delete device class M references. - ro 13-06-18 C. SAFFLE REV SHEET REV C C SHEET 15 16 REV STATUS REV C C C C C C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY DAN WONNELL DLA LAND AND MAR

4、ITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY RAYMOND MONNIN APPROVED BY RAYMOND MONNIN MICROCIRCUIT, DIGITAL-LINEAR, A/D CONVERTER, 14-BIT, 80

5、MSPS, MONOLITHIC SILICON DRAWING APPROVAL DATE 04-10-25 AMSC N/A REVISION LEVEL C SIZE A CAGE CODE 67268 5962-04230 SHEET 1 OF 16 DSCC FORM 2233 APR 97 5962-E439-13 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A

6、5962-04230 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device class Q) and space application (device class V). A choice of case outlines an

7、d lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 R 04230 02 V X C Federal stock class designator RHA desi

8、gnator (see 1.2.1) Device type (see 1.2.2) Device class designator Case outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA desig

9、nator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Operating temperature Circuit function 01 AD6645 -35C TC +85C A/D converter, 14-bit, 80 MSPS 02 AD6645 -55C TA +125C Radiation hardened A/D conv

10、erter, 14-bit, 80 MSPS 03 AD6645 -55C TA +125C Radiation hardened A/D converter, 14-bit, 80 MSPS 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation Q or V Certification and q

11、ualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X See figure 1 52 Quad flat pack with non-conductive tie bars 1.2.5 Lead finish. The lead finish is as specified in

12、 MIL-PRF-38535 for device classes Q and V. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-04230 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute max

13、imum ratings. 1/ Analog supply voltage (AVCC) 0 V dc to 7 V dc Digital supply voltage (DVCC) . 0 V dc to 7 V dc Analog input voltage . 0 V dc to AVCCAnalog input current . 25 mA Digital input voltage 0 V dc to AVCCDigital output current 4 mA Junction temperature (TJ) . +175C Lead temperature (solder

14、ing, 10 seconds) . +300C Storage temperature range . -65C to +150C Thermal resistance, junction-to-case (JC) . 7.2C/W 1.4 Recommended operating conditions. Analog supply voltage (AVCC) 4.75 V dc to 5.25 V dc Digital supply voltage (DVCC) . 3.0 V dc to 3.6 V dc Case operating temperature range (TC) f

15、or device type 01 -35C to +85C Ambient operating temperature range (TA) for device types 02 and 03 . -55C to +125C 1.4.1 Operating performance characteristics. AC performance: TA= +25C, AVCC= 5 V, DVCC= 3.3 V, fC= 82 MSPS, fIN= 175 MHz. Signal to noise ratio (SNR) at -1 dBFS . 71 dB Signal to noise

16、and distortion (SINAD) at -1 dBFS . 70 dB Worst case second or third harmonic (2nd to 3rd) at -1 dBFS -78 dBc Worst case fourth or higher harmonic (4th plus) at -1 dBFS . -91 dBc 1.5 Radiation features: Maximum total dose available (dose rate = 50 300 rads(Si)/s): Device type 02 100 krads(Si) 2/ Max

17、imum total dose available (dose rate 10 mrads(Si)/s): Device type 03 50 krads(Si) 3/ Single event phenomenon (SEP): No single event latchup (SEL) occurs at effective linear energy transfer (LET) (see 4.4.4.2): Device types 02 and 03: . 80 MeV-cm2/mg 4/ _ 1/ Stresses above the absolute maximum rating

18、 may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ These parts may be dose rate sensitive in a space environment and may demonstrate enhanced low dose rate effects. Radiation end point limits for the noted parameters

19、 are guaranteed only for the conditions as specified in MIL-STD-883, method 1019, condition A. 3/ For device type 03, radiation end point limits for the noted parameters are guaranteed for the conditions specified in MIL-STD-883, method 1019, condition D. 4/ Limits are characterized at initial quali

20、fication and after any design or process changes that may affect the SEP characteristics, but are not production lot tested unless specified by the customer through the purchase order or contract. For more information on single event effect (SEE) test results, customers are requested to contact the

21、manufacturer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-04230 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specif

22、ication, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-

23、38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit

24、Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/quicksearch.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following documen

25、t(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of the documents are the issues of the documents cited in the solicitation or contract. ASTM INTERNATIONAL (ASTM) ASTM F1192 Standard Guide for the Measurement of Single Event Phenomena (SEP) Ind

26、uced by Heavy Ion Irradiation of Semiconductor Devices. (Copies of this document is available online at http:/www.astm.org/ or from ASTM International, P.O. Box C700, 100 Bar Harbor Drive, West Conshohocken, PA 19428-2959). 2.3 Order of precedence. In the event of a conflict between the text of this

27、 drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes

28、 Q and V shall be in accordance with MIL-PRF-38535 as specified herein, or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. 3.2 Design, construction, and physical dimensions. The des

29、ign, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V. 3.2.1 Case outline. The case outline shall be in accordance with 1.2.4 herein and figure 1. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2.

30、 3.2.3 Timing waveforms. The timing waveforms shall be as specified on figure 3. 3.2.4 Radiation exposure circuit. The radiation exposure circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing and acquiring activity upon req

31、uest. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table IA and shall apply over the full case operating temperature range for de

32、vice type 01 and ambient operating temperature range for device types 02 and 03. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-04230 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 5

33、DSCC FORM 2234 APR 97 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical tests for each subgroup are defined in table IA. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufactur

34、ers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device clas

35、ses Q and V shall be in accordance with MIL-PRF-38535. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required

36、 from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, fo

37、r device classes Q and V, the requirements of MIL-PRF-38535 and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 shall be provided with each lot of microcircuits delivered to this drawing. Provided by IHSNot for ResaleNo rep

38、roduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-04230 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 6 DSCC FORM 2234 APR 97 TABLE IA. Electrical performance characteristics. Test Symbol Conditions 1/ 2/ 3/ AVCC= 5 V, D

39、VCC= 3.3 V, fc = 80 MSPS Group A subgroups Device type Limits Unit unless otherwise specified Min Max Resolution RES 4/ 5/ 1, 2, 3 All 14 Bits Offset error OE1, 2, 3 All -10 +10 mV M,D,P,L,R 1 02 -10 +10 M,D,P,L 1 03 -10 +10 Gain error AE1, 2, 3 01 -10 +10 %FS 1 02, 03 -10 +10 2,3 -14 +14 M,D,P,L,R

40、1 02 -10 +10 M,D,P,L 1 03 -10 +10 Analog supply current IAVCCAVCC= 5.0 V 1, 2, 3 All 320 mA M,D,P,L,R 1 02 320 M,D,P,L 1 03 320 Digital supply current IDVCCDVCC= 3.3 V 1, 2, 3 All 45 mA M,D,P,L,R 1 02 45 M,D,P,L 1 03 45 Power consumption PD4/ 1, 2, 3 All 1.75 W Differential input voltage VDIFF5/ 1,

41、2, 3 01 0.4 Vp-p Output voltage, logic “1” VOHDVCC= 3.3 V, IOH= 0 5/ 1, 2, 3 01 2.85 V DVCC= 3.3 V, IOH= 0 4/ 02, 03 2.8 Output voltage, logic “0” VOLDVCC= 3.3 V, IOL= 0 5/ 1, 2, 3 01 0.5 V DVCC= 3.3 V, IOL= 0 4/ 02, 03 0.5 No missing codes 4/ 4,5,6 02, 03 0 0 See footnotes at end of table. Provided

42、 by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-04230 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 7 DSCC FORM 2234 APR 97 TABLE IA. Electrical performance characteristics continued. Test Sy

43、mbol Conditions 1/ 2/ 3/ AVCC= 5 V, DVCC= 3.3 V, fc = 80 MSPS Group A subgroups Device type Limits Unit unless otherwise specified Min Max Differential non-linearity DNL 6/ 4,5 02, 03 -1 1.5 LSB 6 -1 2.0 M,D,P,L,R 4 02 -1 1.5 M,D,P,L 4 03 -1 1.5 Signal to noise ratio (SNR) at -1 dBFS SNR 70.1 MHz 4/

44、 6/ 4, 5, 6 01 68.5 dB 150.1 MHz 4/ 6/ 67 30 MHz 4/ 6/ 4,5 02, 03 72 6 70.5 70 MHz 4/ 6/ 4,5 71.5 6 70 Signal to noise ratio and distortion (SINAD) at -1 dBFS SINAD 70.1 MHz 4/ 6/ 4, 5, 6 01 68 dB 150.1 MHz 4/ 6/ 65 30 MHz 4/ 6/ 4,5 02, 03 71.5 6 70 70 MHz 4/ 6/ 4,5 71 6 69.5 Spurious free dynamic r

45、ange (SFDR) at -1 dBFS SFDR 70.1 MHz 4/ 6/ 4, 5, 6 01 76 dBc 150.1 MHz 4/ 6/ 67 Worst case second or third harmonic at -1 dBFS 2nd or 30 MHz 4/ 6/ 4 02, 03 82 dB 3rd 5 80 6 79 70 MHz 4/ 6/ 4 82 5 80 6 79 Worst case fourth or higher harmonic at -1 dBFS 4 th 30 MHz 4/ 6/ 4,5 02, 03 84 dB plus 6 80 70

46、MHz 4/ 6/ 4,5 84 6 80 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-04230 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 8 DSCC FORM 2234 APR 97 TABLE

47、IA. Electrical performance characteristics - continued. Test Symbol Conditions 1/ 2/ 3/ AVCC= 5 V, DVCC= 3.3 V, fc = 80 MSPS Group A subgroups Device type Limits Unit unless otherwise specified Min Max Two tone intermodulation distortion (IMD) rejection IMDR At -7 dBFS, F1, F2 4/ 6/ 7/ 4, 5, 6 01 75

48、.5 dBc ENCODE pulse width HIGH tENCH4/ 5/ 8/ 9, 10, 11 All 5.625 ns ENCODE pulse width LOW tENCL4/ 5/ 8/ 9, 10, 11 All 5.625 ns Encode rising to dataready falling tDR4/ 5/ 9, 10, 11 All 1.0 3.1 ns Encode rising to dataready rising tE_DR50% duty cycle 4/ 5/ 9, 10, 11 All 7.3 9.4 ns ENCODE to DATA falling low tE_FL4/ 5/ 9, 10, 11 All 2.4 7.0 ns ENCODE to DATA rising low tE_RL4/ 5/ 9, 10, 11 All 1.4 4.7 ns ENCODE to DATA delay (hold time) tH_E4/ 5/ 9, 10, 11 All 1.4 4.7 ns ENCODE to DATA delay (se