ImageVerifierCode 换一换
格式:PDF , 页数:12 ,大小:110.13KB ,
资源ID:698636      下载积分:10000 积分
快捷下载
登录下载
邮箱/手机:
温馨提示:
快捷下载时,用户名和密码都是您填写的邮箱或者手机号,方便查询和重复下载(系统自动生成)。 如填写123,账号就是123,密码也是123。
特别说明:
请自助下载,系统不会自动发送文件的哦; 如果您已付费,想二次下载,请登录后访问:我的下载记录
支付方式: 支付宝扫码支付 微信扫码支付   
验证码:   换一换

加入VIP,免费下载
 

温馨提示:由于个人手机设置不同,如果发现不能下载,请复制以下地址【http://www.mydoc123.com/d-698636.html】到电脑端继续下载(重复下载不扣费)。

已注册用户请登录:
账号:
密码:
验证码:   换一换
  忘记密码?
三方登录: 微信登录  

下载须知

1: 本站所有资源如无特殊说明,都需要本地电脑安装OFFICE2007和PDF阅读器。
2: 试题试卷类文档,如果标题没有明确说明有答案则都视为没有答案,请知晓。
3: 文件的所有权益归上传用户所有。
4. 未经权益所有人同意不得将文件中的内容挪作商业或盈利用途。
5. 本站仅提供交流平台,并不能对任何下载内容负责。
6. 下载文件中如有侵权或不适当内容,请与我们联系,我们立即纠正。
7. 本站不保证下载资源的准确性、安全性和完整性, 同时也不承担用户因使用这些下载资源对自己和他人造成任何形式的伤害或损失。

版权提示 | 免责声明

本文(DLA SMD-5962-79018 REV D-2012 MICROCIRCUIT MEMORY DIGITAL CMOS 128 X 8-BIT RANDOM ACCESS MEMORY (RAM) MONOLITHIC SILICON.pdf)为本站会员(arrownail386)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA SMD-5962-79018 REV D-2012 MICROCIRCUIT MEMORY DIGITAL CMOS 128 X 8-BIT RANDOM ACCESS MEMORY (RAM) MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Page 2 Deleted 1/ ref to IOS. Page 13 Corrected P/N. 79-07-23 D. R. Cool B Changes in accordance with NOR 5962-R158-96 96-06-26 M. A. Frye C Boilerplate update, part of 5 year review. REDRAWN ksr 06-03-16 Raymond Monnin D Updated body of drawing

2、to meet current requirements. - glg 12-06-22 Charles F. Saffle CURRENT CAGE CODE 67268 THE ORIGINAL FIRST SHEET OF THIS DRAWING HAS BEEN REPLACED REV SHEET REV SHEET REV STATUS REV D D D D D D D D D D D OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PREPARED BY A. J. Foley DLA LAND AND MARITIME ST

3、ANDARD MICROCIRCUIT DRAWING CHECKED BY C. R. Jackson COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY N. A. Hauck MICROCIRCUIT, MEMORY, DIGITAL, CMOS 128 X 8-BIT RANDOM ACCESS MEMORY (RAM), MONOLITHIC SILICON AND AGENCIES OF

4、 THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 79-06-12 AMSC N/A REVISION LEVEL D SIZE A CAGE CODE 14933 79018 SHEET 1 OF 11 DSCC FORM 2233 APR 97 5962-E403-12 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 790

5、18 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number

6、 (PIN). The complete PIN is as shown in the following example: 79018 01 J A Drawing number Device type (see 1.2.1) Case outline (see 1.2.2) Lead finish (see 1.2.3) 1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 1823SD

7、 128 x 8 CMOS RAM 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style J GDIP1-T24 or CDIP2-T24 24 Dual-in-line package 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix

8、A. 1.3 Absolute maximum ratings. Supply voltage range -0.5 Vdc to +18 Vdc Input voltage range . -0.5 Vdc to VDD+0.5 Vdc Storage temperature range . -65C to +150C Maximum power dissipation (PD) . 500 mW 1/ Lead temperature (soldering, 10 seconds) . +300C Thermal resistance, junction-to-case (JC): Cas

9、e J . See MIL-STD-1835 Junction temperature (TJ. +175C 1.4 Recommended operating conditions. Supply voltage . +3.0 Vdc to +15 Vdc Ambient operating temperature range (TA) . -55C to +125C 1/ For TA= +100 to +125 C, derate linearly at 12mW/C to 200 mW. Provided by IHSNot for ResaleNo reproduction or n

10、etworking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 79018 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, stan

11、dards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification fo

12、r. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of

13、these documents are available online at https:/assist.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited her

14、ein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A f

15、or non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product i

16、n accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function

17、of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dime

18、nsions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.2 Truth table. The truth table shall be as specified on figure 2. 3.2.3 Logic diagram. The logic diagram shall be as specified on figure 3

19、. 3.2.4 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full ambient operating temperature range.

20、3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed i

21、n 1.2 herein. In addition, the manufacturers PIN may also be marked. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certificati

22、on mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 79018 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 4

23、 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ Group A Limits Unit subgroups Min Max High-level output VOH VDD= 5 V VIN= 0 or VDD 1, 2, 3 4.5 V voltage 2/ VDD= 10 V 9.5 Low-level output VOL VDD= 5 V VIN= 0 or VDD 1, 2, 3 0.5 V voltage 3/ VDD= 10 V 0

24、.5 Output drive current IDN VDD= 5 V VO= 0.4 V 1, 2, 3 1.65 mA N channel (sink) 4/ VDD= 10 V VO= 0.5 V 3.6 Output drive current IDP VDD= 5 V VO= 4.6 V 1, 2, 3 -0.8 mA P channel (source) 4/ VDD= 10 V VO= 9.5 V -1.8 Input leakage current IIL VDD= 10 V 1, 2, 3 10 IIH A Quiescent current IDD VDD= 10 V 1

25、, 2, 3 1 mA 6/ 3-state output leakage IOUT VDD= 10 V 1, 2, 3 30 A current 7/ Input capacitance CIN 4 7.5 pF VIN= 0 V TA= 25C Functional test See 4.4.1(d) 7 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 79018 DLA

26、 LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions Group A subgroups Limits Units Min Max Access time from address ta(ad)CL= 50 pF 10% tr,tf= 10 ns 5% VDD= 5V TA = 25C , -55C

27、9, 11 600 ns VDD= 5V TA = 125C 10 840 VDD= 10V TA = 25C , -55C 9, 11 315 VDD= 10V TA = 125C 10 440 Access time from chip select ta( cs )VDD= 5V TA = 25C , -55C 9, 11 230 VDD= 5V TA = 125C 10 320 VDD= 10V TA = 25C , -55C 9, 11 140 VDD= 10V TA = 125C 10 195 Output active from MRD tamVDD= 5V TA = 25C ,

28、 -55C 9, 11 230 VDD= 5V TA = 125C 10 320 VDD= 10V TA = 25C , -55C 9, 11 140 VDD= 10V TA = 125C 10 195 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 79018 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION

29、LEVEL D SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions Group A subgroups Limits Units Min Max Pulse width, write tw(wr)CL= 50 pF 10% tr. tf= 10 ns 5% VDD= 5V TA = 25C , -55C 9, 11 260 ns VDD= 5V TA = 125C 10 360 VDD= 10V TA = 25C , -

30、55C 9, 11 135 VDD= 10V TA = 125C 10 190 Data in setup time tsu(DI)VDD= 5V TA = 25C , -55C 9, 11 260 VDD= 5V TA = 125C 10 360 VDD= 10V TA = 25C , -55C 9, 11 135 VDD= 10V TA = 125C 10 190 Data in hold time th(DI)VDD= 5V TA = 25C , -55C 9, 11 90 VDD= 5V TA = 125C 10 125 VDD= 10V TA = 25C , -55C 9, 11 5

31、0 VDD= 10V TA = 125C 10 70 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 79018 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance chara

32、cteristics - Continued. Test Symbol Conditions Group A subgroups Limits Units Min Max Chip select setup time tsu( cs )CL= 50 pF 10% tr. tf= 10 ns 5% VDD= 5V TA = 25C , -55C 9, 11 360 ns VDD= 5V TA = 125C 10 505 VDD= 10V TA = 25C , -55C 9, 11 200 VDD= 10V TA = 125C 10 280 Address setup time tsu(ad)VD

33、D= 5V TA = 25C , -55C 9, 11 250 VDD= 5V TA = 125C 10 350 VDD= 10V TA = 25C , -55C 9, 11 130 VDD= 10V TA = 125C 10 180 Address hold time th(ad)VDD= 5V TA = 25C , -55C 9, 11 90 VDD= 5V TA = 125C 10 125 VDD= 10V TA = 25C , -55C 9, 11 50 VDD= 10V TA = 125C 10 125 Provided by IHSNot for ResaleNo reproduc

34、tion or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 79018 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 8 DSCC FORM 2234 APR 97 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in orde

35、r to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and th

36、e requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DLA Land and Maritime-VA shall be required fo

37、r any change that affects this drawing. 3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritimes agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at

38、 the option of the reviewer. 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality

39、conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, D, or E. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring

40、activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II he

41、rein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. 4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 5005 of MIL-STD-883 including groups A, B, C, and D inspections. The following ad

42、ditional criteria shall apply. 4.3.1 Group A inspection. a. Tests shall be as specified in table II herein. b. Subgroups 5, 6, and 8 in table I, method 5005 of MIL-STD-883 shall be omitted. c. Subgroup 4 (CINmeasurement) shall be measured only for initial qualification and after any process or desig

43、n changes which may affect input or output capacitance. Capacitance shall be measured between the designated terminal and GND at a frequency of 1 MHz. Sample size is 15 devices with no failures, and all input and output terminals tested. d. Subgroups 7 shall include verification of the truth table.

44、4.3.2 Groups C and D inspections. a. End-point electrical parameters shall be as specified in table II herein. b. Steady-state life test conditions, method 1005 of MIL-STD-883. (1) Test condition D or E. The test circuit shall be maintained by the manufacturer under document revision level control a

45、nd shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of MIL-STD-883. (2) TA= +125C, minimum. (3) Test duration: 1,000 ho

46、urs, except as permitted by method 1005 of MIL-STD-883.Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 79018 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 9 DSCC FORM 2234 APR 97 Device Type 01 Case Outline J Terminal Number Terminal Symbol 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 BUS 0 BUS 1 BUS 2 BUS 3 BUS 4 BUS 5 BUS 6 BUS 7 CS1 2CS3CS VSSCS4 5CS MRD MWR MA6 MA5 MA4 MA3 MA2 MA1 MA0 VDDFIGURE 1. Terminal connections. Provided by IH

copyright@ 2008-2019 麦多课文库(www.mydoc123.com)网站版权所有
备案/许可证编号:苏ICP备17064731号-1