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本文(DLA SMD-5962-88666-1988 MICROCIRCUITS DIGITAL BIPOLAR INTERRUPT HANDLER MONOLITHIC SILICON《硅单片中断处理程序双极数字微电路》.pdf)为本站会员(eastlab115)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA SMD-5962-88666-1988 MICROCIRCUITS DIGITAL BIPOLAR INTERRUPT HANDLER MONOLITHIC SILICON《硅单片中断处理程序双极数字微电路》.pdf

1、- DESC-DWG-BBhhb 57 W 7777775 0013778 3 REVISIONS DESCRIPTION SHEET * l- REV STATUS OF SHEET PMIC N/A STANDARDIZED MILITARY DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPAKIMENTC AND AGENCIES OF WE DEPARTMENT OF DEFENSE AMSC NIA DESC FORM 193 SEP 87 DATE (YR-W-DA) APPROVED I PREPARED BY DEFENS

2、E ELECTRONICS SUPPLY CENTER DAYlON, OHIO 45444 7 HNDLER, MONOLITHIC SILLCON I 10 JUNE 1988 5962- 88666 REVISION LEVEL OF 20 SHEET i DISTRIBUTION STATEMENT A. Approved for publlc release: dislrlbullon is unlimiled. 7-62 -33 Provided by IHSNot for ResaleNo reproduction or networking permitted without

3、license from IHS-,-,- - DESC-DWG-sbbb 59 W 7797775 0013779 5 W STANDARDIZED MILITARY DRAWING Y“rr.J .“I “3 I .“J“. (Vcc) - - - - - - - - - - - - - - - - - - - - 4.5 V dc to 5.5 V dc (V, ) - - - - - - - - - - - - . - - - - - - - 1.35 V dc to 1.65 V dc High !eve1 input voltage (VI 1- - - - - - - - - -

4、 - Low level input voltage (VI,! - - - - - - - - - - - Low level output current - - - - - - -_- - - - - - High level output current - - - - - - - - - - - - - Case operating temperature range (Tc) - - - - - - - 2.0 V to Vcc 0.8 V dc maximum 8.0 m4 -3.8 MA -55 C to +125C SIZE A 5962-88666 r must withs

5、tand the added PD due to short circuit test; e.g., 10s. DEFENCE ElfX“ICS SUPPLY CENEFI SHEET I R“, OHi 45444 IESC FORM 193A SEP 87 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DESC-DWG-bbb 57 = 7777795 OOL3780 L W 2. APPLICABLE DOCUMENTS 2.1 Gover

6、nment specification and standard. Unless otherwise specified, the following specification and standard, of the issue listed in that issue of the Department of Defense Index of Specifications and Standards specified in the solicitation, form a part of this drawing to the extent specified herein. SPEC

7、 IF ICATION MILITARY MI L-M-38510 - Microcircuits, General Specification for. STANDARD MI L ITARY MIL-STD-883 - Test Methods and Procedures for Microelectronics. (Copies of the specification and standard required by manufacturers in connection with specific acquisition functions should be obtained f

8、rom the contracting activity or as directed by the contracting activity. 1 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing shall take precedence. 3. REQUIREMENTS 3.1 Item re uirements. The individual item

9、requirements shall be in accordance with 1.2.1 of MIL-STDm, “f z ! i -i c 1 r- w cr: Li- H Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,- - - _ DESC-DWG-bbb 59 W 9994975 00113793 T W ti a L 2 z Y u o el 2 E Y U A. c -1 O 1 t r I 1. 1 Provided by IH

10、SNot for ResaleNo reproduction or networking permitted without license from IHS-,-,- F DESC-DWG-bbb 57 7777775 003377LI I 3.7 Notification of change. Notification of change to DESC-ECS shall be required in accordance rith MIL-STD-883 (see 3.1 herein). 3.8 Verification and review. DESC, DESCs agent,

11、and the acquiring activity retain the option to .eview the manufacturers facility and applicable required documentation. Offshore documentation ;hall be made available onshore at the option of the reviewer. 4. QUALITY ASSURANCE PROYISIONS 4.1 Sampling and inspection. Sampling and inspection procedur

12、es shall be in accordance with iection 4 of MIL-M-38510 to the extent specified in MIL-STD-883 (see 3.1 herein). 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be :onducted on al 1 devices prior to quality conformance inspection. The following additional c

13、riteria ;hall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A using the circuit submitted with the certificate of compliance (see 3.5 herein) 4.3.1 a. b. CI 4.3.2 a. b. (2) TA = +125OC, minimum. Interim and final electrical test parameters shall be as specified in table II h

14、erein, except interim eiectrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. 4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with b. iethod -5005 of MIL-STD-883 including groups A, B, C, and D inspections. The followi

15、ng additional riteria shall apply. Group A inspection. Tests shall be as specified irr table II herein. Subgroups 4, 5, and 6 in table, I, method 5005 of MIL-STD-883 shall be omitted. Subgroups 7 and 8 functional testing shall include verification of the functionality of the device. These tests form

16、 a part of the vendors test tape and shall be maintained and available from the approved sources of supply. Groups C and D inspections. End-point electrical parameters shall be as specified in table II herein. Steady-state 1 ife test conditions, method 1005 of MIL-STD-883. (1) Test condition A using

17、 the circuit submitted with the certificate of compliance (see 3.5 herein) (2) TA = +125OC, minimum. (3) Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883. CIZE 5962-88666 A STANDARDIZED MILITARY DRAWING SHEET 17 DEFENSE UECTRONKS SUPPLY CENTR DAYTON, OHfO 45444 REVISON L

18、EVEL t U. 5. GOVERNMENT PRINTING WE: i8-54B9M ESC FORM 193A SEP 87 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DESC-DWG-bbb 59 6 9979995 OOL3795 3 W 5. PACKAGING TABLE II. Electrical test requirements. I MIL-STD-883 test requirements I (per metho

19、d I I I 5005, table I) I 1 Subgroups I I u, g/ I I I I J I (method 5004) I I I Interim electrical parameters I 1 I 1 I I I Final electrical test parameters I 1*,2,3,7,8,9, I I I I I (method 5004) I 10,11 I I I I i Group A test requirements i 123789 i I I I (method 5005) I 6,h I I I I I I I I i Group

20、s C and D end-point I electrical arameters I (method 5Oh . 1 I 1,2,3 I I I I I i/ (*) PDA applies to subgroup 1. z/ Any subgroup at the same temperature may be combined using a multifunctlon tester. 5.1 Packaging requirements. The requirements for packaging shall be in accordance with IIL-M-38510, 6

21、. NOTES 6.1 Intended use, Microcircuits conforming to this drawing are intended for use when military ;pecifications do not exist and qualified military devices that will perform the required function ire not available for OEM application. When a military specification exists a:rd the product covere

22、d by this drawing has been qualified for listing on QPL-38510, the device specified herein will be inactivated and will not be used for new design. The QPL-38510 product shall be the preferred item or all applications. 6.2 Re laceabilit , Microcircuits covered by this drawing will replace the same g

23、eneric device :overe d+-+ y a con ractor-prepared specification or drawing. 6.3 Comnents, Comnentc on this drawing should be directed to DESC-ECS, Dayton, Ohio 45444, or :el ephoK5f37?96-5375, 81zE A 5962-88666 STANDARDIZED MILTTAW DRAWING IESC FORM 193A SEP a7 Provided by IHSNot for ResaleNo reprod

24、uction or networking permitted without license from IHS-,-,-,=. -I - DESC-DWG-bbb 57 a 7777775 001377b 5 a 6.4 Pin descriptions. I. Mnemonic I Pin NO. I Type I I I I VBB I I I DO-D7 I IRQlN-IRQ7N I LDTACKN I I I I I I I I I IACKDSN I I I I Al-A3 i I IPLON-IPLLN I I I I GND I I BIACKN I I I LRQlN-LRQ

25、GN I I I vcc I RESETN I I NMIN I CLK I CSDSN I I I I 39,40, 1 2-6 I l5 I I 7-14 I I I I 16 I I I I I I l7 II Io II I I I I/O I I I I I II I I I I I Io I I I 18,19,22 I I I I I 1 20 Io I 23-25 I 26 I Io II II II II II I I I I I I I I I 27-30,32,1 I I 33 I I I I 31 I I 34 I I35 II I I I I I 36 I I I I

26、 37 I I 38 I I I Name and function Supply Vol tage: Supply vol tage for internal gates. Bus Interrupt Request: Active low inputs for bus generated interrupts. Bus Data: Three-state local data bus. Local Data Transfer Acknowledge: Active low, open collector output, indicates that valid data is availa

27、ble on the local data bus during interrupt acknowledge cycle or data transfer cycle. Interrupt Acknowledge: Active 1 ow interrupt acknowledge input from the local master. This signal must be qualified by the local masters data strobe prior to input. Local Interrupt Acknowledge: Active low interrupt

28、acknowledge totem pole output to the local interrupting devices. Address Lines: Address inputs from local master. Ground Interrupt Priority Level: Active low totem pole outputs to the local master.The priority level of the interrupt request is encoded on these outputs. Bus Interrupt Acknowledge: .Ac

29、tive low interrupt acknowledge totem-pol e outputs to the system bus, Local Interrupt Request: User can define the active state of these outputs. Supply Voltage: +5V power supply. Reset: Active low input reset. Read/Write: This signal specifies the data transfer cycle to be either read or write. Non

30、-Maskable Interrupt: Active 1 ow highest priority interrupt. Clock: Clock input (typically CPU clock). Chip Select: Active low chip select input for register I/O. This input must be qualified by the local masters data strobe prior to input. STANDAR MILITARY D SIZE 5962-88666 A IIZED 3AWING DEFENSE E

31、LECTRONICS SUPPLY CEMER REVISION LEVEL SHEET 19 I DAYTON, OHIO SEP 87 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-I SIZE A STANDARDIZED Vendor CAGE number 18324 59 62 - 88666 Vendor name and address Si gnetics Corporati on 4130 South Market Court , Sacramento, CA 95834 h Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-

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