ImageVerifierCode 换一换
格式:PDF , 页数:17 ,大小:111.19KB ,
资源ID:699471      下载积分:10000 积分
快捷下载
登录下载
邮箱/手机:
温馨提示:
如需开发票,请勿充值!快捷下载时,用户名和密码都是您填写的邮箱或者手机号,方便查询和重复下载(系统自动生成)。
如填写123,账号就是123,密码也是123。
特别说明:
请自助下载,系统不会自动发送文件的哦; 如果您已付费,想二次下载,请登录后访问:我的下载记录
支付方式: 支付宝扫码支付 微信扫码支付   
注意:如需开发票,请勿充值!
验证码:   换一换

加入VIP,免费下载
 

温馨提示:由于个人手机设置不同,如果发现不能下载,请复制以下地址【http://www.mydoc123.com/d-699471.html】到电脑端继续下载(重复下载不扣费)。

已注册用户请登录:
账号:
密码:
验证码:   换一换
  忘记密码?
三方登录: 微信登录  

下载须知

1: 本站所有资源如无特殊说明,都需要本地电脑安装OFFICE2007和PDF阅读器。
2: 试题试卷类文档,如果标题没有明确说明有答案则都视为没有答案,请知晓。
3: 文件的所有权益归上传用户所有。
4. 未经权益所有人同意不得将文件中的内容挪作商业或盈利用途。
5. 本站仅提供交流平台,并不能对任何下载内容负责。
6. 下载文件中如有侵权或不适当内容,请与我们联系,我们立即纠正。
7. 本站不保证下载资源的准确性、安全性和完整性, 同时也不承担用户因使用这些下载资源对自己和他人造成任何形式的伤害或损失。

版权提示 | 免责声明

本文(DLA SMD-5962-89551 REV B-2009 MICROCIRCUIT DIGITAL ADVANCED CMOS DUAL J-K POSITIVE EDGE-TRIGGERED FLIPFLOP MONOLITHIC SILICON.pdf)为本站会员(twoload295)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA SMD-5962-89551 REV B-2009 MICROCIRCUIT DIGITAL ADVANCED CMOS DUAL J-K POSITIVE EDGE-TRIGGERED FLIPFLOP MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add vendor CAGE F8859. Add device class V criteria. Correct data limits in paragraph 1.3. Add case outline X. Add table III, delta limits. Update boilerplate to MIL-PRF-38535 requirements jak. 01-07-27 Thomas M. Hess B Update boilerplate paragrap

2、hs to the current MIL-PRF-38535 requirements. - LTG 09-05-01 Thomas M. Hess REV SHET REV B B SHET 15 16 REV STATUS REV B B B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Marcia B. Kelleher CHECKED BY Ray Monnin DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, O

3、HIO 43218-3990 http:/www.dscc.dla.mil APPROVED BY Michael A. Frye STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 89-02-06 MICROCIRCUIT, DIGITAL, ADVANCED CMOS, DUAL J-K POSITIVE EDGE-TRIGGERED FLIP- F

4、LOP, MONOLITHIC SILICON AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-89551 SHEET 1 OF 16 DSCC FORM 2233 APR 97 5962-E288-09 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89551 DEFENSE SUPPLY CENTER

5、 COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes

6、 are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following examples. For device classes M and Q: 5962 - 89551 01 E A Federal stock class designa

7、tor RHA designator (see 1.2.1) Device type (see 1.2.2)Case outline (see 1.2.4)Lead finish (see 1.2.5) / / Drawing number For device class V: 5962 - 89551 01 V X A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2.4) Lead fin

8、ish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and

9、 are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54AC109 Dual J-K positive edge-triggered flip-flop 1.2.3 Device class designator.

10、The device class designator is a single letter identifying the product assurance level as listed below. Since the device class designator has been added after the original issuance of this drawing, device classes M and Q designators will not be included in the PIN and will not be marked on the devic

11、e. Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outlin

12、e(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 Dual-in-line F GDFP2-F16 or CDFP3-F16 16 Flat pack X CDFP4-F16 16 Flat pack 2 CQCC1-N20 20 Square leadless chip carrier 1.2.5 Lead finish. The lead finish

13、is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89551 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO

14、 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VCC) -0.5 V dc to +7.0 V dc DC input voltage range (VIN) -0.5 V dc to VCC+0.5 V dc DC output voltage range (VOUT) . -0.5 V dc to VCC+0.5 V dc Input clamp current (IIK) (VINVCC). 20

15、 mA Output clamp current (IOK) (VOUTVCC) . 20 mA Continuous output current (IOUT) (VOUT= 0.0 to VCC) 25 mA Continuous current through VCCor GND 50 mA Storage temperature range (TSTG) . -65C to +150C Maximum power dissipation (PD): 500 mW Lead temperature (soldering, 10 seconds). +260C Thermal resist

16、ance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) +175C 1.4 Recommended operating conditions. 2/ Supply voltage range (VCC) +3.0 V dc to +6.0 V dc 4/ Case operating temperature range (TC) -55C to +125C Input voltage range (VIN) 0.0 V dc to VCCOutput voltage range (VOUT). 0.0 V

17、 dc to VCCInput rise or fall time (tr, tf): VCC= 3.6 V to 5.5 V . 0 to 8.0 ns/V Minimum setup time, Jn, Kn, to CPn (ts): TC= +25C, VCC= 3.0 V 6.5 ns TC= +25C, VCC= 4.5 V 4.5 ns TC= -55C to +125C, VCC= 3.0 V 8.0 ns TC= -55C to +125C, VCC= 4.5 V 5.5 ns Minimum hold time, Jn or Kn to CPn (th): TC= +25C

18、, VCC= 3.0 V 0.0 ns TC= +25C, VCC= 4.5 V 0.5 ns TC= -55C to +125C, VCC= 3.0 V 0.0 ns TC= -55C to +125C, VCC= 4.5 V 0.5 ns Minimum pulse width CPn, (tW): TC= +25C, VCC= 3.0 V 5.0 ns TC= +25C, VCC= 4.5 V 5.0 ns TC= -55C to +125C, VCC= 3.0 V 5.5 ns TC= -55C to +125C, VCC= 4.5 V 5.0 ns Minimum pulse wid

19、th CDn or SDn, (tW): TC= +25C, VCC= 3.0 V 6.0 ns TC= +25C, VCC= 4.5 V 5.0 ns TC= -55C to +125C, VCC= 3.0 V 8.0 ns TC= -55C to +125C, VCC= 4.5 V 5.5 ns Minimum recovery time CDn, SDn to CPn (trec): TC= +25C, VCC= 3.0 V 0.5 ns TC= +25C, VCC= 4.5 V 0.5 ns TC= -55C to +125C, VCC= 3.0 V 0.5 ns TC= -55C t

20、o +125C, VCC= 4.5 V 0.5 ns Maximum frequency CPn, (fMAX): TC= +25C, VCC= 3.0 V 85 MHz TC= +25C, VCC= 4.5 V 95 MHz TC= -55C to +125C, VCC= 3.0 V 65 MHz TC= -55C to +125C, VCC= 4.5 V 95 MHz 1/ Unless otherwise noted, all voltages are referenced to GND. 2/ The limits for the parameters specified herein

21、 shall apply over the full specified VCCrange and case temperature range of -55C to +125C. 3/ Maximum junction temperature shall not be exceeded except for allowable short duration burn-in screening conditions in accordance with method 5004 of MIL-STD-883. 4/ Operation from 2.0 V dc to 3.0 V dc is p

22、rovided for compatibility with data retention and battery backup systems. Data retention implied no input transitions and no stored data loss with the following condition: VIH 70 percent VCC, VIL 30 percent VCC, VOH 70 percent VCCat 20 A, VOL 30 percent VCCat 20 A.Provided by IHSNot for ResaleNo rep

23、roduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89551 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The f

24、ollowing specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturi

25、ng, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microc

26、ircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s) form a part of this do

27、cument to the extent specified herein. Unless otherwise specified, the issues of these documents cited in the solicitation or contract. ELECTRONIC INDUSTRIES ALLIANCE (EIA) JEDEC Standard No. 20 - Standard for Description of 54/74ACXXXXX and 54/74ACTXXXXX Advanced High-Speed CMOS Devices. (Copies of

28、 these documents are available online at http:/www.jedec.org or from Electronic Industries Alliance, 2500 Wilson Boulevard, Arlington, VA 22201-3834). 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes

29、precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herei

30、n or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class leve

31、l B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlines. The

32、case outlines shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switch

33、ing waveforms and test circuit. The switching waveforms and test circuit shall be as specified in figure 4. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89551 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO

34、43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply ov

35、er the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In ad

36、dition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. M

37、arking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535.

38、The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.

39、6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this dr

40、awing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device class

41、es Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving device

42、s acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore do

43、cumentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 38 (see MIL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo reproduction or n

44、etworking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89551 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test and MIL-STD-883 test method 1/ Symbol VCCGrou

45、p A subgroups Limits 3/ Unit Test conditions 2/ -55C TC +125C +3.0 V VCC +5.5 V unless otherwise specified Device type and device class Min Max Positive input clamp voltage 3022 VIC+For input under test IIN= 1.0 mA V All 0.0 V 1 0.4 1.5 V Negative input clamp voltage 3022 VIC-For input under test II

46、N= -1.0 mA V All Open 1 -0.4 -1.5 V 3.0 V 1, 2, 3 2.9 4.5 V 1, 2, 3 4.4 VIN= VIHminimum or VILmaximum IOH= -50 A All All 5.5 V 1, 2, 3 5.4 VIN= VIHminimum or VILmaximum, IOH= -12 mA All All 3.0 V 1, 2, 3 2.40 4.5 V 1, 2, 3 3.70 VIN= VIHminimum or VILmaximum, IOH= -24 mA All All 5.5 V 1, 2, 3 4.70 Hi

47、gh level output voltage 3006 VOH 4/ VIN= VIHminimum or VILmaximum, IOH= -50 mA All All 5.5 V 1, 2, 3 3.85 V 3.0 V 1, 2, 3 0.1 4.5 V 1, 2, 3 0.1 VIN= VIHminimum or VILmaximum IOL= 50 A All All 5.5 V 1, 2, 3 0.1 VIN= VIHminimum or VILmaximum, IOL= 12 mA All All 3.0 V 1, 2, 3 0.50 4.5 V 1, 2, 3 0.50 VI

48、N= VIHminimum or VILmaximum, IOL= 24 mA All All 5.5 V 1, 2, 3 0.50 Low level output voltage 3007 VOL 4/ VIN= VIHminimum or VILmaximum, IOL= 50 mA All All 5.5 V 1, 2, 3 1.65 V 3.0 V 1, 2, 3 2.1 4.5 V 1, 2, 3 3.15 High level input voltage VIH5/ All All 5.5 V 1, 2, 3 3.85 V 3.0 V 1, 2, 3 0.9 4.5 V 1, 2, 3 1.35 Low level input voltage VIL5/ All All 5.5 V 1, 2, 3 1.65 V Input leakage current low 3010 IILVIN= 0.0 V All All 5.5 V 1, 2, 3 -1.0 A Input leakage current high 3009 IIHVIN= 5.5 V All All 5.5 V 1, 2, 3 1.0 A Quiescent supply current, output high 30

copyright@ 2008-2019 麦多课文库(www.mydoc123.com)网站版权所有
备案/许可证编号:苏ICP备17064731号-1