ImageVerifierCode 换一换
格式:PDF , 页数:18 ,大小:220.23KB ,
资源ID:700178      下载积分:10000 积分
快捷下载
登录下载
邮箱/手机:
温馨提示:
如需开发票,请勿充值!快捷下载时,用户名和密码都是您填写的邮箱或者手机号,方便查询和重复下载(系统自动生成)。
如填写123,账号就是123,密码也是123。
特别说明:
请自助下载,系统不会自动发送文件的哦; 如果您已付费,想二次下载,请登录后访问:我的下载记录
支付方式: 支付宝扫码支付 微信扫码支付   
注意:如需开发票,请勿充值!
验证码:   换一换

加入VIP,免费下载
 

温馨提示:由于个人手机设置不同,如果发现不能下载,请复制以下地址【http://www.mydoc123.com/d-700178.html】到电脑端继续下载(重复下载不扣费)。

已注册用户请登录:
账号:
密码:
验证码:   换一换
  忘记密码?
三方登录: 微信登录  

下载须知

1: 本站所有资源如无特殊说明,都需要本地电脑安装OFFICE2007和PDF阅读器。
2: 试题试卷类文档,如果标题没有明确说明有答案则都视为没有答案,请知晓。
3: 文件的所有权益归上传用户所有。
4. 未经权益所有人同意不得将文件中的内容挪作商业或盈利用途。
5. 本站仅提供交流平台,并不能对任何下载内容负责。
6. 下载文件中如有侵权或不适当内容,请与我们联系,我们立即纠正。
7. 本站不保证下载资源的准确性、安全性和完整性, 同时也不承担用户因使用这些下载资源对自己和他人造成任何形式的伤害或损失。

版权提示 | 免责声明

本文(DLA SMD-5962-92180 REV B-2013 MICROCIRCUIT DIGITAL ADVANCED CMOS OCTAL D-TYPE LATCH WITH THREE-STATE OUTPUTS MONOLITHIC SILICON.pdf)为本站会员(explodesoak291)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA SMD-5962-92180 REV B-2013 MICROCIRCUIT DIGITAL ADVANCED CMOS OCTAL D-TYPE LATCH WITH THREE-STATE OUTPUTS MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Update the boilerplate to current requirements as specified in MIL-PRF-38535. Editorial changes throughout. jak 06-10-02 Thomas M. Hess B Update the boilerplate paragraphs to current requirements as specified in MIL-PRF-38535. -jwc 13-02-25 Thoma

2、s M. Hess REV SHEET REV B B B SHEET 15 16 17 REV STATUS REV B B B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Thanh V. Nguyen DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING CHECKED BY Tha

3、nh V. Nguyen THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Monica L. Poelking MICROCIRCUIT, DIGITAL, ADVANCED CMOS, OCTAL D-TYPE LATCH WITH THREE-STATE OUTPUTS, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 94-02-18 AMSC N/A REVISION LEVEL B SI

4、ZE A CAGE CODE 67268 5962-92180 SHEET 1 OF 17 DSCC FORM 2233 APR 97 5962-E247-13 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92180 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2

5、DSCC FORM 2234 APR 97 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PI

6、N). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 92180 01 M R A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2) Device class designator Case outline (see

7、1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q, and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specifie

8、d RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54ACQ573 Octal D-type latch with three-state outputs 1.2.3 Device

9、class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PR

10、F-38535, appendix A Q, or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style R GDIP1-T20 or CDIP2-T20 20 Dual-in-line S GDFP2-F20 or CDFP3-F20 20

11、 Flat pack 2 CQCC1-N20 20 Square leadless chip carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q, and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-ST

12、ANDARD MICROCIRCUIT DRAWING SIZE A 5962-92180 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VCC) . -0.5 V dc to +7.0 V dc DC input voltage range (VIN) . -0.5 V dc to VCC + 0.5 V dc DC output

13、 voltage range (VOUT) -0.5 V dc to VCC+ 0.5 V dc DC input clamp current (IIK): VIN= -0.5 V . -20 mA VIN= VCC+ 0.5 V . +20 mA DC output clamp current (IOK): VOUT= -0.5 V . -20 mA VOUT= VCC+ 0.5 V +20 mA DC output current (IOUT) (per output pin) . 50 mA DC VCCor GND current (ICC, IGND) (per pin) 50 mA

14、 Storage temperature range (TSTG) -65C to +150C Maximum power dissipation (PD) . 500 mW Lead temperature (soldering, 10 seconds) . +300C Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Junction temperature (TJ) . +175C 1.4 Recommended operating conditions. 2/ 3/ Supply voltage range (VCC)

15、 . +2.0 V dc to +6.0 V dc Input voltage range (VIN) . 0.0 V to VCCOutput voltage range (VOUT) 0.0 V to VCCMinimum high level input voltage (VIH): VCC= 3.0 V . 2.1 V VCC= 4.5 V . 3.15 V VCC= 5.5 V . 3.85 V Maximum low level input voltage (VIL): VCC= 3.0 V . 0.9 V VCC= 4.5 V . 1.35 V VCC= 5.5 V . 1.65

16、 V Case operating temperature range (TC) -55C to +125C Minimum input edge rate (V/t): (VINfrom 0.3VCCto 0.7VCCor from 0.7VCCto 0.3VCC) 125 mV/ns Maximum high level output current (IOH): VCC= 3.0 V . -12 mA VCC= 4.5 V . -24 mA Maximum low level output current (IOL): VCC= 3.0 V . +12 mA VCC= 4.5 V . +

17、24 mA 1/ Stresses above the absolute maximum rating may cause permanent damage to the device, Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unless otherwise noted, all voltages are referenced to GND. 3/ The limits for the parameters specified herein shal

18、l apply over the full specified VCCrange and case temperature range of -55C to +125C. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92180 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHE

19、ET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in th

20、e solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPAR

21、TMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assistdla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Phil

22、adelphia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. JEDEC SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC

23、) JESD20 - Standard for Description of 54/74ACXXXX and 54/74ACTXXXX Advanced High-Speed CMOS Devices. (Copies of these documents are available online at http:/www.jedec.org or from JEDEC Solid State Technology Association, 3103 North 10th Street, Suite 240S, Arlington, VA 22201-2107) 2.3 Order of pr

24、ecedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requ

25、irements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described he

26、rein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL

27、-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The

28、 truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Ground bounce waveforms and test circuit. The ground bounce waveforms and test circuit shall be as specified on figure 4. 3.2.6 Switching waveforms and test circuit. The sw

29、itching waveforms and test circuit shall be as specified on figure 5. 3.3 Electrical performance characteristics and post irradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and post irradiation parameter limits are as specified in table I and

30、shall apply over the full case operating temperature range. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92180 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97

31、 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be mar

32、ked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in

33、 accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall

34、be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificat

35、e of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DLA Land and Maritime -VA prior to listing as an approved source of supply for this drawing shall affirm that the

36、 manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535

37、 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M notification to DLA Land and Maritime -VA of change of product (see 6.2 herein) involving devices acquired

38、 to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DLA Land and Maritime, DLA Land and Maritime s agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required d

39、ocumentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 38 (see MIL-PRF-38535, appendix A). Provided by IHSNot for R

40、esaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92180 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test and MIL-STD-883 test method 1

41、/ Symbol Test conditions 2/ -55C TC +125C +3.0 V VCC +5.5 V unless otherwise specified VCCGroup A subgroups Limits 3/ Unit Min Max High level output voltage 3006 VOHFor all inputs affecting output under test, VIN= VIHor VILFor all other inputs, VIN= VCCor GND IOH= -50 A 3.0 V 1, 2, 3 2.90 V 4.5 V 1,

42、 2, 3 4.40 5.5 V 1, 2, 3 5.40 IOH= -12 mA 3.0 V 1 2.56 2, 3 2.40 IOH= -24 mA 4.5 V 1 3.86 2, 3 3.70 5.5 V 1 4.86 2, 3 4.70 IOH= -50 mA 4/ 5.5 V 1, 2, 3 3.85 Low level output voltage 3007 VOLFor all inputs affecting output under test, VIN= VIHor VILFor all other inputs, VIN= VCCor GND IOL= 50 A 3.0 V

43、 1, 2, 3 0.10 V 4.5 V 1, 2, 3 0.10 5.5 V 1, 2, 3 0.10 IOL= 12 mA 3.0 V 1 0.36 2, 3 0.50 IOL= 24 mA 4.5 V 1 0.36 2, 3 0.50 5.5 V 1 0.36 2, 3 0.50 IOL= 50 mA 4/ 5.5 V 1, 2, 3 1.65 Positive input clamp voltage 3022 VIC+For input under test IIN= 18 mA 4.5 V 1, 2, 3 5.7 V Negative input clamp voltage 302

44、2 VIC-For input under test IIN= -18 mA 4.5 V -1.2 Input current high 3010 IIHFor input under test, VIN= 5.5 V For all other inputs, VIN= VCCor GND 5.5 V 1 0.1 A 2, 3 1.0 Input current low 3009 IILFor input under test, VIN= 0.0 V For all other inputs, VIN= VCCor GND 5.5 V 1 -0.1 A 2, 3 -1.0 Three-sta

45、te output leakage current, high 3021 IOZH5/ OE = VIHor GND For all other inputs, VIN= VCCor GND VOUT= 5.5 V 5.5 V 1 0.5 A 2, 3 10.0 Three-state output leakage current, low 3020 IOZL5/ OE = VIHor GND For all other inputs, VIN= VCCor GND VOUT= 0.0 V 5.5 V 1 -0.5 A 2, 3 -10.0 Quiescent supply current,

46、output high 3005 ICCHOE = GND For all other inputs, VIN= VCCor GND 5.5 V 1 8.0 A 2, 3 160 Quiescent supply current, output low 3005 ICCL5.5 V 1 8.0 A 2, 3 160 Quiescent supply current, output three-state 3005 ICCZ5/ OE = VCCFor all other inputs, VIN= VCCor GND 5.5 V 1 8.0 A 2, 3 160 See footnotes at

47、 end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92180 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characterist

48、ics Continued. Test and MIL-STD-883 test method 1/ Symbol Test conditions 2/ -55C TC +125C +3.0 V VCC +5.5 V unless otherwise specified VCCGroup A subgroups Limits 3/ Unit Min Max Input capacitance 3012 CINTC= +25C See 4.4.1c GND 4 12 pF Output capacitance 3012 COUT5/ 5.5 V 4 15 pF Power dissipation capacitance CPD6/ 5.0 V 4 50 pF Low level ground bounce noise VOLP7/ VIH= VCCVIL= 0.0 V TA= +25C See 4.4.1d See figure 4 5.0 V 4 1750 mV VOLV7/ 5.0 V 4 -1200 mV High level VCCbounce noise VOHP7/ 5.0 V 4 VOH+1000 mV VOHV7/ 5.0

copyright@ 2008-2019 麦多课文库(www.mydoc123.com)网站版权所有
备案/许可证编号:苏ICP备17064731号-1