1、_SAE Technical Standards Board Rules provide that: “This report is published by SAE to advance the state of technical and engineering sciences. The use of this report is entirely voluntary, and its applicability and suitability for any particular use, including any patent infringement arising theref
2、rom, is the sole responsibility of the user.” SAE reviews each technical report at least every five years at which time it may be revised, reaffirmed, stabilized, or cancelled. SAE invites your written comments and suggestions.Copyright 2013 SAE International All rights reserved. No part of this pub
3、lication may be reproduced, stored in a retrieval system or transmitted, in any form or by any means, electronic, mechanical, photocopying, recording, or otherwise, without the prior written permission of SAE. TO PLACE A DOCUMENT ORDER: Tel: 877-606-7323 (inside USA and Canada) Tel: +1 724-776-4970
4、(outside USA) Fax: 724-776-0790 Email: CustomerServicesae.org SAE WEB ADDRESS: http:/www.sae.orgSAE values your input. To provide feedback on this Technical Report, please visit http:/www.sae.org/technical/standards/AS5657AEROSPACESTANDARDAS5657 Issued 2007-02 Reaffirmed 2013-04 Test Plan/Procedure
5、for AS5643 IEEE-1394b Interface Requirements for Military and Aerospace Vehicle Applications RATIONALEAS5657 has been reaffirmed to comply with the SAE five-year review policy. TABLE OF CONTENTS 1. SCOPE 21.1 Purpose . 21.2 Application . 21.3 Interpretation . 22. REFERENCES 22.1 Applicable Documents
6、 22.1.1 SAE Publications . 22.1.2 IEEE Publications 22.1.3 U.S. Government Publications 32.1.4 1394 Trade Association Publications 32.2 Acronyms and Definitions . 33. GENERAL VALIDATION CRITERIA . 33.1 Execution of Other Test Specifications . 33.2 Black Box Testing . 54. INDIVIDUAL DEVICE VERIFICATI
7、ON (UUT ONLY) . 54.1 Test Setup . 54.2 Physical Layer Tests . 54.2.1 PHY Chip Register Verification . 54.3 Link Layer Test 84.4 Transaction Layer Test . 94.5 Bus Management Layer Test 94.6 Node Operation Verification 94.6.1 CC Node Operation 94.6.2 Remote Nodes 13FIGURE 1 TEST SEQUENCE 4FIGURE 2 “BL
8、ACK BOX” TEST SETUP 5TABLE 1 RHB REGISTER VALUES 6TABLE 2 MAX_PORT_SPEED REGISTER VALUES . 7TABLE 3 NEGOTIATED_SPEED REGISTER VALUES 7TABLE 4 STANDARD LINK LAYER TESTS 8TABLE 5 STOF PACKET FIELD AND VALUES 10TABLE 6 CC GENERATED MESSAGE FIELDS AND VALUES . 11TABLE 7 REMOTE NODE GENERATED MESSAGE FIE
9、LDS AND VALUES . 14SAE AS5657 Page 2 of 15 1. SCOPE This document establishes test plans/procedures for the AS5643 Standard that by itself defines guidelines for the use of IEEE-1394b as a data bus network in military and aerospace vehicles. This test specification defines procedures and criteria fo
10、r testing device compliance with the AS5643 Standard. 1.1 Purpose The purpose of this document is to establish test plans/procedures for the AS5643 Standard. This document is controlled and maintained by the SAE with technical support from subsystem vendors. 1.2 Application The information herein ma
11、y be used to assist the test of the subsystems that interface via the vehicles network. 1.3 Interpretation The following interpretations shall be placed upon these words, unless stated otherwise, where they are used in this document.May An allowed action. Shall A mandatory requirement. Should A reco
12、mmended action. Will A declaration of intent. 2. REFERENCES 2.1 Applicable Documents The following publications form a part of this document to the extent specified herein. The latest issue of SAE publications shall apply. The applicable issue of other publications shall be the issue in effect on th
13、e date of the purchase order. In the event of conflict between the text of this document and references cited herein, the text of this document takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 2.1.1 SAE Pub
14、lications Available from SAE International, 400 Commonwealth Drive, Warrendale, PA 15096-0001, Tel: 877-606-7323 (inside USA and Canada) or 724-776-4970 (outside USA), www.sae.org.AS5643 IEEE-1394b Interface Requirements for Military and Aerospace Vehicle Applications 2.1.2 IEEE Publications Availab
15、le from IEEE, 445 Hoes Lane, Piscataway, NJ 08854-1331, Tel: 732-981-0060, www.ieee.org.IEEE Std 1394-1995 IEEE Standard for a High Performance Serial Bus IEEE Std 1394a-2000 IEEE Standard for a High Performance Serial Bus, Amendment 1 IEEE Std 1394b-2002 IEEE Standard for a High Performance Serial
16、Bus, High Speed Supplement SAE AS5657 Page 3 of 15 2.1.3 U.S. Government Publications Available from the Document Automation and Production Service (DAPS), Building 4/D, 700 Robbins Avenue, Philadelphia, PA 19111-5094, Tel: 215-697-6257, http:/assist.daps.dla.mil/quicksearch/.MIL-STD-461E Department
17、 of Defense Interface Standard, Requirements for the Control of Electromagnetic Interference Characteristics of Subsystems and Equipment MIL-HDBK-454A Department of Defense Handbook, General Guidelines for Airborne Electronic Equipment MIL-HDBK-5400 Military Handbook, Electronic Equipment, Airborne,
18、 General Guidelines 2.1.4 1394 Trade Association Publications Available from the 1394 Trade Association, 1560 East Southlake Blvd., Suite 242, Southlake, TX 76092, Tel: 817-416-2200, http:/www.1394ta.org.1394 Trade Association Document 2002005, Base 1394 Test Suite Definition Version 1.02.2 Acronyms
19、 and Definitions This document uses the same acronyms and definitions as the Base specification: UUT: Unit under Test, meaning a device that is to be tested for conformance to the standard. 3. GENERAL VALIDATION CRITERIA 3.1 Execution of Other Test Specifications In order to ensure 1394 device inter
20、operability, other organizations have already defined compliance/interoperability specifications or are in the process of doing so. Although these specifications are targeted toward interoperability certification efforts in the consumer electronics market, they also form the basis for basic 1394 dev
21、ice connectivity testing, and therefore are applicable to the testing efforts as defined in this document. Tests covered by these specifications will not be explicitly specified by this document. Only additional tests required for compliance verification with the AS5643 standard will be explicitly s
22、pecified.The following test specifications will be executed fully or in part (when applicable) prior to tests specified in this document: AS5643/1 Test Plan or other Physical Layer Test Specifications 1394 Trade Association Document 2002005, Base 1394 Test Suite Definition Version 1.0 After successf
23、ully passing the specified test program, specific tests shall be performed in order to pass environmental, vibration, and other specific tests that are beyond the scope of this specification. SAE AS5657 Page 4 of 15 FIGURE 1 - TEST SEQUENCE SAE AS5657 Page 5 of 15 3.2 Black Box Testing For all speci
24、fied tests, the UUT will be viewed as a “black box” with the 1394 connector being the only access portal to the UUT. “Black Box” also means that the test person has little or no knowledge about the functions, features, and internal operations of the UUT.4. INDIVIDUAL DEVICE VERIFICATION (UUT ONLY) T
25、he tests specified in this section should verify basic device compliance with standard 1394 test criteria and are intended to ensure basic 1394 interoperability and requirements validation. They should target device validation and characterization on a single device basis, only connected to appropri
26、ate Test/Validation Instruments as needed. This document also requires that the UUT has successfully passed physical layer tests as defined in their respective Physical Layer Test Specifications. This means that the UUT conforms to all wiring, signal integrity, and physical layer transmission charac
27、teristics.4.1 Test Setup A typical test setup is shown below. Black box testing requires the UUT (completely powered up) to be connected to an adequate test instrument. Unless specified differently, the tests can be performed with commercial 1394b test equipment, i.e., 1394b Bus Analyzers.FIGURE 2 -
28、 “BLACK BOX” TEST SETUP The cabling (including wires and connectors) used in this Test Setup must itself conform to applicable Physical Layer Test Plans. It should have been tested by itself. The UUTs compliance is verified and tested by running test functions on these instruments. Tests can include
29、, but are not limited to: PHY Register Read/Writes Asynchronous Stream packets verification Timing verification This document does not specify environmental test parameters for the UUT. These parameters (e.g., temperature, vibration, noise, etc.) are specified in the program/device specific definiti
30、ons. All tests shall be performed in the specifiedenvironmental conditions for each UUT.4.2 Physical Layer Tests 4.2.1 PHY Chip Register Verification The following tests target PHY register validation. PHY registers define device functionality and therefore device compliance and interoperability on
31、the bus. Only proper PHY register settings guarantee proper device functionality. SAE AS5657 Page 6 of 15 Instrumentation requirements: Commercial data analyzer with remote PHY register read capability. Writes to the remote registers are not required for these tests. Automated test capabilities are
32、not required but can reduce validation time. 4.2.1.1 Link Control Register This bit shall be tested according to Trade Association Document 2002005, Base 1394 Test Suite Definition Version 1.0. 4.2.1.2 Power Class RegisterThis bit shall be tested according to 1394 Trade Association Document 2002005,
33、 Base 1394 Test Suite Definition Version 1.0.4.2.1.3 Root Hold-off RegisterThe base specification defines that only CCs can be root nodes. The following test verifies the corresponding control bit setting. Connect UUT to Data Analyzer. Read PHY register RHB field value and compare against Pass/Fail
34、criteria Pass/Fail Criteria: Pass: See Table 1 Fail: anything else TABLE 1 - RHB REGISTER VALUES Field Name Required Register Value Requirement Level RHB 12if UUT is a CC 02if UUT is a remote node Mandatory4.2.1.4 Maximum Port Speed Register For physical layer chips with programmable port speed sett
35、ings, the maximum port speed should be verified. The speed value must not exceed the speed rating of used physical media (cable) or the specified network speed. This test should be performed for each available PHY port. Connect UUT (port0) to Data Analyzer. Read PHY register MAX_PORT_SPEED field and
36、 compare against Pass/Fail criteria. Pass/Fail Criteria: Pass: See Table 2 Fail: anything else Repeat for all other available ports. SAE AS5657 Page 7 of 15 TABLE 2 - MAX_PORT_SPEED REGISTER VALUES Field Name Required Register Value Requirement Level Max_Port_Speed 0002if cabling supports S100 only
37、Mandatory 0012if cabling supports S200 only 0102if cabling supports S400 only 0112if cabling supports S800 only 1002if cabling supports S1600 only 1012if cabling supports S3200 only 1102reserved 4.2.1.5 Negotiated Speed Register In order to ensure correct interface functionality, the value of these
38、fields (for each port separately) has to be verified. A negotiated speed lower than the maximum port speed is a strong indication of a failed speed negotiation, and therefore, a faulty/unreliable physical layer connection. Connect UUT (port1) to Data Analyzer. Read NEGOTIATED _SPEED register for all
39、 connected PHY ports and compare against Pass/Fail criteria. Pass/Fail Criteria: Pass: See Table 3 Fail: anything else TABLE 3 - NEGOTIATED_SPEED REGISTER VALUES Field Name Required Field Value Requirement Level Negotiated_Speed 0002if either Max_Port_Speed (i.e., cabling) or connected device suppor
40、t S100 onlyMandatory0012if either Max_Port_Speed (i.e., cabling) or connected device support S200 only 0102if either Max_Port_Speed (i.e., cabling) or connected device support S400 only 0112if either Max_Port_Speed (i.e., cabling) or connected device support S800 only 1002if either Max_Port_Speed (i
41、.e., cabling) or connected device support S1600 only 1012if either Max_Port_Speed (i.e., cabling) or connected device support S3200 only 1102reserved SAE AS5657 Page 8 of 15 4.3 Link Layer Test While not specifically targeting the LINK silicon device, certain link layer parameters shall be measured
42、to verify the UUT system boards effect on the following parameters: 1394 interface functionality Basic Transaction RX/TX CSR Registers and Configuration ROM (optional) Cycle Master Functionality (optional) All required tests, as well as procedures, pass/fail criteria, and required instrumentation, a
43、re defined in 1394 Trade Association Document 2002005, Base 1394 Test Suite Definition Version 1.0.The following tests shall be performed prior to running tests specified in this document: TABLE 4 - STANDARD LINK LAYER TESTS Test Subtest Targeting Requirement Level ReferencedSectionTransactionCapabl
44、eLink Status Mandatory . 5.21.1 Core CSR RegistersSTATE_CLEAR & SET Link Status Mandatory only if UUT supports CSRs5.2.1.2.1NODE_IDS CSR Link Status Mandatory only if UUT supports CSRs5.2.1.2.2RESET_START Link Status Mandatory only if UUT supports CSRs5.2.1.2.2SPLIT_TIMEOUT Link Status Mandatory onl
45、y if UUT supports CSRs5.2.1.2.2CYCL_TIME Iso CapableMandatory only if UUT supports CSRs and isochronous transactions 5.2.2.2BUS_TIME Cycle MasterCapableMandatory only if UUT supports CSRs, Cycle Master functionality and is a CC 5.2.3.3ConfigROMPresenceLink Status Mandatory only if UUT supports a Con
46、figuration ROM 5.2.1.3 5.2.1.5Block Packet SupportCapabilities Mandatory only if UUT supports async transactions 5.2.1.6Iso ROM SupportCapabilities Mandatory only if UUT supports isochronous transactions 5.2.3.1CMC ROM SupportCapabilities Mandatory only if UUT supports Cycle Master functionality and
47、 is a CC 5.2.3.1Cycle Start GenerationCapabilities Mandatory only if UUT supports Cycle Master functionality and is a CC 5.2.3.4SAE AS5657 Page 9 of 15 4.4 Transaction Layer Test Tests targeting correct functionality of the Transaction Layer of a 1394 device shall be run as applicable and shall conf
48、orm to the 1394 Trade Association Document 2002005, Base 1394 Test Suite Definition Version 1.0. 4.5 Bus Management Layer Test Tests targeting correct functionality of the Bus Management Layer of a 1394 device shall be run as applicable and shall conform to the 1394 Trade Association Document 200200
49、5, Base 1394 Test Suite Definition Version 1.0. 4.6 Node Operation Verification 4.6.1 CC Node Operation 4.6.1.1 STOF Packet Generation The following tests target correct STOF packet generation by the CC. Since only the CC can generate STOF packets, these tests shall be limited to CC capable devices.4.6.1.1.1 STOF Frame Rate Verification As defined by the base specification, the CC has to m
