1、 STD*SMPTE 207M-ENGL 1777 8357401 0002735 804 SMPTE STANDARD for Television - Digital Control Interface - Electrical and Mechanical Characteristics ANSVSMPTE 207M-I 997 Revision of ANSVSMPTE 207M-1992 I General 1.1 Scope This standard defines the electrical and mechanical characteristics of an inter
2、face system comprised of a general-purpose communication channel and inter- face device(s) used for the transfer of data and digital control signals between equipment utilized in the production, post-production, andior transmission of visual and aural information. It is intended that the communicati
3、on channel and device(s) described in this standard be part of an overall equipment inter- face, allowing interconnection of programmable and nonprogrammable control and accessory equipment as required to configure an operational system with a defined function. The standard is also intended to allow
4、 rapid reconfiguration of a system providing more than one defined function utilizing a given group of equipment. 1.1.1 The electrical and mechanical specifica- tions set forth in this standard are intended for use in both fixed plant and field operational environments. These specifications take int
5、o account the requirement to function reliably with- out causing undue interference with other signals normally found in these environments. 1.1.2 This standard defines the electrical and mechanical characteristics of the communica- tion channel and the associated interface device(s), to the exclusi
6、on of design specifica- tions, performance requirements, safety require- ments, and the communications protocol used in or by such equipment. 1.1.3 The primary intent of this standard is to establish an electrical and mechanical interface and communication channel for the purpose of interconnecting
7、equipment by external means. Page 1 of 12 pages This standard, or sections thereof, may be applied to the interconnection of elements within an item of equipment. 1.2 Definitions For the purposes of this standard, the following definitions shall apply: 1.2.1 equipment: Either a single device which c
8、onnects to the interface system or a group of interconnected devices, providing a specified operational function, having one common con- nection to the interface system. 1.2.2 inteiface bus: Refers to the communica- tion channel. 1.3 Object The intent of this standard is to: - Define a general-purpo
9、se interface system for use in the environment specified in 1.1 ; - Specify equipment-independent electrical, mechanical, and functional interface characteristics which permit equipment to connect and communi- cate unambiguously via the interface system; - Specify terminology and definitions related
10、 to the electrical and mechanical portion of the interface system; - Enable the interconnection of independently manufactured equipment into a single functional system; - Permit equipment with a wide range of opera- tional capabilities to be connected to the interface system simultaneously; CAUTION
11、NOTICE This Standard may be revised or withdrawn at any time The procedures of the Standard Developer require that action be taken to reaffirm revise, or withdraw this standard no later than five years from the date of publication Purchasers of standards may receive current information on all standa
12、rds by calling or writing the Standard Developer Printed in USA Copyright D 1997 by THE SOCIETY OF ?L American National Standard MOTION PICTURE AND TELEVISION ENGINEERS 595 W Hartsdale Ave , White Plains, NY 10607 (91 4) 761 -1 1 O0 December Approved 2,1997 ANSIISMPTE 207M-1997 - Define a system whi
13、ch is user configurable; - Define a system based on readily obtainable standard components. I .4 Interface system overview 1.4.1 This standard applies to systems, or por- tions of systems, which have the following char- acteristics: - A full-duplex four-wire communications channel is utilized; - A n
14、ominal maximum bus length of 1220 m (4003 ft) ; - Data is transmitted asynchronously, bit se- rial/word serial; - Standard transmission rate on the interface bus is 38.4 kilobits per second (kb/s); - Data exchange between devices is digital (as distinct from analog). 1.4.2 The function of the interf
15、ace system is to provide an effective communications link over which messages are carried in an unambiguous way among a group of interconnected devices. 1.4.3 The interface system described in this standard assigns one of two operational charac- teristics to all devices: 1.4.3.1 Bus controller Each
16、interface system contains one bus controller which supervises all tributaries in the system. This supervision is exercised through the use of interface protocol. The bus controller may also perform one or more functions in the operational plant in addition to its interface supervision. Although only
17、 one bus con- troller may be part of any particular interface system, it is recognized that an operational plant may make use of more than one interface system. 1.4.3.2 Tributary A tributary transfers messages to and from an opera- tional device via the interface system as specified in the interface
18、 system protocol. A tributary communi- cates messages through the interface bus only via the bus controller. 1.4.4 The basic message paths and the bus structure shall be as follows: The basic message path utilizes asynchronous, bit serial/word serial transmission via a balanced wire pair. The interf
19、ace bus may be utilized in either point-to- point or multipoint configuration including but not limited to: - A point-to-point bus connecting one tributary to a bus controller; - Amultipoint bus connecting multiple tributaries to a single bus controller. The interface bus is a four-wire configuratio
20、n which will effect two-way communication using a separate wire pair for each transmission direction; communica- tion between tributaries is accomplished through the bus controller. 1.4.5 The data word and BREAK character util- ized by the interface system shall be as follows: The standard serial da
21、ta word includes an eight-bit data byte; the complete serial data word consists of one start bit (SPACE), eight data bits (ONE BYTE), a parity bit (EVEN), and one stop bit (MARK). The least significant bit is transmitted first. A BREAK character, comprising 17-21 bits SPACE followed by a subsequent
22、return to the MARK condi- tion, is utilized to synchronize all devices connected to the interface bus. A SPACE in excess of 21 bits shall be treated as an ERROR condition. 2 Electrical characteristics 2.1 Interface circuit The balanced voltage digital interface circuit is shown in figure 1. The circ
23、uit consists of three parts: the generator, the balanced interconnecting cable, and the load. The load may consist of one or more receiv- ers (R) and an optional cable termination resistance (Rt). The electrical characteristics of the generator Page 2 of 12 pages ANSIISMPTE 207M-I 997 and receiver a
24、re specified in terms of direct electrical measurements while the interconnecting cable is specified in terms of its electrical and physical char- acteristics. 2.2 Generator characteristics The electrical characteristics of the generator are specified in accordance with measurements de- scribed in 2
25、.2.1 through 2.2.6 and illustrated in figures 2 and 3. A generator circuit meeting these require- ments results in a low impedance (100 ohms or less) balanced voltage source producing a differential volt- age applied to the interconnecting cable in the range of 2 to 6 volts. The signalling sense of
26、the voltages appearing across the interconnecting cable are de- fined as follows: The B terminal of the generator shall be positive with respect to the A terminal for a binary 1 (MARK) state. BALANCED INTERCONNECTING LOAD -4 1- GENERATOR CABLE RECEIVER -1 I CABLE I l NATnoN l I LEGEND Rt = CABLE TER
27、MINATION RESISTANCE Vg = GROUND POTENTIAL DIFFERENCE A,B = GENERATOR INTERFACE POINTS A,B = LOAD INTERFACE POINTS c = GENERATOR CIRCUIT GROUND C = LOAD CIRCUIT GROUND Figure 1 - Balanced digital interface circuit Page 3 of 12 pages STD-SMPTE 207M-ENGL 1777 m 6357Li01 0002936 513 m ANSIISMPTE 207M-19
28、97 OPEN CIRCUIT MEASUREMENT IVo I 6.0 V IVoal 4 kilohms), a small input threshold transition region between -0.5 volts and +0.5 volts, and allowance for an internal bias voltage not to exceed 3 volts in magnitude. 2.3.1 The input current/voltage measurements shall be made with the voltage Via (or Vi
29、b) ranging between -10.0 volts and +10.0 volts, while Vib (or Via) is held at 0.0 volts (ground). This measure- ment shall be made with the power supply to the receiver in both the power-on and power-off condition. The resultant input current lia (or lib) shall remain within the shaded region shown
30、in figure 4. Page 5 of 12 pages STD.SMPTE 207M-ENGL 1997 8357403 0002940 272 ANSIISMPTE 2071111-1997 B A tb = TIME DURATION OF THE UNIT INTERVAL AT THE APPLICABLE MODULATION RATE - tra 140nsec and cl0usec V = DIFFERENCE IN STEADY STATE VOLTAGES ss v = v-v 5s I t TI -w k-t, II Figure 3 - Generator ou
31、tput signal waveform T+ 3v + IOV Figure 4 - Receiver input current-voltage measurement Page 6 of 12 pages STD-SMPTE 207M-ENGL 3797 8357403 0002741 O08 2.3.2 The input sensitivity measurement shall be made as illustrated in figure 5 over the entire common mode voltage (Vcm) range of -15 volts to +I5
32、volts. The receiver shall not require a differential input voltage of more than 500 mil- livolts to correctly assume the intended binary state. Reversing the polarity of Vi shall cause the receiver to assume the opposite binary state. The receiver is required to maintain correct op- eration for diff
33、erential input signal voltages rang- ing between 500 millivolts and 6 volts in magnitude. The maximum voltage (signal plus common mode) present between either receiver input terminal and receiver circuit ground shall not exceed 25 volts in magnitude. Application of voltages less than the maximum vol
34、tage (signal plus common mode) of 25 volts or a maximum differential signal of 15 volts at the receiver input terminals shall not result in operational failure of the receiver. The common mode voltage (Vem) is defined as the algebraic mean of the two voltages appearing at the receiver input termi- A
35、NSIISMPTE 207M-I 997 nals (A and B) with respect to the receiver circuit ground (C). (Designers of terminating hardware should be aware that slow signal tran- sitions with noise present may give rise to insta- bility or oscillatory conditions in the receiving device and appropriate techniques should
36、 be implemented to prevent such behavior. For ex- ample, adequate hysteresis may be incorpo- rated into the receiver to prevent this condition.) 2.3.3 The input balance measurement shall be made as illustrated in figure 6. The balance of the receiver input voltagecurrent characteristics and bias vol
37、tages shall be such that the receiver will remain in the intended binary state when a differential voltage (Vi) of 500 millivolts is ap- plied through 500 ohms f 1% to each input ter- minal and Vcrn is varied between -15 volts and +I5 volts. When the polarity of Vi is reversed, the opposite binary s
38、tate shall be maintained under the same conditions. %=-y- Vcm= - 15 to t15volts +500 -500 - I- - - - - - - - - X a I - 6 VOLTS TRANSITION REGION Figure 5 - Receiver input sensitivity measurement Page 7 of 12 pages STD-SUPTE 207M-ENGL 1777 8357qOL OO2942 T44 ANSIISMPTE 207M-1997 Figure 6 - Receiver i
39、nput balance measurement 2.3.4 The use of a noninductive cable termina- tion resistance (Rt) is recommended. A distrib- uted resistive load or a combined RIC load may be required in some cases (see 4.2.1) and the use of an active cable termination resistance is desirable for the purpose of reducing
40、cross cou- pling when the bus controller is placed in a high- impedance state (see 4.2.2). Care shall be taken not to exceed the limits on total load resis- tance or sensitivity. Refer to 2.3.7 for limits on the total load resistance. 2.3.5 The use of multiple receivers may be em- ployed. Caution mu
41、st be exercised to avoid per- formance degradation due to signal reflective effects from stub lines emanating from the load interface point to the receivers. 2.3.6 The interface system shall fail safe. This shall be accomplished by automatic disconnec- tion of a tributary from the interface system i
42、n the event of a malfunction or power failure and in- corporating in the receiver provisions to provide a steady binary MARK to protect against the fol lowi ng con d it ions: - Generator power off; - Generator in high-impedance state; - Both signal wires open or shorted (signal com- mon return still
43、 connected); - Generator not implemented (signal leads may or may not be present); - Open connector (both signal leads and the com- mon signal return are open simultaneously). 2.3.7 The total load characteristics, including multiple receivers, fail-safe provision, and cable termination shall have a
44、combined resistance greater than 90 ohms between its input points (A and B figure I) and shall not require a differential input voltage of more than 500 mil- livolts for all receivers to assume the intended binary state. 2.4 Interconnecting cable Characteristics The physical and electrical character
45、istics of the inter- connecting cable are given in 2.4. I through 2.4.4 with additional guidance given in clause 4. An intercon- necting cable conforming to this standard will result in a transmission line with a nominal characteristic im- pedance in the order of 100 ohms at frequencies greater than
46、 100 kilohertz, and a DC series loop resistance not exceeding 240 ohms over an opera- tional loop length of nominally 1220 m. The cable may be composed of twisted or nontwisted (flat cable) conductors possessing the characteristics described in 2.4.1 through 2.4.4. Most commonly available ca- ble us
47、ed for telephone applications (nonloaded) will meet these specifications. Page 8 of 12 pages STD-SMPTE 207fl-ENGL 1797 8357403 I1002943 980 2.4.1 Each conductor of the interconnecting ca- ble shall be composed of either a stranded or solid copper wire conductor with uniform overall diameter of at le
48、ast 0.5 mm (0.02 in). Use of noncopper conductors is allowed providing they are of sufficient size to yield a DC wire resis- tance not exceeding 10 ohms per 100 m (30 ohms per 1000 ft) per conductor. 2.4.2 Mutual pair capacitance, that is, the ca- pacitance between one wire in the pair and the other
49、 wire in the pair, shall not exceed 65 pico- farads per meter (20 picofarads per ft) and the value shall be reasonably uniform over the entire length of the cable. 2.4.3 Stray capacitance, the capacitance be- tween one wire in the cable and all others in the cable sheath with all others connected to ground, shall not exceed 130 picofarads per me- ter (40 picofarads per ft) and shall be reasonably uniform over the entire length of the cable for any given conductor. 2.4.4 Pair-to-pair balanced crosstalk is defined as the crosstalk between one pair of wi
