1、 Table of contents 1 Scope 2 Normative references 3 Definition of terms 4 Overview 5 Multiplex carrier channel-coding 6 Synchronization and audio phasing 7 AES data mapping 8 Active channels 9 Multiplex header 10 Electrical characteristics 11 Equalization 12 Cable 13 Connector type Annex A Additiona
2、l data Annex B Bibliography 1 Scope 1.1 This standard defines a method of mapping up to eight synchronous streams of AES3-compliant data into a self-clocking serial interface. When used for PCM digital audio, the interface can carry up to 16 channels of linearly encoded audio and auxiliary data. Alt
3、ernatively or concurrently (within the eight stream limit), the interface may be used to carry streams of compressed audio or other data that is packaged into an AES3-compliant stream. The interface is transparent to any data type that is packaged in an AES3-compliant stream that is synchronous with
4、 the multiplex. 1.2 PCM audio sampled at 48 kHz and clock-locked to video is the preferred linear baseband audio representation for studio applications and should be used whenever baseband audio is associated with video that is running at standard frame rates. However, this interface supports any fr
5、equency of operation supported by AES3, provided that all of the audio channels and/or all the non-audio (see 3.15) data streams are synchronized to a common clock. Ideally all the audio channels should be audio-synchronous (see 3.5) for guaranteed audio phase coherence. 1.3 This standard is intende
6、d to provide a reliable method of distributing multiple co-phased channels of digital audio around a studio without losing the initial relative sample-phase relationship. A mechanism is provided to allow multiple 16-channel streams to be re-aligned after a relative misalignment of up to 8 samples. 1
7、.4 This interface is intended to be compatible with the complete range of digital television scanning standards and standard film rates. Page 1 of 9 pages SMPTE 324M-2004 Copyright 2004 by THE SOCIETY OF MOTION PICTURE AND TELEVISION ENGINEERS 595 W. Hartsdale Ave., White Plains, NY 10607 (914) 761-
8、1100 ApprovedMay 10, 2004SMPTE STANDARD for Television Serial Interface for Multiplexing Eight AES3 Data Streams SMPTE 324M-2004 Page 2 of 9 pages 2 Normative references The following standards contain provisions which, through reference in this text, constitute provisions of this standard. At the t
9、ime of publication, the editions indicated were valid. All standards are subject to revision, and parties to agreements based on this standard are encouraged to investigate the possibility of applying the most recent edition of the standards indicated below AES3-2003, Digital Audio Engineering Seria
10、l Transmission Format for Two-Channel Linearly Represented Digital Audio Data AES-3id-2001, AES Information Document for Digital Audio Engineering Transmission of AES3 Formatted Data by Unbalanced Coaxial Cable AES11-2003, Digital Audio Engineering Synchronization of Digital Audio Equipment in Studi
11、o Operations ANSI/SMPTE 276M-1995, Television Transmission of AES/EBU Digital Audio Signals Over Coaxial Cable. IEC 60169-8, Radio-Frequency Connectors. Part 8: R.F. Coaxial Connectors with Inner Diameter of Outer Conductor 6.5 mm (0.256 in) with Bayonet Lock Characteristic Impedance 50 ohms (Type B
12、NC) 3 Definition of terms 3.1 AES audio: All of the data, audio and auxiliary, associated with one AES digital stream as defined in AES3. 3.2 AES frame: Two AES subframes, one with audio data for channel a (subframe 1) followed by one with audio data for channel b (subframe 2). 3.3 AES subframe: All
13、 data associated with one AES audio sample for one channel in a channel pair . 3.4 audio data: 28 bits: 24 bits of audio associated with one audio sample plus the following 4 bits: sample validity (V bit), channel status (C bit), user data (U bit), and parity (P bit). Alternatively, there may be 20
14、bits of audio, 4 auxiliary bits, and the V, C, U, and P bits per the AES3 standard. 3.5 audio synchronous: One audio channel is defined as being synchronous with another when the two channels are running from the same clock and the analog inputs are concurrently sampled as described in AES11. 3.6 au
15、xiliary data: Four bits of AES audio associated with one sample defined as auxiliary data by AES3. The four bits may be used to extend the resolution of the audio sample. 3.7 carrier data: Available data bits in the header data that may be used for metadata transmission or other user applications. 3
16、.8 carrier data block start bit (CB bit): An optional bit provided to allow the formation of a carrier data block that spans multiple AES frames. 3.9 channel pair: Two digital audio channels derived from the same AES audio source. 3.10 header data: All the data in the multiplex header. 3.11 multicha
17、nnel phasing flag (MC bit): A dedicated bit that identifies the start of a 16 frame period with a 1 state. This bit immediately precedes the A1 bit and has a 1 state in the first frame following the frame containing the Z preamble in the AES11 timing reference. SMPTE 324M-2004 Page 3 of 9 pages 3.12
18、 multiplex frame: All the data associated with each sample of audio in each AES frame for each of 8 AES inputs and the multiplex header associated with that sample period. 3.13 multiplex frame sync: A bi-phase code violation at the beginning of the multiplex header that identifies the start of each
19、multiplex frame 3.14 multiplex header: A 64-bit data packet at the start of each frame that includes a bi-phase code violation for synchronization, 32 bits of carrier data, an optional carrier block flag (CB bit), a parity bit for carrier data (CP bit), a multi-channel phasing flag (MC bit), sixteen
20、 channel active bits (A bits), eight AES block start bits (Z bits), and a parity bit for the MC, A, and Z bits (HP bit). 3.15 non-audio data: Any data payload in an AES3 stream that requires byte 0, bit 1 of the channel status data to be set to 1 per the AES3 standard. This encompasses any data that
21、 is not linearly coded PCM audio, so “non-audio data” may actually be compressed audio or non-linearly coded audio as well as metadata, compressed video, or other data that is truly not audio. 3.16 video synchronous: Audio is defined as being clock-synchronous with video if the sampling rate of the
22、audio is such that the number of audio samples occurring within an integer number of video frames is itself a constant integer number. 4 Overview Audio data derived from eight synchronous AES frames are multiplexed together in a single, bi-phase-mark-encoded serial data stream at exactly eight times
23、 the bit rate of each incoming AES signal. Each AES subframe is organized in time sequence in the multiplexed frame. All the data in each AES subframe is included with the exception of the preamble. The four bit-times from each preamble are moved to the front of the multiplexed word to produce a 64-
24、bit header. Four of the header bits are used for a code violation that provides frame synchronization. One bit is used for a sixteen frame flag that allows multiple streams that have been subjected to differential delay to be re-phased with minimum latency. Sixteen A bits are used to identify active
25、 channels. Eight bits are assigned as Z bits to identify the block start frame for each of the eight AES channel pairs. One bit is assigned to a parity bit that covers the MC bit and the Z bits. Thirty-two bits are allocated to carrier data. One bit is reserved for an optional block start reference
26、for carrier data. The last bit is used to ensure even parity across carrier data bits, the carrier block bit and the reserved bits. 5 Multiplex carrier channel-coding The data in the multiplex carrier is coded bi-phase mark. Data zeroes are identified by a transition only at the beginning of the bit
27、 period. Data ones are identified by transitions at the beginning and at the middle of the bit period as shown in figure 1. The receiver shall be able to detect the bi-phase mark data in either normal or reverse polarity so that it can operate correctly if the data has passed through an odd number o
28、f inversions. SMPTE 324M-2004 Page 4 of 9 pages Figure 1 Channel coding 6 Synchronization and audio phasing Multiplex frame synchronization is achieved by use of a code violation at the start of each multiplex frame. The code violation consists of a transition at the beginning of the first 2-bit per
29、iod and a second transition at the beginning of the second 2-bit period. This produces the maximum violation time achievable in a 4-bit period for an even-parity violation. A multichannel flag bit (MC bit) is provided to allow re-phasing of multiplex streams that have suffered differential delay up
30、to 8 samples. The MC bit is a “1” in the sample frame following the frame that contains the Z preamble in the AES11 system sync reference. Subsequently, the MC bit is a “1” every 16 frames, and has a value of 0 in all other frames. This bit must always be passed with the identical delay as the audio
31、 data. 7 AES data mapping AES frame data from AES inputs are rigidly organized in the multiplex carrier. AES input 1 follows the multiplex header with subframe 1 (AES A channel) preceding subframe 2 (AES B channel). AES inputs 2 through 8 follow in the same fashion, as shown in figure 2. With the ex
32、ception of the preamble, all data in each AES subframe is replicated in order in the multiplex carrier. Each subframe 1 preamble is replaced by a single bit which is zero at all times except during a Z preamble at which time it is a one. These single Z bits immediately follow the A bits in the multi
33、plex header. They are arranged in the same order as the AES inputs. The subframes are numbered 1 through 16 in the multiplex according to the above mapping scheme. The fixed mapping of the subframes of each AES signal pair into the multiplex is the key to maintaining the identity of the individual s
34、ignals. The labels on the connectors at the inputs to the multiplexer and the outputs of the demultiplexer shall clearly indicate the identity of each of the eight AES signal pairs and the sequence in which these signal pairs are inserted into the multiplex. Bit Period2x ClockNRZ DataBiPhase-Mark Da
35、taBiPhase-Mark DataCode ViolationCode ViolationSMPTE 324M-2004 Page 5 of 9 pages 0 63 64 91 92 119 120 147 148 175 176 203 204 231 232 259 260 287 288 315 316 343 344 371 372 399 400 427 428 455 456 483 484 511Header Ch 1 Ch 2 Ch 3 Ch 4 Ch 5 Ch 6 Ch 7 Ch 8 Ch 9 Ch 10 Ch 11 Ch 12 Ch 13 Ch 14 Ch 15 Ch
36、 16AES 1 AES 2 AES 3 AES 4 AES 5 AES 6 AES 7 AES 8Figure 2 AES data mapping 8 Active channels Sixteen A bits are assigned to identify which channels in the multiplex are in use. The A bits immediately follow the MC bit and are arranged in sequential order. The A bit representing a channel must be se
37、t to one to indicate that channel as active (in use). The A bits representing inactive (unused) channels must be set to zero. When a channel is inactive, the audio data word for that channel must be set twos complement zero (silence) and the Z bit must be set correctly for any associated active chan
38、nel; e.g., if channel 8 is active and channel 7 is inactive, the Z 7-8 bit must be set correctly for proper decoding of channel 8. Given the nature of the inputs, the A bits will typically be set in pairs, but the flexibility is provided to allow individual channel usage. In some situations, this co
39、uld allow a downstream processing device to better utilize its resources. 9 Multiplex header Each incoming AES subframe includes a 4-bit preamble from which only the block start information (Z bit) is necessary in a rigid multiplex. The four bit periods from each AES preamble are assigned to the mul
40、tiplex header. The header is thus 64 bits long. Bits 0 through 3 in the header are assigned to multiplex frame sync (a code violation sequence). Bits 4 through 35 are assigned to carrier data bits and organized as four bytes with MSB first. Bit 36 is assigned to an optional carrier data block start
41、bit (CB bit). Bit 37 is assigned to a parity bit (CP) which ensures even parity across the carrier data bits and the CB bit. Bit 38 is assigned to the multi-channel flag bit (MC). Bits 39 through 54 (A bits) are assigned in sequential order. Bit 55 is assigned to the block start (Z 1-2 bit) for the
42、first AES pair (channels 1 and 2). Bit 56 is assigned to the block start (Z 3-4 bit) for the second AES pair (channels 3 and 4). Bit 57 is assigned to the block start (Z 5-6 bit) for the third AES pair (channels 5 and 6). Bit 58 is assigned to the block start (Z 7-8 bit) for the fourth AES pair (cha
43、nnels 7 and 8). Bit 59 is assigned to the block start (Z 9-10 bit) for the fifth AES pair (channels 9 and 10). Bit 60 is assigned to the block start (Z 11-12 bit) for the sixth AES pair (channels 11 and 12). Bit 61 is assigned to the block start (Z 13-14 bit) for the seventh AES pair (channels 13 an
44、d 14). SMPTE 324M-2004 Page 6 of 9 pages Bit 62 is assigned to the block start (Z 15-16 bit) for the eighth AES pair (channels 15 and 16). Each Z bit is set to one in the frame coinciding with the Z preamble in the corresponding AES input. At all other times, the Z bits are set to zero. Bit 63 is as
45、signed to a parity bit (HP bit) that ensures even parity across the MC bit and Z bits. Figure 3 shows the header detail. Sync0 3 4 11 12 19 20 27 28 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63Byte 1MSBLSBMSBLSBByte 2MSBLSBByte 3Z12Z34Z56Z78HPZ910Z1112CBCPMC
46、MSBLSBByte 4Z1314Z1516A1A2A3A4A5A6A7A8A10A11A12A13A14A15A16A9CP SpanHP SpanFigure 3 Header detail 10 Electrical characteristics 10.1 The output interface of the multiplexer is a 1-volt peak-to-peak, 75-ohm coaxial, source-terminated signal, centered on ground. 10.1.1 Output level tolerance shall be
47、10% and the output return loss shall be better than 25 dB from 300 kHz to 50 MHz and better than 15 dB from 50 MHz to 100 MHz. 10.1.2 The rise and fall times, determined between the 10% and 90% amplitude points and measured across a 75-ohm resistive load through 1 meter of high quality coaxial cable
48、 shall be between 5% and 30% of a half-cycle of the highest signaling frequency; i.e., the period of either the high or low state of a data one, or mark. NOTE For example, a 2.0 ns rise time is equal to 10% of the shortest symbol for 48 kHz operation. This results in 7% of the symbol period at 32 kH
49、z and 20% at 96 kHz. Therefore equipment with an output rise time of 2.0 ns (actually a window of 1.5 ns to 3 ns) will meet this specification for operation from 32 kHz to 96 kHz. 10.1.3 Data jitter shall be less than 0.2 unit interval peak to peak. NOTE For example, at 48-kHz operation, the shortest symbol period is 20 ns. At this operating frequency, the jitter shall not exceed 4 ns peak to peak. As the operating frequency is increased, the allowable jitter is proportionately less. 10.2 T
