SNI 10-1391-1989 Ships- steel wire reels《轮船钢丝绞盘》.pdf

相关资源

IRS 70778-2-2018 Recommendations for determining the carrying capacity and fatigue risks of existing metallic railway bridges.pdf

IRS 70712-2018 Rail defects.pdf

IRS 50596-6-2018 Conditions for coding intermodal loading units in combined transport combined transport lines and wagons.pdf

IRS 50596-5-2018 Transport of road vehicles on wagons-Technical Organisation-Conveyance of semi-trailers with P coding or N coding on recess wagons.pdf

IESNA TM-23-2017 Lighting Control Protocols.pdf

IESNA RP-2-2017 Recommended Practice for Retail Lighting.pdf

ITU-R RAPPORT M 766-2 FRENCH-1990 Feasibility of frequency sharing between the GPS and other services《全球定位系统和其他服务之间的频率共享的可行性》.pdf

ITU-R RAPPORT M 763-3 FRENCH-1990 Signal level variation due to multipath effects and blockage by ship-s superstructure in maritime mobile-satellite service lin.pdf

ITU-R RAPPORT M 739-1 FRENCH-1986 Interference due to intermodulation products in the land mobile service between 25 and 100 MHz《由于互调产物在陆地移动服务25和100 MHz之间产生的干扰》.pdf

ITU-R RAPPORT M 319-7 FRENCH-1990 Characteristics of equipment and principles governing the assignment of frequency channels between 25 and 100 MHz for land mob.pdf

猜你喜欢

JEDEC JESD82-29A-2010 Definition of the SSTE32882 Registering Clock Driver with Parity and Quad Chip Selects for DDR3 DDR3L DDR3U RDIMM 1 5 V 1 35 V 1 25 V Applications.pdf

JEDEC JESD82-30-2014 LRDIMM DDR3 Memory Buffer (MB) Version 1 0.pdf

JEDEC JESD82-31-2016 DDR4 Registering Clock Driver - DDR4RCD01.pdf

JEDEC JESD82-32-2016 DDR4 Data Buffer Defintion (DDR4DB01).pdf

JEDEC JESD82-3B-2004 Definition of the SSTVN16857 2 5-2 6 V 14-Bit SSTL 2 Registered Buffer for PC1600 PC2100 PC2700 and PC3200 DDR DIMM Applications《PC1600 PC2700 和PC3200 DDR DIMM.pdf

JEDEC JESD82-4B-2003 Definition of the SSTV16859 2 5 V 13-Bit to 26-Bit SSTL 2 Registered Buffer for Stacked DDR DIMM Applications《管组DDR DIMM应用程序的注册缓冲器 SSTV16859 2 5 V 13位和26位 SSTL.pdf

JEDEC JESD82-5-2002 Description of a 3 3 V Zero Delay Clock Distribution Device Compliant with JESD21-C PC133 Registered DIMM Specification《符合JESD21-C PC133 注册DIMM应用软件的3 3V 零延迟分布装置.pdf

JEDEC JESD82-6A-2004 Definition of the SSTV32852 2 5-V 24-Bit to 48-Bit SSTL 2 Registered Buffer for 1U Stacked DDR DIMM Applications《SSTV32852 2 5V 24位和48位 SSTL 2的定义 1U管组 DDR DIMM.pdf

JEDEC JESD82-7A-2004 Definition of the SSTU32864 1 8-V Configurable Registered Buffer for DDR2 RDIMM Applications《SSTU32866的定义 DDR2 RDIMM应用软件28位1 2注册缓冲器》.pdf