IEC 60191-6-18-2010 Mechanical standardization of semiconductor devices - Part 6-18 General rules for the preparation of outline drawings of surface mounted semiconductor device pa.pdf

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1、 IEC 60191-6-18Edition 1.0 2010-01INTERNATIONAL STANDARD NORME INTERNATIONALEMechanical standardization of semiconductor devices Part 6-18: General rules for the preparation of outline drawings of surface mounted semiconductor device packages Design guide for ball grid array (BGA) Normalisation mcan

2、ique des dispositifs semiconducteurs Partie 6-18: Rgles gnrales pour la prparation des dessins dencombrement des dispositifs semiconducteurs pour montage en surface Guide de conception pour les botiers matriciels billes (BGA) IEC60191-6-18:2010 THIS PUBLICATION IS COPYRIGHT PROTECTED Copyright 2010

3、IEC, Geneva, Switzerland All rights reserved. Unless otherwise specified, no part of this publication may be reproduced or utilized in any form or by any means, electronic or mechanical, including photocopying and microfilm, without permission in writing from either IEC or IECs member National Commi

4、ttee in the country of the requester. If you have any questions about IEC copyright or have an enquiry about obtaining additional rights to this publication, please contact the address below or your local IEC member National Committee for further information. Droits de reproduction rservs. Sauf indi

5、cation contraire, aucune partie de cette publication ne peut tre reproduite ni utilise sous quelque forme que ce soit et par aucun procd, lectronique ou mcanique, y compris la photocopie et les microfilms, sans laccord crit de la CEI ou du Comit national de la CEI du pays du demandeur. Si vous avez

6、des questions sur le copyright de la CEI ou si vous dsirez obtenir des droits supplmentaires sur cette publication, utilisez les coordonnes ci-aprs ou contactez le Comit national de la CEI de votre pays de rsidence. IEC Central Office 3, rue de Varemb CH-1211 Geneva 20 Switzerland Email: inmailiec.c

7、h Web: www.iec.ch About the IEC The International Electrotechnical Commission (IEC) is the leading global organization that prepares and publishes International Standards for all electrical, electronic and related technologies. About IEC publications The technical content of IEC publications is kept

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17、 02 11 Fax: +41 22 919 03 00 IEC 60191-6-18Edition 1.0 2010-01INTERNATIONAL STANDARD NORME INTERNATIONALEMechanical standardization of semiconductor devices Part 6-18: General rules for the preparation of outline drawings of surface mounted semiconductor device packages Design guide for ball grid ar

18、ray (BGA) Normalisation mcanique des dispositifs semiconducteurs Partie 6-18: Rgles gnrales pour la prparation des dessins dencombrement des dispositifs semiconducteurs pour montage en surface Guide de conception pour les botiers matriciels billes (BGA) INTERNATIONAL ELECTROTECHNICAL COMMISSION COMM

19、ISSION ELECTROTECHNIQUE INTERNATIONALE RICS 31.080.01 PRICE CODECODE PRIXISBN 2-8318-1074-0 Registered trademark of the International Electrotechnical Commission Marque dpose de la Commission Electrotechnique Internationale 2 60191-6-18 IEC:2010 CONTENTS FOREWORD.3 1 Scope.5 2 Normative references .

20、5 3 Terms and definitions .5 4 Terminal position numbering.6 5 Nominal package dimension .6 6 Symbols and drawings7 7 Dimensions 10 8 Recommended BGA variations .16 Bibliography20 Figure 1 Cavity down type7 Figure 2 Cavity up type 8 Figure 3 Pattern of terminal position areas.9 Figure 4 Example of t

21、he terminal depopulations.15 Table 1 Group 1: Dimensions appropriate to mounting and interchangeability10 Table 2 Group 2: Dimensions appropriate to mounting and gauging.13 Table 3 Combinations of D, E, e, MD, ME, and n 14 Table 4 P-BGA (Cavity up) 1,27 mm pitch16 Table 5 P-BGA (Cavity up) 1,0 mm pi

22、tch16 Table 6 P-BGA (Cavity down) 1,27 mm pitch18 Table 7 T-BGA 1,27 mm pitch 18 Table 8 T-BGA 1,0 mm pitch19 Table 9 P-BGA and C-BGA (Flip-chip interconnection) 1,0 mm pitch.19 60191-6-18 IEC:2010 3 INTERNATIONAL ELECTROTECHNICAL COMMISSION _ MECHANICAL STANDARDIZATION OF SEMICONDUCTOR DEVICES Part

23、 6-18: General rules for the preparation of outline drawings of surface mounted semiconductor device packages Design guide for ball grid array (BGA) FOREWORD 1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising all national electrotechnica

24、l committees (IEC National Committees). The object of IEC is to promote international co-operation on all questions concerning standardization in the electrical and electronic fields. To this end and in addition to other activities, IEC publishes International Standards, Technical Specifications, Te

25、chnical Reports, Publicly Available Specifications (PAS) and Guides (hereafter referred to as “IEC Publication(s)”). Their preparation is entrusted to technical committees; any IEC National Committee interested in the subject dealt with may participate in this preparatory work. International, govern

26、mental and non-governmental organizations liaising with the IEC also participate in this preparation. IEC collaborates closely with the International Organization for Standardization (ISO) in accordance with conditions determined by agreement between the two organizations. 2) The formal decisions or

27、 agreements of IEC on technical matters express, as nearly as possible, an international consensus of opinion on the relevant subjects since each technical committee has representation from all interested IEC National Committees. 3) IEC Publications have the form of recommendations for international

28、 use and are accepted by IEC National Committees in that sense. While all reasonable efforts are made to ensure that the technical content of IEC Publications is accurate, IEC cannot be held responsible for the way in which they are used or for any misinterpretation by any end user. 4) In order to p

29、romote international uniformity, IEC National Committees undertake to apply IEC Publications transparently to the maximum extent possible in their national and regional publications. Any divergence between any IEC Publication and the corresponding national or regional publication shall be clearly in

30、dicated in the latter. 5) IEC itself does not provide any attestation of conformity. Independent certification bodies provide conformity assessment services and, in some areas, access to IEC marks of conformity. IEC is not responsible for any services carried out by independent certification bodies.

31、 6) All users should ensure that they have the latest edition of this publication. 7) No liability shall attach to IEC or its directors, employees, servants or agents including individual experts and members of its technical committees and IEC National Committees for any personal injury, property da

32、mage or other damage of any nature whatsoever, whether direct or indirect, or for costs (including legal fees) and expenses arising out of the publication, use of, or reliance upon, this IEC Publication or any other IEC Publications. 8) Attention is drawn to the Normative references cited in this pu

33、blication. Use of the referenced publications is indispensable for the correct application of this publication. 9) Attention is drawn to the possibility that some of the elements of this IEC Publication may be the subject of patent rights. IEC shall not be held responsible for identifying any or all

34、 such patent rights. International Standard IEC 60191-6-18 has been prepared by subcommittee 47D: Mechanical standardization for semiconductor devices, of IEC technical committee 47: Semiconductor devices. This standard cancels and replaces IEC/PAS 60191-6-18 published in 2008. This first edition co

35、nstitutes a technical revision. The text of this standard is based on the following documents: FDIS Report on voting 47D/753A/FDIS 47D/758/RVD Full information on the voting for the approval of this standard can be found in the report on voting indicated in the above table. 4 60191-6-18 IEC:2010 Thi

36、s publication has been drafted in accordance with the ISO/IEC Directives, Part 2. A list of all the parts in the IEC 60191 series, under the general title Mechanical standardization of semiconductor devices, can be found on the IEC website. The committee has decided that the contents of this publica

37、tion will remain unchanged until the maintenance result date indicated on the IEC web site under “http:/webstore.iec.ch“ in the data related to the specific publication. At this date, the publication will be reconfirmed, withdrawn, replaced by a revised edition, or amended. 60191-6-18 IEC:2010 5 MEC

38、HANICAL STANDARDIZATION OF SEMICONDUCTOR DEVICES Part 6-18: General rules for the preparation of outline drawings of surface mounted semiconductor device packages Design guide for ball grid array (BGA) 1 Scope This part of IEC 60191 provides standard outline drawings, dimensions, and recommended var

39、iations for all square ball grid array packages (BGA), whose terminal pitch is 1 mm or larger. 2 Normative references The following referenced documents are indispensable for the application of this document. For dated references, only the edition cited applies. For undated references, the latest ed

40、ition of the referenced document applies. IEC 60191-6, Mechanical standardization of semiconductor devices Part 6: General rules for the preparation of outline drawings of surface mounted semiconductor device packages 3 Terms and definitions For the purposes of this document, the terms and definitio

41、ns given IEC 60191 (series) and the following apply. 3.1 ball grid array BGA a package that has metal balls attached to one side of a substrate in a matrix of at least three rows and three columns; terminals may be missing from some row-column intersections NOTE BGA stands for “Ball Grid Array” in c

42、ompliance with the existing standards (See Annex A). 3.2 plastic ball grid array P-BGA BGA with an organic substrate 3.3 tape ball grid array T-BGA BGA with a polyimide tape substrate 3.4 ceramic ball grid array C-BGA BGA with a ceramic substrate 3.5 P-BGA (Flip chip interconnection) BGA with an org

43、anic substrate and a die bonded to a substrate through metal bumps 6 60191-6-18 IEC:2010 3.6 recommended BGA variation BGA variation with the specific dimensions and ball counts as the first choice for production packages other than recommended BGA variations are the least choice for production to a

44、void endless proliferation of BGA outlines. 4 Terminal position numbering When a package is viewed from the terminal side with the index corner in the bottom left corner position, terminal rows are lettered from bottom to top starting with A, then B, C, AA, AB, etc., while terminal columns are numbe

45、red from left to right starting with 1. Terminal positions are designated by a row-column grid system and shown as alphanumeric identification, e.g., A1, B1, or AC34. The letters I, O, Q, S, X and Z are not used for naming the terminal rows. 5 Nominal package dimension A nominal package dimension is

46、 defined as “the package width (E) length (D)”, which is expressed in the tenths place in millimetre. 60191-6-18 IEC:2010 7 6 Symbols and drawings BGA outline is shown in the Figure 1 and 2. A1(8) (7) E y S (1) S A A4(9) v D (3) MDE A B S X1M bp1 A e (2) SE(ZE) (11) e SD(10) (ZD) (5) (6) ME2 3 4 5 (

47、7) D C B A (10) (2) B v S X2 M (4) S y1IEC 2507/09 The symbols in this figure are explained in IEC 60191-6. Figure 1 Cavity down type 8 60191-6-18 IEC:2010 E 1 2 3 4 5 D C B A A (8) E y S (1) S A1v D (3) MDA B S X1M bpe (2) SE(ZE) e (10) (SD) (5) (6) ME(10) (2) v S X2M (4) S y1(ZD) IEC 2508/09 The s

48、ymbols in this figure are explained in IEC 60191-6. Figure 2 Cavity up type 60191-6-18 IEC:2010 9 Notes relating to Figure 1 and Figure 2: (1) Datum S is defined as the seating plane on which a package free stands by contact of the balls. (2) The distance between the centrelines of any two adjacent

49、rows or columns of balls. (3) The hatched zone indicates the index-marking area where whole index mark will be contained. (4) The profile tolerance that controls of package size and orientation is applied to all four sides of the package outline. (5) The tolerance of position that controls the relationship of the balls applies to all

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