1、 IEC 62343-4-1 Edition 1.0 2016-03 INTERNATIONAL STANDARD Dynamic modules Part 4-1: Software and hardware interface 1 x 9 wavelength selective switch IEC 62343-4-1:2016-03(en) THIS PUBLICATION IS COPYRIGHT PROTECTED Copyright 2016 IEC, Geneva, Switzerland All rights reserved. Unless otherwise specif
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10、wish to give us your feedback on this publication or need further assistance, please contact the Customer Service Centre: csciec.ch. IEC 62343-4-1 Edition 1.0 2016-03 INTERNATIONAL STANDARD Dynamic modules Part 4-1: Software and hardware interface 1 x 9 wavelength selective switch INTERNATIONAL ELEC
11、TROTECHNICAL COMMISSION ICS 33.180.20 ISBN 978-2-8322-3199-9 Registered trademark of the International Electrotechnical Commission Warning! Make sure that you obtained this publication from an authorized distributor. 2 IEC 62343-4-1:2016 IEC 2016 CONTENTS FOREWORD . 3 INTRODUCTION . 5 1 Scope 6 2 No
12、rmative references. 6 3 Terms, definitions and abbreviations 6 3.1 Terms and definitions 6 3.2 Abbreviations 6 4 Basic configuration of WSS interface 7 5 Software interface . 8 6 Hardware interface Electrical connector 11 (informative) Hardware interface details 12 Annex A(informative) DPRAM memory
13、map details and timing charts . 14 Annex B Bibliography . 30 Figure 1 Basic configuration of WSS interface 7 Figure B.1 DPRAM READ CYCLE timing 25 Figure B.2 DPRAM WRITE CYCLE timing . 26 Figure B.3 POWER ON timing 26 Figure B.4 START timing 27 Figure B.5 MASTER RESET timing 27 Figure B.6 SOFT RESET
14、 timing . 28 Figure B.7 DPRAM BUSY timing 28 Figure B.8 ALARM timing . 29 Table 1 Software interface . 9 Table 2 DPRAM memory map 10 Table A.1 Connector form 12 Table A.2 Pin assignment 12 Table A.3 Supply voltages and currents 13 Table A.4 Low voltage TTL thresholds 13 Table A.5 Power consumption 1
15、3 Table B.1 DPRAM memory map specification A 14 Table B.2 DPRAM memory map specification B 15 Table B.3 Signal time specification . 24 IEC 62343-4-1:2016 IEC 2016 3 INTERNATIONAL ELECTROTECHNICAL COMMISSION _ DYNAMIC MODULES Part 4-1: Software and hardware interface 1 x 9 wavelength selective switch
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26、ility that some of the elements of this IEC Publication may be the subject of patent rights. IEC shall not be held responsible for identifying any or all such patent rights. International Standard IEC 62343-4-1 has been prepared by subcommittee SC86C: Fibre optic systems and active devices, of IEC t
27、echnical committee 86: Fibre optics. The text of this standard is based on the following documents: CDV Report on voting 86C/1304/CDV 86C/1346/RVC Full information on the voting for the approval of this standard can be found in the report on voting indicated in the above table. This publication has
28、been drafted in accordance with the ISO/IEC Directives, Part 2. A list of all parts in the IEC 62343 series, published under the general title Dynamic modules, can be found on the IEC website. 4 IEC 62343-4-1:2016 IEC 2016 The committee has decided that the contents of this publication will remain u
29、nchanged until the stability date indicated on the IEC website under “http:/webstore.iec.ch“ in the data related to the specific publication. At this date, the publication will be reconfirmed, withdrawn, replaced by a revised edition, or amended. A bilingual version of this publication may be issued
30、 at a later date. IEC 62343-4-1:2016 IEC 2016 5 INTRODUCTION A wavelength selective switch (WSS) is a dynamic module, which is mainly used in a reconfigurable optical add drop multiplexer (ROADM) system to switch all wavelength signals to their respective required output port in dense wavelength div
31、ision multiplexing (DWDM) networks. The WSS module has one input port and a plurality of output ports (i.e. 1 x N WSS) and can be used reversely, such as N input ports and one output port, depending on its application. It is electrically controlled with software, which directs each wavelength signal
32、 among an input DWDM signal from one input port to the required output port for each wavelength signal. 6 IEC 62343-4-1:2016 IEC 2016 DYNAMIC MODULES Part 4-1: Software and hardware interface 1 x 9 wavelength selective switch 1 Scope This part of IEC 62343 describes and provides specifications for a
33、 software and hardware interface for the 1 x 9 wavelength selective switch. These switches can be controlled by resident firmware with this interface. This standard addresses the configuration and function to control a WSS. This interface is intended to enable a user or host to retrieve the switch s
34、tatus and/or adjust relevant switch and attenuation settings. 2 Normative references The following documents, in whole or in part, are normatively referenced in this document and are indispensable for its application. For dated references, only the edition cited applies. For undated references, the
35、latest edition of the referenced document (including any amendments) applies. IEC 60050-731, International Electrotechnical Vocabulary Chapter 731: Optical fibre communication (available at http:/www.electropedia.org) IEC 62343, Dynamic modules - General and guidance 3 Terms, definitions and abbrevi
36、ations 3.1 Terms and definitions For the purposes of this document, the terms and definitions given in IEC 60050-731 and IEC 62343, as well as the following apply. 3.1.1 wavelength selective switch WSS dynamic module with one or more input ports and one or more output ports, which is mainly used in
37、a reconfigurable optical add drop multiplexer (ROADM) system to switch each wavelength signal on each input port independently to its required output port in DWDM networks Note 1 to entry: It is electrically controlled with software. Note 2 to entry: It can be used inverted, exchanging input and out
38、put ports. Note 3 to entry: Each wavelength signal can be independently attenuated. 3.2 Abbreviations For the purposes of this document, the following abbreviations apply. DWDM dense wavelength division multiplexing WSS wavelength selective switch IEC 62343-4-1:2016 IEC 2016 7 ROADM reconfigurable o
39、ptical add drop multiplexer HC host controller DPRAM dual-port RAM FPGA field programmable gate array DSP digital signal processor R/W read or write RW read and write RO read only CE chip enable OE output enable TxD transmitted data RxD received data 4 Basic configuration of WSS interface The softwa
40、re interface is intended to provide an access to the functions of the WSS module and be the primary interface to command the unit. The HC controls the WSS module by sending control signal, as well as command data, to the WSS module via a 12-bit address bus, a 16-bit data bus, and DPRAM related signa
41、l lines such as Read/Write, Chip Enable, and Output Enable. The HC also receives from the WSS module response signals and status data. Any address within the DPRAM can be written to via the HC, however many of these values will be overwritten upon the application of a command to the WSS module. The
42、addresses, which are identified as inputs, can be found further along in this document. In addition to the DPRAM interface, RS232 serial communication is also supported by the WSS module. The WSS module has a non-volatile memory to store the latest setting when requested. A functional diagram of the
43、 WSS module controls is illustrated in Figure 1 below. Figure 1 Basic configuration of WSS interface Interface DSP/ FPGA DPRAM Address bus (12) DPRAM Date bus (16) DPRAM Control RS232C RxD RS232C TxD MASTER RESET SOFT RESET HC READY ALARM Optical engine Memory WSS module IEC 8 IEC 62343-4-1:2016 IEC
44、 2016 5 Software interface The signals between the HC and the WSS module are low voltage +3,3 V logic levels. The definitions of the signals and memory map are described in Table 1 and Table 2. Annex A provides additional information on pin assignment. Annex B provides additional information DPRAM m
45、emory map and timing charts. IEC 62343-4-1:2016 IEC 2016 9 Table 1 Software interface No Functional block Name Input/output Definitions 1 DPRAM Address (12- bit wide) Input 12-bit address bus of DPRAM. Data (16- bit wide) Input/output 16-bit wide data bus of DPRAM. START Input WSS module start input
46、 signal. This strobe is generated by the HC to command the WSS module to perform a specified task defined in command word 2. This signal is an active low input signal. DONE Output Done output signal. A level high is generated by the WSS module when a specified task is completed. ERROR Output Error o
47、utput signal. A level high is generated by the WSS module when it detects an error condition. BUSY Output Busy output signal. This signal indicates that both the WSS module and HC are trying to access the same dual port RAM address at the same time. This signal is an active low signal. Read/write en
48、able (R/W) input signal. This signal is generated by the HC to enable reading of data from dual port RAM, or writing of data to dual port RAM. Chip enable (CE) input signal. This signal is generated by the HC to select the dual port RAM devices. This signal is an active low signal. 10 IEC 62343-4-1:
49、2016 IEC 2016 No Functional block Name Input/output Definitions Chip output enable (OE) input signal. This signal is generated by the HC to enable the dual port RAM to send out data on the data bus. This signal is an active low signal. 2 RS232C TxD Output Transmitted data (TxD): This signal is active when data is transmitted from the WSS module to the HC. When no data is transmitted, the signal is held in the mark condition. RxD Input Received d
