1、 IEC/TR 62856 Edition 1.0 2013-08 TECHNICAL REPORT RAPPORT TECHNIQUE Documentation on design automation subjects The Birds-eye View of Design Languages (BVDL) Documentation sur les sujets concernant lautomatisation de la conception Langages BVDL (Birds-eye View of Design Languages) IEC/TR 62856:2013
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16、L REPORT RAPPORT TECHNIQUE Documentation on design automation subjects The Birds-eye View of Design Languages (BVDL) Documentation sur les sujets concernant lautomatisation de la conception Langages BVDL (Birds-eye View of Design Languages) INTERNATIONAL ELECTROTECHNICAL COMMISSION COMMISSION ELECTR
17、OTECHNIQUE INTERNATIONALE S ICS 25.040 PRICE CODE CODE PRIX ISBN 978-2-8322-1028-4 Registered trademark of the International Electrotechnical Commission Marque dpose de la Commission Electrotechnique Internationale Warning! Make sure that you obtained this publication from an authorized distributor.
18、 Attention! Veuillez vous assurer que vous avez obtenu cette publication via un distributeur agr. colour inside 2 TR 62856 IEC:2013 CONTENTS FOREWORD . 3 INTRODUCTION . 5 1 Scope 6 2 Structure and content of the Birds-eye View of Design Languages 8 2.1 Structure of the Birds-eye View of Design Langu
19、ages . 8 2.2 Chart of design processes 9 2.3 Table of “Electronic system design” . 10 2.4 Table of “SoC design” 10 2.5 Table of “Mixed-signal verification” and analog block design” . 11 2.6 Table of “Characterization and IP preparation” . 12 2.7 Reading the Birds-eye View of Design Languages 13 2.7.
20、1 General 13 2.7.2 Case 1): Multiple marks in one design object 13 2.7.3 Case 2): Multiple marks in the same design objects in the different processes . 14 3 Use case of the Birds-eye View of Design Languages . 14 3.1 Case 1): Investigation of consistency of flow 14 3.2 Case 2): Evolution of languag
21、e and standardization . 15 3.3 Case 3): Emergence of new technology . 15 4 The Birds-eye View of Design Languages (BVDL), version 1.0 . 15 4.1 Design processes 15 4.2 Electronic system design . 16 4.3 SoC design 17 4.4 Mixed-signal verification and analog block design 20 4.5 Characterization and IP
22、preparation . 21 Figure 1 Electronic design ecosystem 7 Figure 2 Chart and table of BVDL 8 Figure 3 Structure of the table 9 Figure 4 Chart of design processes 9 Figure 5 “Electronic system design” table . 10 Figure 6 Part of “SoC design” table 11 Figure 7 Part of “Mixed-signal verification and anal
23、og block design” table 12 Figure 8 “Characterization and IP preparation” table 13 Figure 9 Multiple marks in one design object 14 Figure 10 Multiple marks in the same design objects in the different processes . 14 Figure 11 Chart of design processes 15 TR 62856 IEC:2013 3 INTERNATIONAL ELECTROTECHNI
24、CAL COMMISSION _ DOCUMENTATION ON DESIGN AUTOMATION SUBJECTS THE BIRDS-EYE VIEW OF DESIGN LANGUAGES (BVDL) FOREWORD 1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising all national electrotechnical committees (IEC National Committees). Th
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35、technical committees is to prepare International Standards. However, a technical committee may propose the publication of a technical report when it has collected data of a different kind from that which is normally published as an International Standard, for example “state of the art“. IEC 62856, w
36、hich is a technical report, has been prepared by IEC technical committee 91: Electronics assembly technology: The text of this technical report is based on the following documents: Enquiry draft Report on voting 91/1085/DTR 91/1101/RVC Full information on the voting for the approval of this technica
37、l report can be found in the report on voting indicated in the above table. This publication has been drafted in accordance with the ISO/IEC Directives, Part 2. The committee has decided that the contents of this publication will remain unchanged until the stability date indicated on the IEC web sit
38、e under “http:/webstore.iec.ch“ in the data related to the specific publication. At this date, the publication will be 4 TR 62856 IEC:2013 reconfirmed, withdrawn, replaced by a revised edition, or amended. IMPORTANT The colour inside logo on the cover page of this publication indicates that it conta
39、ins colours which are considered to be useful for the correct understanding of its contents. Users should therefore print this document using a colour printer. TR 62856 IEC:2013 5 INTRODUCTION The automation of design and manufacturing technologies in electronic industries has been evolving world-wi
40、de for over three decades with remarkable development speed. Electronic design automation (EDA) technology enables the conceptualization, implementation and validation of electronic systems, that is, transforms the ideas and objectives of the system designers into manufacturable and testable represe
41、ntations in a cost-effective way. It is classified into three key categories such as design methodologies, design libraries and design tools. Standardization involves computer-sensible representations throughout the overall design processes which integrate design libraries and design tools to build
42、a design ecosystem. In the semiconductor industry EDA technologies have been substantially contributing to the unprecedented industry growth for three decades. To emerging new product lines such as microcontroller, microprocessor, ASIC, FPGA, memories, analog and mixed-signal and System on a chip (S
43、oC) they have been continuously providing a wide range of solutions to meet critical requirements on design productivity enhancement and design quality improvement. The EDA technical committee (EDA-TC) was formed in JEITA in 1990 in order to take initiatives for international EDA standardization in
44、Japan. Since then, it has been contributing design language standardization such as EDIF, VHDL, Verilog HDL, Delay and Power Calculation (DPC), System C, System Verilog and Power Format, which led to forming the new working group at which experts from the industry and academia were invited and to wo
45、rk with IEC TC93, IEEE DASC, Accellera, Open SystemC Initiatives (OSCI) and others. After having been active for over two decades the need was felt for a birds-eye view of the existing tens of design languages, and to enhance or develop them in order to set the strategy towards international EDA sta
46、ndardization. EDA-TC initiated the project in early 2009 to develop the Birds-eye View of Design Languages (BVDL) spreadsheet documentation. It developed the first version in March 2010, in order to have an important participation of design technology experts from the semiconductor industry and acad
47、emia. It finalized the BVDL documentation combined with the spreadsheet as a JEITA technical report in March 2011. 6 TR 62856 IEC:2013 DOCUMENTATION ON DESIGN AUTOMATION SUBJECTS THE BIRDS-EYE VIEW OF DESIGN LANGUAGES (BVDL) 1 Scope The BVDL originally aims to make full use of planning and decision-
48、making on EDA standardization activities for a technical expert as well as a manager in JEITA. It facilitates the understanding of the various design languages to show their positioning and features. Also it provides easy overviews of each design language for a newcomer to the EDA standards communit
49、y and/or for a designer as a user of an EDA design ecosystem. Especially for a design language developer that aims to directly join design language development and voting for standardization, it provides metrics to check for duplication among similar languages, consistency to develop the design ecosystem and future challenges for design languages. EDA standards provide a mechanism to define common semantics for electr
