1、ANSI INCITS 340-2000(formerly ANSI NCITS 340-2000)for Information Technology AT Attachment with Packet Interface - 5(ATA/ATAPI-5)Copyright American National Standards Institute Provided by IHS under license with ANSI Not for ResaleNo reproduction or networking permitted without license from IHS-,-,-
2、Copyright American National Standards Institute Provided by IHS under license with ANSI Not for ResaleNo reproduction or networking permitted without license from IHS-,-,-ANSINCITS 340-2000American National Standardfor Information Technology AT Attachment with Packet Interface - 5(ATA/ATAPI-5)Secret
3、ariatInformation Technology Industry CouncilApproved December 13, 2000 American National Standards Institute, Inc.AbstractThis standard specifies the AT Attachment Interface between host systems and storage devices. It pro-vides a common attachment interface for systems manufacturers, system integra
4、tors, software suppliers,and suppliers of intelligent storage devices. It includes the Packet Command feature set implemented bydevices commonly known as ATAPI devices.This standard maintains a high degree of compatibility with the AT Attachment Interface with Packet Inter-face Extensions (ATA/ATAPI
5、-4), NCITS 317-1998, and while providing additional functions, is not intend-ed to require changes to presently installed devices or existing software.Copyright American National Standards Institute Provided by IHS under license with ANSI Not for ResaleNo reproduction or networking permitted without
6、 license from IHS-,-,-Approval of an American National Standard requires review by ANSI that therequirements for due process, consensus, and other criteria for approval havebeen met by the standards developer.Consensus is established when, in the judgement of the ANSI Board ofStandards Review, subst
7、antial agreement has been reached by directly andmaterially affected interests. Substantial agreement means much more thana simple majority, but not necessarily unanimity. Consensus requires that allviews and objections be considered, and that a concerted effort be madetowards their resolution.The u
8、se of American National Standards is completely voluntary; theirexistence does not in any respect preclude anyone, whether he has approvedthe standards or not, from manufacturing, marketing, purchasing, or usingproducts, processes, or procedures not conforming to the standards.The American National
9、Standards Institute does not develop standards andwill in no circumstances give an interpretation of any American NationalStandard. Moreover, no person shall have the right or authority to issue aninterpretation of an American National Standard in the name of the AmericanNational Standards Institute
10、. Requests for interpretations should beaddressed to the secretariat or sponsor whose name appears on the titlepage of this standard.CAUTION NOTICE: This American National Standard may be revised orwithdrawn at any time. The procedures of the American National StandardsInstitute require that action
11、be taken periodically to reaffirm, revise, orwithdraw this standard. Purchasers of American National Standards mayreceive current information on all standards by calling or writing the AmericanNational Standards Institute.American National StandardPublished byAmerican National Standards Institute, I
12、nc.11 West 42nd Street, New York, NY 10036Copyright 2000 by Information Technology Industry Council (ITI)All rights reserved.No part of this publication may be reproduced in anyform, in an electronic retrieval system or otherwise,without prior written permission of ITI, 1250 Eye Street NW, Washingto
13、n, DC 20005. Printed in the United States of AmericaCAUTION: The developers of this standard have requested that holders of patents that may be re-quired for the implementation of the standard disclose such patents to the publisher. However, nei-ther the developers nor the publisher have undertaken
14、a patent search in order to identify which, ifany, patents may apply to this standard. As of the date of publication of this standard, followingcalls for the identification of patents that may be required for the implementation of the standard,notice of one or more such claims has been received. By
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17、to avoid infringement in the use ofthis standard.Copyright American National Standards Institute Provided by IHS under license with ANSI Not for ResaleNo reproduction or networking permitted without license from IHS-,-,-iContentsPageForeword. viiIntroduction ix1 Scope12 Normative references .12.1 Ap
18、proved references 12.2 References under development22.3 Other references.23 Definitions, abbreviations, and conventions23.1 Definitions and abbreviations23.2 Conventions54 Interface physical and electrical requirements94.1 Cable configuration.94.2 Electrical characteristics .105 Interface signal ass
19、ignments and descriptions.135.1 Signal summary135.2 Signal descriptions146 General operational requirements 196.1 Command delivery196.2 Register delivered data transfer command sector addressing .196.3 Interrupts.216.4 General feature set .216.5 Multiword DMA236.6 Ultra DMA feature set .246.7 Host d
20、etermination of cable type by detecting CBLID- .266.8 PACKET Command feature set286.9 Overlapped feature set .296.10 Queued feature set .306.11 Power Management feature set316.12 Advanced Power Management feature set.346.13 Security Mode feature set.346.14 Self-monitoring, analysis, and reporting te
21、chnology feature set .396.15 Host Protected Area feature set .416.16 CFA feature set.456.17 Removable Media Status Notification and Removable Media feature sets456.18 Power-Up In Standby feature set477 Interface register definitions and descriptions 487.1 Device addressing considerations 487.2 I/O r
22、egister descriptions547.3 Alternate Status register .557.4 Command register 557.5 Cylinder High register .567.6 Cylinder Low register 567.7 Data port .577.8 Data register .587.9 Device Control register .587.10 Device/Head register 597.11 Error register.607.12 Features register.61Copyright American N
23、ational Standards Institute Provided by IHS under license with ANSI Not for ResaleNo reproduction or networking permitted without license from IHS-,-,-iiPage7.13 Sector Count register617.14 Sector Number register.627.15 Status register.628 Command descriptions .658.1 CFA ERASE SECTORS .668.2 CFA REQ
24、UEST EXTENDED ERROR CODE 688.3 CFA TRANSLATE SECTOR 718.4 CFA WRITE MULTIPLE WITHOUT ERASE738.5 CFA WRITE SECTORS WITHOUT ERASE 758.6 CHECK POWER MODE.778.7 DEVICE RESET788.8 DOWNLOAD MICROCODE .808.9 EXECUTE DEVICE DIAGNOSTIC .818.10 FLUSH CACHE.838.11 GET MEDIA STATUS.858.12 IDENTIFY DEVICE .878.1
25、3 IDENTIFY PACKET DEVICE1058.14 IDLE 1178.15 IDLE IMMEDIATE.1198.16 INITIALIZE DEVICE PARAMETERS1208.17 MEDIA EJECT 1238.18 MEDIA LOCK1248.19 MEDIA UNLOCK.1268.20 NOP 1288.21 PACKET1308.22 READ BUFFER.1358.23 READ DMA .1378.24 READ DMA QUEUED.1398.25 READ MULTIPLE .1428.26 READ NATIVE MAX ADDRESS.14
26、58.27 READ SECTOR(S) .1478.28 READ VERIFY SECTOR(S) .1498.29 SECURITY DISABLE PASSWORD .1518.30 SECURITY ERASE PREPARE 1538.31 SECURITY ERASE UNIT .1548.32 SECURITY FREEZE LOCK1568.33 SECURITY SET PASSWORD1588.34 SECURITY UNLOCK1608.35 SEEK 1628.36 SERVICE 1648.37 SET FEATURES.1658.38 SET MAX 1708.3
27、9 SET MULTIPLE MODE.1808.40 SLEEP 1828.41 SMART .1848.42 STANDBY.2098.43 STANDBY IMMEDIATE2118.44 WRITE BUFFER.2138.45 WRITE DMA .2148.46 WRITE DMA QUEUED.2168.47 WRITE MULTIPLE2208.48 WRITE SECTOR(S) .2239 Protocol.2259.1 Power-on and hardware reset protocol.2289.2 Software reset protocol.2329.3 Bu
28、s idle protocol .236Copyright American National Standards Institute Provided by IHS under license with ANSI Not for ResaleNo reproduction or networking permitted without license from IHS-,-,-iiiPage9.4 Non-data command protocol 2469.5 PIO data-in command protocol.2489.6 PIO data-out command protocol
29、.2529.7 DMA command protocol .2559.8 PACKET command protocol.2589.9 READ/WRITE DMA QUEUED command protocol.2709.10 EXECUTE DEVICE DIAGNOSTIC command protocol 2749.11 DEVICE RESET command protocol.2789.12 Signature and persistence 2809.13 Ultra DMA data-in commands.2819.14 Ultra DMA data-out commands
30、 2839.15 Ultra DMA CRC rules2869.16 Single device configurations .28810 Timing .28910.1 Deskewing 28910.2 Transfer timing289Tables1 Byte order .92 Byte order .93 DC characteristics.104 AC characteristics.105 Driver types and required termination.116 Typical series termination for Ultra DMA 137 Inter
31、face signal name assignments 148 Host detection of CBLID- 289 Security mode command actions3910 Device repsonse to DOIW-/DOIR-4911 Device is not selected, DMACK- is not asserted 5012 Device is selected, DMACK- is not asserted 5113 Device is selected, DMACK- is asserted (for Multiword DMA only)5214 D
32、evice 1 is selected and Device 0 is responding for Device 1 .5315 Device is in Sleep mode, DEVICE RESET is not implemented,DMACK- is not asserted.5416 Device is in Sleep mode, DEVICE RESET is implemented, DMACK- isnot asserted5417 Extended error codes .7018 CFA TRANSLATE SECTOR information .7219 Dia
33、gnostic codes 8320 IDENTIFY DEVICE information 8921 Minor revision number 10022 IDENTIFY PACKET DEVICE information.10823 Automatic standby timer periods 118Copyright American National Standards Institute Provided by IHS under license with ANSI Not for ResaleNo reproduction or networking permitted wi
34、thout license from IHS-,-,-ivPage24 Security password content15325 SECURITY ERASE UNIT password.15626 SECURITY SET PASSWORD data content.16027 Identifier and security level bit interaction .16028 SET FEATURES register definitions 16729 Transfer/mode values .16830 Advanced power management levels.169
35、31 SET MAX Features register values 17132 SET MAX SET PASSWORD data content .17533 SMART Feature register values18434 SMART EXECUTE OFF-LINE IMMEDIATE Sector Number registervalues .19235 Device SMART data structure 19536 Off-line data collection status byte values.19537 Self-test execution status by
36、te values.19638 Log address definition.19839 SMART log directory.19940 SMART error log sector 20041 Error log data structure .20142 Command data structure 20143 Error data structure.20244 State field values.20245 Self-test log data structure20346 Self-test log descriptor entry .20347 Equations for p
37、arallel generation of a CRC polynomial 28748 Register transfer to/from device29149 PIO data transfer to/from device.29350 Multiword DMA data transfer 29451 Ultra DMA data burst timing requirements300Figures1 State diagram convention .72 Ultra DMA termination with pull-up or pull-down.133 PDIAG- exam
38、ple using an 80-conductor cable assembly 174 Cable select example185 Alternate cable select example.186 Example configuration of a system with a 40-conductor cable.27Copyright American National Standards Institute Provided by IHS under license with ANSI Not for ResaleNo reproduction or networking pe
39、rmitted without license from IHS-,-,-vPage7 Example configuration of a system where the host detects a 40-conductor cable 278 Example configuration of a system where the host detects an 80-conductor cable 289 Power management state diagram.3210 Security mode state diagram 3611 SET MAX security state
40、 diagram4312 Overall host protocol state sequence .22613 Overall device protocol state sequence22714 Host power-on or hardware reset state diagram 22815 Device power-on or hardware reset state diagram.22916 Host software reset state diagram23217 Device 0 software reset state diagram .23318 Device 1
41、software reset state diagram .23519 Host bus idle state diagram 23620 Additional host bus idle state diagram with overlap or overlap andqueuing.23821 Device bus idle state diagram.24122 Additional device bus idle state diagram with overlap or overlap andqueuing.24323 Host non-data state diagram 2472
42、4 Device non-data state diagram.24725 Host PIO data-in state diagram 24926 Device PIO data-in state diagram.25127 Host PIO data-out state diagram 25328 Device PIO data-out state diagram.25429 Host DMA state diagram.25630 Device DMA state diagram .25731 Host PACKET non-data and PIO data command state
43、 diagram25932 Device PACKET non-data and PIO data command state diagram 26233 Host PACKET DMA command state diagram 26534 Device PACKET DMA command state diagram.26835 Host DMA QUEUED state diagram 27136 Device DMA QUEUED command state diagram27337 Host EXECUTE DEVICE DIAGNOSTIC state diagram27538 D
44、evice 0 EXECUTE DEVICE DIAGNOSTIC state diagram .27639 Device 1 EXECUTE DEVICE DIAGNOSTIC command state diagram 27740 Host DEVICE RESET command state diagram .279Copyright American National Standards Institute Provided by IHS under license with ANSI Not for ResaleNo reproduction or networking permit
45、ted without license from IHS-,-,-viPage41 Device DEVICE RESET command state diagram27942 Example parallel CRC generator 28743 Register transfer to/from device29044 PIO data transfer to/from device.29245 Initiating a Multiword DMA data transfer .29546 Sustaining a Multiword DMA data transfer29647 Dev
46、ice terminating a Multiword DMA data transfer.29748 Host terminating a Multiword DMA data transfer 29849 Initiating an Ultra DMA data-in burst .30150 Sustained Ultra DMA data-in burst .30251 Host pausing an Ultra DMA data-in burst .30352 Device terminating an Ultra DMA data-in burst.30453 Host termi
47、nating an Ultra DMA data-in burst 30554 Initiating an Ultra DMA data-out burst.30655 Sustained Ultra DMA data-out burst .30756 Device pausing an Ultra DMA data-out burst30857 Host terminating an Ultra DMA data-out burst30958 Device terminating an Ultra DMA data-out burst 310AnnexesA Connectors and c
48、able assemblies311B Device determination of cable type.331C Identify device data for devices with more than 1024 logical cylinders.334D Signal integrity and UDMA implementation guide.337E Bibliography 378F ATA command set summary 379Copyright American National Standards Institute Provided by IHS und
49、er license with ANSI Not for ResaleNo reproduction or networking permitted without license from IHS-,-,-viiForeword (This foreword is not part of American National Standard ANSI NCITS 340-2000.)This AT Attachment with Packet Interface -5 (ATA/ATAPI-5) standard is designed tomaintain a high degree of com
