1、BRITISH STANDARD BS CECC 90105:1987 Incorporating Amendment Nos. 1 and 2 Specification for Harmonized system of quality assessment for electronic components Blank detail specification Fusible link programmable bipolar read only memories, silicon monolithic integrated circuitsBSCECC90105:1987 BSI 10-
2、1999 ISBN 0 580 35657 4 Amendments issued since publication Amd. No. Date of issue Comments 5732 August 1987 8163 March 1994 Indicated by a sideline in the marginBSCECC90105:1987 BSI 10-1999 i Contents Page National foreword ii Foreword iii Text of CECC 90105 1BSCECC90105:1987 ii BSI 10-1999 Nationa
3、l foreword This British Standard has been prepared under the direction of the Electronic Components Standards committee. It is identical with CENELEC Electronic Components Committee (CECC)90105:1986 Harmonized system of quality assessment for electronic components. Blank detail specification: Fusibl
4、e link programmable bipolar read only memories, silicon monolithic integrated circuits. This standard is a harmonized specification within the CECC System. This standard supersedes BS CECC90105:1983 which is withdrawn. Terminology and conventions. The text of the CECC specification has been approved
5、 as suitable for publication as a British Standard without deviation. Some terminology and certain conventions are not identical with those used in British Standards; attention is drawn especially to the following. The comma has been used as a decimal marker. In British Standards it is current pract
6、ice to use a full point on the baseline as the decimal marker. Cross-references. The British Standard which implements CECC00100 is BS9000: “General requirements for a system for electronic components of assessed quality Part2:1983 “Specification for national implementation of CECC basic rules and r
7、ules of procedure”. The Technical Committee has reviewed the provisions of IEC747, to which reference is made in the text, and has decided that they are acceptable for use in conjunction with this standard. Scope. This standard lists the ratings, characteristics and inspection requirements which sha
8、ll be included as mandatory requirements in accordance with BSCECC90100 in any detail specification for these devices. Detail specification layout. The front page layout of detail specifications released to BS CECC family or blank detail specifications will be in accordance with BS 90000 Circular le
9、tter No.15. A British Standard does not purport to include all the necessary provisions of a contract. Users of British Standards are responsible for their correct application. Compliance with a British Standard does not of itself confer immunity from legal obligations. International Standards a Cor
10、responding British Standards IEC 68-2-30:1980 BS 2011 Basic environmental testing procedures Part 2.1Db:1981 Test Db and guidance. Damp heat cyclic (12 + 12 hour cycle) (Identical) IEC 617-12:1983 BS 3939 Guide for graphical symbols for electrical power, telecommunications and electronics diagrams P
11、art 12:1985 Binary logic elements (Identical) CECC 90000:1985 BS CECC 90000:1985 Harmonized system of quality assessment for electronic components. Generic specification: monolithic integrated circuits (Identical) CECC 90100:1986 BS CECC 90100:1986 Harmonized system of quality assessment for electro
12、nic components. Sectional specification: digital monolithic integrated circuits (Identical) a Undated in text. Summary of pages This document comprises a front cover, an inside front cover, pages i and ii, the CECC title page, pages ii to iv, pages 1 to 13 and a back cover. This standard has been up
13、dated (see copyright date) and may have had amendments incorporated. This will be indicated in the amendment table on the inside front cover.BSCECC90105:1987 ii BSI 10-1999 Contents Page Foreword iii General 1 1 Type description 2 2 Operating characteristics 3 3 Identification of the device types 7
14、4 Test and measurement procedures 8 5 Structural similarity of memories 9 6 Qualification approval procedures 9 7 Capability approval procedures 9 8 Screening procedures 9 9 Inspection requirements 10BSCECC90105:1987 BSI 10-1999 iii Foreword The CENELEC Electronic Components Committee (CECC) is comp
15、osed of those member countries of the European Committee for Electrotechnical Standardization (CENELEC) who wish to take part in a harmonized System for electronic components of assessed quality. The object of the System is to facilitate international trade by the harmonization of the specifications
16、 and quality assessment procedures for electronic components, and by the grant of an internationally recognized Mark, or Certificate, of Conformity. The components produced under the System are thereby accepted by all member countries without further testing. This specification has been formally app
17、roved by the CECC, and has been prepared for those countries taking part in the System who wish to issue national harmonized specifications for FUSIBLE LINK PROGRAMMABLE BIPOLAR READ ONLY MEMORIES SILICON MONOLITHIC INTEGRATED CIRCUITS. It should be read in conjunction with the current regulations f
18、or the CECC System. At the date of printing of this specification the member countries of the CECC are Austria, Belgium, Denmark, Finland, France, Germany, Ireland, Italy, the Netherlands, Norway, Portugal, Spain, Sweden, Switzerland, and theUnitedKingdom. Preface This blank detail specification (BD
19、S) was prepared by CECC WG9 “Integrated circuits”. It is based, wherever possible, on the Publication of the International Electrotechnical Commission and in particular on IEC747: Semiconductor devices Discrete devices and integrated circuits. The text of this second issue consists of the text of CE
20、CC90105 issue1 (1983) amended in accordance with the ratified new material introduced by the following documents: It is recognized that the layout proposed cannot be applied to all detail specifications based on this document. For instance, it may be preferable to indicate the limiting values in the
21、 form of a table when several similar devices appear in the same detail specification. In accordance with the decision of the CECC Management Committee this specification is published initially in English and French. The German text will follow as soon as it has been prepared. Effective date This se
22、cond issue of CECC90105 shall become effective for all new qualification approvals on1January1987. Issue1will continue to remain effective for all past approvals. Documents Date of Voting Report on the Voting CECC(Secretariat) 1685 February 1985 CECC(Secretariat) 1850iv blankBSCECC90105:1987 BSI 10-
23、1999 1 General The following information is given for guidance. Scope This BDS relates to Fusible Link Programmable Bipolar Read Only memories in accordance with IEC747: Semiconductor devices Discrete devices and integrated circuits. Related documents See 2.1 of CECC90100 and 2.2 of CECC90000 Struct
24、ure of Detail Specifications Clause numbering of DS shall be in accordance with that of this document. Units, symbols and terminology See 2.3 of CECC90100 and 2.3 of CECC90000 Application of Quality Assessment Procedures See 3 of CECC90100 and CECC90000.BSCECC90105:1987 2 BSI 10-1999 Layout for fron
25、t page of detail specificationBSCECC90105:1987 BSI 10-1999 3 Front page The front page of the DS shall be laid out as shown on the previous page. The numbers between square brackets correspond to the following indications which shall be given: Identification of the DS and of the component: 1 The nam
26、e of the National Standards Organization under whose authority the DS is published and, if applicable, the organization from whom the DS is available. 2 The CECC Symbol and the CECC number allotted to the DS by the CECC General Secretariat. 3 The number and issue number of the CECC generic or sectio
27、nal specification as relevant; also national reference if different. 4 If different from the CECC number, the national number of the DS, date of issue and any further information required by the national system, together with any amendment numbers. 5 Type number, a short description of the type by:
28、function performance, for example variants based on speed, temperature, power etc. 6 Information on typical construction material and type of construction (silicon, monolithic, bipolar, MOS) For 5 and 6 the text to be given in the DS should be suitable for an entry in CECC00200 (QPL) and CECC00300 (
29、Library List). 7 An outline drawing with main dimensions which are of importance for interchangeability, and/or reference to the appropriate national or international document for outlines. Alternatively, this drawing may be given in an annex to the DS. 8 Quality assessment level(s) 9 Reference data
30、 giving information on the most important properties of the component, which allow comparison between the various component types intended for the same, or for similar, applications. The DS shall give a brief description including the following: Structure (words bits) The type of output circuit (for
31、 example three state) Essential functions The memories which are description in this BDS are read only and not re-programmable. The logic state of the internal cells is defined by the presence or the absence of link fusion of the related cell. Identification of the component and supplementary inform
32、ation: Description of the materials for the package (for example, glass, ceramic, metal, plastic) and information relating to the mounting (welding, soldering), lead material and finish. Inside the sketch of the package, the terminal connections to the inputs, outputs or other important points of th
33、e circuit shall be identified. This can be shown by a functional block diagram. Description of the numbering of the terminals with the identification of pin number1. Marking on the device in accordance with the GS (see 2.5 of CECC90000). 2 Operating characteristics The following characteristics shal
34、l apply over the full operating temperature range and the supply voltage range unless otherwise specified. 2.1 General description The following characteristics shall be given if they are not adequately defined in clause 1: Nominal voltage supply level. Nominal current consumption. Standby current c
35、onsumption. Fuse technology. Possible particular operating modes.BSCECC90105:1987 4 BSI 10-1999 Electrical compatibility (if appropriate): it shall be stated whether the integrated circuit memory is electrically compatible with other particular integrated circuits or families of integrated circuits,
36、 or whether special interfaces are required. Block diagram: the block diagram shall be sufficiently detailed to enable the individual functional units within the memory to be identified with their main input and output paths and the identification of their external connections (chip enable, address
37、decode . . .). The function(s) performed by each terminal. The IEC617-12 symbolic representation shall be given if it exists. The programming conditions are described in the annex of the DS. 2.2 Detailed Functional Specification 2.2.1 Function description This paragraph defines the following charact
38、eristics memory size: the total number of bits of information capable of being stored in the memory circuit memory organisation: the number of bits per word capable of being stored in the memory circuit addressing mode (for example multiplexed, latched, etc.) chip select 1) output enable 1) standby
39、mode truth table (this table will show the output states versus the different combinations between the address inputs and the select inputs) The product is designed to be electrically programmed. The programming operation consists of: This causes the change from the initial logic state to the progra
40、mmed logic state. The initial logic state of the whole memory must be specified. It is possible to modify further the memory content on unprogrammed cells. The normal functioning of the memory does not change its content. The programming conditions are defined in the paragraph 2.2.2. 2.2.2 Programmi
41、ng (writing of a content) The programming operation consists of: This causes the change from the initial logic state to the programmed logic state. This procedure irreversible: once altered, the output for that bit location is permanently programmed. Programming methods and conditions are described
42、by the DS. It is possible to modify further the memory content on unprogrammed cells. The normal functioning of the memory does not change its content. The programming parameters specific of each considered device are described in associated Annex. In this one the parameters may be shown as organigr
43、ams or programming sequences. The different signal configurations and logic levels needed for programming shall be described. 2.2.3 Functional Interchangeability All products described in the same DS are interchangeable after programming. Different products may be programmed under different methods.
44、 Each of these shall be described in an annex to the DS. 1) The chip select and the output enable shall be distinguished. opening by fusion the metal link or fusing of junction opening by fusion the metal link or fusing of junctionBSCECC90105:1987 BSI 10-1999 5 2.3 Limiting conditions of use (rating
45、s) Limiting conditions (ratings) are not for inspection purposes. Values of limiting conditions of use shall be given as follows: Any cautionary statement unique to an individual integrated circuit shall be included, for example any difference between the limiting conditions applicable to the progra
46、mming and read operations shall be given. Any interdependence of limiting conditions shall be specified. If externally connected elements have an influence on the values of the ratings, the ratings shall be prescribed for the integrated circuit with the elements connected for example heatsinks. If t
47、ransient overloads are permitted, their magnitude and durations shall be specified. Where minimum and maximum values differ during programming this should be stated. All voltages are referenced to a reference terminal (GND, etc.). 2.4 Recommended conditions of use and associated characteristics (In
48、accordance with 5.3.8 of CECC90100) Not for inspection purpose. The characteristics shall apply over the full operating temperature range, unless otherwise specified. Where the stated performance of the circuit varies over the operating temperature range, the values of the input and output voltages
49、and their associated currents shall be stated at25 C and at the extremes of the operating temperature range. Values of current and voltage shall be given for each functionally different type of input and/or output. Special characteristics and timing requirements shall be specified. 2.4.1 Recommended conditions of use All voltages are referenced to a reference terminal (GND, etc.). Characteristics Symbol min. max. Unit Supply voltage range V CC V Input voltages V I V Output voltages V
