1、BRITISH STANDARD BS CECC 90301:1985 Incorporating Amendment No. 1 Specification for Harmonized system of quality assessment for electronic components Blank detail specification Integrated line transmitters and receiversBSCECC 90301:1985 BSI 02-2000 ISBN 0 580 35964 6 Amendments issued since publicat
2、ion Amd. No. Date of issue Comments 8295 August 1994 Indicated by a sideline in the marginBSCECC 90301:1985 BSI 02-2000 i Contents Page National foreword ii Foreword ii 1 Front page 1 2 Ratings (limiting values) 3 3 Recommended conditions of use and associated characteristics 3 4 Test conditions and
3、 inspection requirements 13 Figure 1 3 Figure 2 4 Figure 3 5 Figure 4 5 Figure 5 6 Figure 6 7 Figure 7 7 Figure 8 8 Figure 9 9 Figure 10 10BSCECC 90301:1985 ii BSI 02-2000 National foreword This British Standard has been prepared under the direction of the Electronic Components Standards Committee.
4、It is identical with CENELEC Electronic Components Committee (CECC) 90301:1985 “Harmonized system of quality assessment for electronic components. Blank detail specification: Integrated line transmitters and/or receivers” as amended by Amendment No. 1 published in1994. Terminology and conventions. T
5、he text of the CECC specification has been approved as suitable for publication as a British Standard without deviation. Some terminology and certain conventions are not identical with those used in British Standards; attention is drawn especially to the following. The comma has been used as a decim
6、al marker. In British Standards it is current practice to use a full point on the baseline as the decimal marker. Cross-references. The British Standard which implements CECC 00100 is BS9000 “General requirements for a system for electronic components of assessed quality” Part 2 “Specification for n
7、ational implementation of CECC basic rules and rules of procedure”. The Technical Committee has reviewed the provisions of IEC 147, to which reference is made in the text, and has decided that they are acceptable for use in conjunction with this standard. A related British Standard for IEC 147 is BS
8、 9300 “Semiconductor devices of assessed quality: generic data and methods of test”. Scope. This standard lists the ratings, characteristics and inspection requirements which shall be included as mandatory requirements in accordance with BS CECC 90300 in any detail specification for these devices. D
9、etail specification layout. The front page layout of detail specifications released to BS CECC family or blank detail specifications will be in accordance with BS 9000 Circular Letter No. 15. A British Standard does not purport to include all the necessary provisions of a contract. Users of British
10、Standards are responsible for their correct application. Compliance with a British Standard does not of itself confer immunity from legal obligations. International Standards Corresponding British Standards CECC 90000:1982 BS CECC 90000:1982 Harmonized system of quality assessment for electronic com
11、ponents. Generic specification: Monolithic integrated circuits (Identical) CECC 90300:1985 BS CECC 90300:1985 Harmonized system of quality assessment for electronic components. Sectional specification: Interface monolithic integrated circuits (Identical) Summary of pages This document comprises a fr
12、ont cover, an inside front cover, pagesi andii, theCECC title page, page ii, pages1 to18 and a back cover. This standard has been updated (see copyright date) and may have had amendments incorporated. This will be indicated in the amendment table on the inside front cover.BSCECC 90301:1985 ii BSI 02
13、-2000 Foreword The CENELEC Electronic Components Committee (CECC) is composed of those member countries of the European Committee for Electrotechnical Standardization (CENELEC) who wish to take part in a harmonized System for electronic components of assessed quality. The object of the System is to
14、facilitate international trade by the harmonization of the specifications and quality assessment procedures for electronic components, and by the grant of an internationally recognized Mark, or Certificate, of Conformity. The components produced under the System are thereby accepted by all member co
15、untries without further testing. This specification has been formally approved by the CECC, and has been prepared for those countries taking part in the System who wish to issue national harmonized specifications for INTEGRATED LINE TRANSMITTERS AND/OR RECEIVERS. It should be read in conjunction wit
16、h the current regulations for the CECC System. At the date of printing of this specification the member countries of the CECC are Austria, Belgium, Denmark, Finland, France, Germany, Ireland, Italy, the Netherlands, Norway, Portugal, Spain, Sweden, Switzerland, and the UnitedKingdom, Preface This bl
17、ank detail specification (BDS) was prepared by CECC WG9 “INTEGRATED CIRCUITS”. It is based, wherever possible, on the Publications of the International Electrotechnical Commission and in particular on IEC 147: Essential ratings and characteristics of semiconductor devices and general principles of m
18、easuring methods. The text of this BDS was circulated to the CECC for voting in the document indicated below and was ratified by the President of the CECC for printing as a CECC Specification. It is recognized that the layout proposed cannot apply to all detail specifications based on this document.
19、 For example when several similar devices are covered by the same detail specification, it may be convenient to give the limiting values in a table. In accordance with the decision of the CECC Management Committee this specification is published initially in English and French. The German text will
20、follow as soon as it has been prepared. Documents Date of voting Report on the voting CECC(Secretariat)1437 October 1983 CECC(Secretariat)1552BSCECC 90301:1985 BSI 02-2000 1 1 Front page The front page of the DS shall be laid out as shown on the following page. The numbers between square brackets co
21、rrespond to the following indications which shall be given: Identification of the DS and of the component: 1 The name of the National Standards Organization under whom authority the DS is published and, if applicable, the organization from whom the DS is available. 2 The CECC Symbol and the CECC num
22、ber allotted to the DS by the CECC General Secretariat. 3 The number and issue number of the CECC generic or sectional specification as relevant; also national reference if different. 4 If different from the CECC number, the national number of the DS, date of issue and any further information requir
23、ed by the national system, together with any amendment numbers. 5 Type number, a short description of the type by: function (for example: specified input voltage line receiver) number of independent circuits per package number and kind of inputs and outputs material and type of construction (silicon
24、, monolithic, multichip, bipolar, MOS) performance, for example high output power, high speed, low power consumption electrostatic sensitivity (where appropriate). 6 Information on typical construction (if applicable) For 5 and 6 the text to be given in the DS should be suitable for an entry in CECC
25、 00200 or CECC00300. 7 An outline drawing with main dimensions which are of importance for interchangeability, and/or reference to the appropriate national or international document for outlines. Alternatively, this drawing may be given in an appendix to the DS. 8 Quality assessment level(s) 9 Refer
26、ence data giving information on the most important properties of the component, which comparison between the various component types intended for the same, or for similar, applications. Identification of the component and supplementary information: Description of the materials for the package (for e
27、xample, glass, ceramic, silicone) and information relating to the mounting (welding, soldering), lead material and finish. Inside the sketch of the package, the terminal connections to the inputs, outputs or other important points of the circuit shall be identified. This can be shown by a functional
28、 block diagram. Description of the numbering of the terminals with the identification of pin number 1. Marking on the device in accordance with the GS (see 2.5 of CECC 90000).BSCECC 90301:1985 2 BSI 02-2000 Layout for front page of detail specificationBSCECC 90301:1985 BSI 02-2000 3 2 Ratings (limit
29、ing values) (Not for inspection purposes) These apply over the operating temperature range, unless otherwise stated (see SS 90300). 3 Recommended conditions of use and associated characteristics (Notforinspection purpose) The following characteristics shall apply over the full ambient operating temp
30、erature range unless otherwise specified. Where the stated performance of the circuit varies over the ambient operating temperature range the values of the input and output voltages and their associated currents shall be stated at 25 C and at the extremes of the operating temperature range. Where it
31、 is necessary to use external elements to ensure stable operation of the device, the values of the characteristics specified refer to the device with such elements connected. The line circuits are intended to transmit a digital signal between two remote points with the minimum alteration of shade an
32、d/or amplitude of the signal. They form the IEC “A class” of interface circuits. A complete-transmission system is described by Figure 1. It includes: a line transmitter A1, a transmission line of suitable length, a line receiver A2. A given standard or recommandation (for example CCITT V 28) may be
33、 applicable to the transmission system. 3.1 Description of function 3.1.1 The line transmitter functions with an input receiving a digital signal and provides at its output an analogue signal either on a single output or on two differential outputs. This output signal may be defined as a voltage or
34、a current. 3.1.2 The line receiver functions with an analogue input, either single or differential, receiving the signal output of the transmitter through the transmission line and provides at its output a digital signal with the same logic value as the input signal of the transmitter. 2.1 Maximum (
35、and where appropriate minimum) value of voltage between the reference terminal and each other terminal 2.2 Any other limiting value(s) of voltage between any specified terminals as appropriate. 2.3 Maximum continuous output current I O 2.4 Maximum continuous internal power dissipation with reference
36、 to a derating curve or factor related to the reference point temperature or ambient temperature P D 2.5 Maximum input current (for specified input current line receivers) I I 2.6 Maximum and minimum ambient or reference point operating temperature T amb 2.7 Maximum and minimum storage temperature T
37、 stg 2.8 Any specific mechanical or environmental ratings peculiar to the device 2.9 Any interdependence of limiting conditions 2.10 Maximum value of output short-circuit current and duration, where appropriate I OS , t OS Figure 1 BSCECC 90301:1985 4 BSI 02-2000 3.1.3 The IEC divides each category
38、of circuits as follow: NOTE 1For example where the input impedance is lower than the source impedance. NOTE 2For example where the input impedance is higher than the source impedance. 3.1.4 Only the appropriate parts of the following clauses 3.2, 3.3 and 3.4 shall be included in the relevant DS. 3.2
39、 Various transmission systems 3.2.1 One wire transmission system (with ground return) This system is described by Figure 2. This system has sensitivity to noise generated in ground return. Figure 2 BSCECC 90301:1985 BSI 02-2000 5 3.2.2 Two balanced wires transmission system This system is described
40、by Figure 3. This system requires a good balance between A and analogue signals to reduce the commun mode line voltage. 3.2.3 Two unbalanced wires transmission system This system is described by Figure 4. This system requires two wires but no balance. Figure 3 Figure 4 ABSCECC 90301:1985 6 BSI 02-20
41、00 3.3 Rules of matching In all differential systems it is required to match the characteristic impedance Z owith the output impedance of the transmitter and the input impedance of the receiver. Two methods may be used for this match, called serial resistors method and parallel resistors method; the
42、 matching resistors may be integrated on the die. The correct computation of resistors values needed to match the characteristic impedance of the line must take care of transmitter output or receiver input impedances. For the best use of complete transmission system never forget that the common mode
43、 characteristic line impedance and differential mode characteristic line impedance may be very different. 3.3.1 Serial resistors method 1) Match of A1/2 line transmitter impedances The matching of specified output voltage line transmitter is described by Figure 5. Figure 5 BSCECC 90301:1985 BSI 02-2
44、000 7 2) Match of A2/1 line receiver impedances The matching of specified input current line receiver is described by Figure 6. 3.3.2 Parallel resistors method 1) Match of A1/1 line transmitter impedances The matching of specified output current line transmitter is described by Figure 7. Figure 6 Fi
45、gure 7 BSCECC 90301:1985 8 BSI 02-2000 2) Match of A2/2 line receiver impedances The matching of specified input voltage line receiver is described by Figure 8. Figure 8 BSCECC 90301:1985 BSI 02-2000 9 3.4 Description of devices 3.4.1 Transmitters One or more transmitters may be integrated on the sa
46、me die. For example, the Figure 9 gives the functionnal diagram of a device having four identical A1/1 type transmitters. Its “truth table” is: D n S where: Z: High impedance output state V IH : High level input voltage V IL : Low level input voltage I OH : Low impedance, high level output current I
47、 OL : Low impedance, low level output current V IH V IH I OH I OL V IL V IH I OL I OH V IH V IL Z Z V IL V IL Z Z Figure 9 O n 1 O n 2BSCECC 90301:1985 10 BSI 02-2000 3.4.2 Receivers One or more receivers may be integrated on the same die. For example, the Figure 10 gives the functionnal diagram of
48、a device having four identical A2/2 type receivers. Its “truth table” is: V IDn S D n where: V IDn : Differential input voltage of stage number n Z: High impedance output state V IH : High level input voltage V IL : Low level input voltage V OH : Low impedance, high level output voltage V OL : Low i
49、mpedance, low level output voltage X: Low impedance undefined logic state V IDW V IDA V IH V OH V IL Z V IDA V ID V IDB V IH X V IL Z V IDu V IDB V IH V OL V IL Z Figure 10 BSCECC 90301:1985 BSI 02-2000 11 3.4.3 “Tranceivers” Some devices contain simultaneously transmitters and receivers. So they are usually called tranceivers. They include control inputs to select the direction of information flow through the device. 3.5 Characteristics The characteristics applicable to each category of line transmitters or receivers a
