1、 REVISIONS LTR DESCRIPTION DATE APPROVED A Update boilerplate paragraphs to current requirements. - PHN 09-11-09 Thomas M. Hess Prepared in accordance with ASME Y14.24 Vendor item drawing REV PAGE REV PAGE REV STATUS OF PAGES REV A A A A A A A A A A A A PAGE 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPA
2、RED BY Charles F. Saffle DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO 43218-3990 Original date of drawing CHECKED BY Charles F. Saffle TITLE MICROCIRCUIT, DIGITAL, ADVANCED HIGH SPEED CMOS, DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET, AND TTL COMPATIBLE INPUTS, MONOLITHIC S
3、ILICON YY-MM-DD 03-09-02 APPROVED BY Thomas M. Hess SIZE A CODE IDENT. NO. 16236 DWG NO. V62/03659 REV A PAGE 1 OF 12 AMSC N/A 5962-V007-10 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDE
4、NT NO. 16236 DWG NO. V62/03659 REV A PAGE 2 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a high performance dual positive-edge-triggered D-type flip-flop with clear and preset, and TTL compatible inputs microcircuit, with an operating temperature range of -55C to +125C. 1.2
5、 Vendor Item Drawing Administrative Control Number. The manufacturers PIN is the item of identification. The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation: V62/03659 - 01 X E Drawing Device type Case outline Lead finish num
6、ber (See 1.2.1) (See 1.2.2) (See 1.2.3) 1.2.1 Device type(s). Device type Generic Circuit function 01 74AHCT74-EP Dual positive-edge-triggered D-type flip-flop with clear and preset, and TTL compatible inputs 1.2.2 Case outlines. The case outlines are as specified herein. Outline letter Number of pi
7、ns JEDEC PUB 95 Package style X 14 JEDEC MO-153 Plastic small-outline Y 14 JEDEC MS-012 Plastic small-outline 1.2.3 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacture: Finish designator Material A Hot solder dip B Tin-lead plate C Gol
8、d plate D Palladium E Gold flash palladium Z Other Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03659 REV A PAGE 3 1.3 Absolute maximum ratings. 1/ Supply volta
9、ge range (VCC) . -0.5 V to +7.0 V Input voltage range (VI) . -0.5 V to +7.0 V 2/ Output voltage range (VO) . -0.5 V to VCC+ 0.5 V 2/ Input clamp current (IIK) (VIVCC) 20 mA Continuous output current (IO) (VO= 0 to VCC) 25 mA Continuous current through VCCor GND . 50 mA Package thermal impedance (JA)
10、 X package . 113C/W 3/ Y package . 86C/W 3/ Storage temperature range (TSTG) . -65C to +150C 1.4 Recommended operating conditions. 4/ 5/ Supply voltage range (VCC) . 4.5 V to 5.5 V Minimum high level input voltage (VIH) 2.0 V Maximum low level input voltage (VIL) . 0.8 V Input voltage range (VI) .
11、0.0 V to 5.5 V Output voltage range (VO) . 0.0 V to VCCMaximum high level output current (IOH) . -8.0 mA Maximum low level output current (IOL) . 8.0 mA Input transition rise or fall rate (t/v) . 20 ns/V Operating free-air temperature range (TA) -55C to +125C 2. APPLICABLE DOCUMENTS JEDEC PUB 95 - R
12、egistered and Standard Outlines for Semiconductor Devices JESD 51-7 - High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages (Applications for copies should be addressed to the Electronic Industries Alliance, 2500 Wilson Boulevard, Arlington, VA 22201-3834 or online at http
13、/www.jedec.org) 1/ Stresses beyond those listed under “absolute maximum rating” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not imp
14、lied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2/ The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 3/ The package thermal impedance is calculated in accordance with JESD 51-7. 4/ Use of
15、 this product beyond the manufacturers design rules or stated parameters is done at the users risk. The manufacturer and/or distributor maintain no responsibility or liability for product used beyond the stated limits. 5/ All unused inputs of the device must be held at VCCor GND to ensure proper dev
16、ice operation. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03659 REV A PAGE 4 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with t
17、he manufacturers part number as shown in 6.3 herein and as follows: A. Manufacturers name, CAGE code, or logo B. Pin 1 identifier C. ESDS identification (optional) 3.2 Unit container. The unit container shall be marked with the manufacturers part number and with items A and C (if applicable) above.
18、3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical performance characteristics are as specified in 1.3, 1.4, and table I herein. 3.4 Design, construction, and physical dimension. The design, construction, and physical dimensions are as specified herein. 3
19、5 Diagrams. 3.5.1 Case outlines. The case outlines shall be as shown in 1.2.2 and figure 1. 3.5.2 Truth table. The truth table shall be as shown in figure 2. 3.5.3 Logic diagram. The logic diagram shall be as shown in figure 3. 3.5.4 Terminal connections. The terminal connections shall be as shown
20、in figure 4. 3.5.5 Timing waveforms and test circuit. The timing waveforms and test circuit shall be as shown in figure 5. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG
21、NO. V62/03659 REV A PAGE 5 TABLE I. Electrical performance characteristics. 1/ Test Symbol Conditions VCCTemperature, TADevice type Limits Unit Min Max High level output voltage VOHIOH= -50 A 4.5 V 25C, -55C to 125C 01 4.4 V IOH= -8 mA 4.5 V 25C 3.94 -55C to 125C 3.80 Low level output voltage VOLIOL
22、 50 A 4.5 V 25C, -55C to 125C 01 0.1 V IOL= 8 mA 4.5 V 25C 0.36 -55C to 125C 0.44 Input current IIVI= 5.5 V or GND 0.0 V to 5.5 V 25C 01 0.1 A -55C to 125C 1.0 Quiescent supply current ICCVI= VCCor GND IO= 0 A 5.5 V 25C 01 2.0 A -55C to 125C 20.0 Quiescent supply current delta, TTL input levels ICC
23、2/ One input at 3.4 V. Other inputs at VCCor GND. 5.5 V 25C 01 1.35 mA -55C to 125C 1.5 Input capacitance CIVI= VCCor GND 5.0 V 25C 01 10 pF Power dissipation capacitance CpdNo load f = 1 MHz 5.0 V 25C 01 32 TYP pF Quiet output, maximum dynamic VOLVOL(P)3/ CL= 50 pF 5.0 V 25C 01 0.8 V Quiet output,
24、minimum dynamic VOLVOL(V)3/ 5.0 V 25C 01 -0.8 V Quiet output, minimum dynamic VOHVOH(V)3/ 5.0 V 25C 01 4.0 V High level dynamic input voltage VIH(D)3/ 5.0 V 25C 01 2.0 V Low level dynamic input voltage VIL(D)3/ 5.0 V 25C 01 0.8 V See footnotes at end of table. Provided by IHSNot for ResaleNo reprodu
25、ction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03659 REV A PAGE 6 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions VCCTemperature, TADevice type Limits Unit Min Max M
26、aximum operating frequency fmaxCL= 15 pF See figure 5 4.5 V and 5.5 V 25C 01 100 MHz -55C to 125C 80 CL= 50 pF See figure 5 4.5 V and 5.5 V 25C 80 -55C to 125C 65 Propagation delay time, PRE or CLR to Q or Q tPLH, tPHLCL= 15 pF See figure 5 4.5 V and 5.5 V 25C 01 10.4 ns -55C to 125C 1.0 12.0 CL= 50
27、 pF See figure 5 4.5 V and 5.5 V 25C 11.4 -55C to 125C 1.0 13.0 Propagation delay time, CLK to Q or Q tPLH, tPHLCL= 15 pF See figure 5 4.5 V and 5.5 V 25C 01 7.8 ns -55C to 125C 1.0 9.0 CL= 50 pF See figure 5 4.5 V and 5.5 V 25C 8.8 -55C to 125C 1.0 10.0 Pulse duration twPRE or CLR low See figure 5
28、4.5 V and 5.5 V 25C, -55C to 125C 01 5.0 ns CLK See figure 5 5.0 Setup time before CLK tsuData See figure 5 4.5 V and 5.5 V 25C, -55C to 125C 01 5.0 ns PRE or CLR inactive See figure 5 3.5 Hold time, data after CLK thSee figure 5 4.5 V and 5.5 V 25C, -55C to 125C 01 0.0 ns 1/ Testing and other quali
29、ty control techniques are used to the extent deemed necessary to assure product performance over the specified temperature range. Product may not necessarily be tested across the full temperature range and all parameters may not necessarily be tested. In the absence of specific parametric testing, p
30、roduct performance is assured by characterization and/or design. 2/ This is the increase in supply current for each input at one of the specified TTL voltage levels, rather than 0 V or VCC. 2/ Characteristics are for surface-mount packages only. Provided by IHSNot for ResaleNo reproduction or networ
31、king permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03659 REV A PAGE 7 Case X Dimensions Symbol Millimeters Inches Symbol Millimeters Inches Min Max Min Max Min Max Min Max A - 1.20 - .047 E 4.30 4.50 .169 .177 A1 0.05 0.
32、15 .002 .006 E1 6.20 6.60 .244 .260 b 0.19 0.30 .007 .012 e 0.65 NOM .026 NOM c 0.15 NOM .006 NOM L 0.50 0.75 .020 .030 D 4.90 5.10 .193 .201 NOTES: 1. This drawing is subject to change without notice. 2. Body dimensions do not include mold flash or protrusion not to exceed 0.15 mm. 3. Falls within
33、JEDEC MO-153. 4. All linear dimensions are shown in millimeters (inches). Inches equivalents are given for general information only. FIGURE 1. Case outlines. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OH
34、IO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03659 REV A PAGE 8 Case Y Dimensions Symbol Millimeters Inches Symbol Millimeters Inches Min Max Min Max Min Max Min Max A - 1.75 - .069 E 3.81 4.00 .150 .157 A1 0.10 0.25 .004 .010 E1 5.80 6.20 .228 .244 b 0.35 0.51 .014 .020 e 1.27 NOM .050 NOM c 0.20 NOM
35、 .008 NOM L 0.40 1.12 .016 .044 D 8.55 8.75 .337 .344 NOTES: 1. This drawing is subject to change without notice. 2. Body dimensions do not include mold flash or protrusion not to exceed 0.006 inches (0.15 mm). 3. Falls within JEDEC MS-012. 4. All linear dimensions are shown in inches (millimeters).
36、 Metric equivalents are given for general information only. FIGURE 1. Case outlines - Continued. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03659 REV A PAGE 9
37、 (each flip-flop) Inputs Outputs PRE CLR CLK D Q Q L H L H H H H L L H H H X X X L X X X H L X H L H* H L Q0L H H* L H Q0X = Immaterial = Rising edge of CLK * = This configuration is unstable; that is it does not persist when PRE or CLR returns to its inactive (high) level. FIGURE 2. Truth table. FI
38、GURE 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03659 REV A PAGE 10 Device type 01 Case outlines X, Y Terminal number Terminal symbol 1 1CLR
39、 2 1D 3 1CLK 4 1PRE 5 1Q 6 1Q 7 GND 8 2Q 9 2Q 10 2PRE 11 2CLK 12 2D 13 2CLR 14 VCCFIGURE 4. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/0
40、3659 REV A PAGE 11 Notes: 1. CLincludes probe and jig capacitance. 2. All input pulses are supplied by generators having the following characteristics: PRR 1 MHz, ZO= 50, tr 3 ns, tf 3 ns. 3. The outputs are measured one at a time with one input transition per measurement. FIGURE 5. Timing waveforms
41、 and test circuit. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03659 REV A PAGE 12 4. QUALITY ASSURANCE PROVISIONS 4.1 Product assurance requirements. The manu
42、facturer is responsible for performing all inspection and test requirements as indicated in their internal documentation. Such procedures should include proper handling of electrostatic sensitive devices, classification, packaging, and labeling of moisture sensitive devices, as applicable. 5. PREPAR
43、ATION FOR DELIVERY 5.1 Packaging. Preservation, packaging, labeling, and marking shall be in accordance with the manufacturers standard commercial practices for electrostatic discharge sensitive devices. 6. NOTES 6.1 ESDS. Devices are electrostatic discharge sensitive and are classified as ESDS clas
44、s 1 minimum. 6.2 Configuration control. The data contained herein is based on the salient characteristics of the device manufacturers data book. The device manufacturer reserves the right to make changes without notice. This drawing will be modified as changes are provided. 6.3 Suggested source(s) o
45、f supply. Identification of the suggested source(s) of supply herein is not to be construed as a guarantee of present or continued availability as a source of supply for the item. Vendor item drawing administrative control number 1/ Device manufacturer CAGE code Vendor part number Top-Side Marking V
46、62/03659-01XE 01295 SN74AHCT74MPWREP AHT74EP V62/03659-01YE 01295 SN74AHCT74MDREP AHCT74MEP 1/ The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation. CAGE code Source of supply 01295 Texas Instruments, Inc. Semiconductor Group 8505 Forest lane P.O. Box 660199 Dallas, TX 75243 Point of contact: U.S. Highway 75 South P.O. Box 84, M/S 853 Sherman, TX 75090-9493 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-
