1、 REVISIONS LTR DESCRIPTION DATE APPROVED A Add device type 02. Update boilerplate and changing throughout - phn 07-02-21 Thomas M. Hess B Add device available in 6.3. - phn 07-08-01 Thomas M. Hess C Update boilerplate paragraphs to current requirements. - PHN 12-07-23 Thomas M. Hess CURRENT DESIGN A
2、CTIVITY CAGE CODE 16236 HAS CHANGED NAMES TO: DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 Prepared in accordance with ASME Y14.24 Vendor item drawing REV PAGE REV PAGE REV STATUS OF PAGES REV C C C C C C C C C C PAGE 1 2 3 4 5 6 7 8 9 10 PMIC N/A PREPARED BY Charles F. Saffle DEFENSE SUPPLY CENT
3、ER, COLUMBUS COLUMBUS, OHIO Original date of drawing CHECKED BY Charles F. Saffle TITLE MICROCIRCUIT, DIGITAL, LOW VOLTAGE CMOS, QUADRUPLE 2-INPUT POSITIVE OR GATE, MONOLITHIC SILICON YY-MM-DD 04-03-08 APPROVED BY Thomas M. Hess SIZE A CODE IDENT. NO. 16236 DWG NO. V62/04661 REV C PAGE 1 OF 10 AMSC
4、N/A 5962-V088-12 .Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04661 REV A PAGE 2 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a high
5、performance quadruple 2-input positive OR gate microcircuit, with an operating temperature range of -40C to +125C for device type 01 and an extended operating temperature range of -55C to +125C for device type 02. 1.2 Vendor Item Drawing Administrative Control Number. The manufacturers PIN is the it
6、em of identification. The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation: V62/04661 - 01 X E Drawing Device type Case outline Lead finish number (See 1.2.1) (See 1.2.2) (See 1.2.3) 1.2.1 Device type(s). Device type Operating
7、 temperature Generic Circuit function 01 -40C to +125C SN74LVC32A-EP Quadruple 2-input positive OR gate 02 -55C to +125C SN74LVC32A-EP Quadruple 2-input positive OR gate 1.2.2 Case outlines. The case outlines are as specified herein. Outline letter Number of pins JEDEC PUB 95 Package style X 14 MS-0
8、12 Plastic small-outline Y 14 MO-153 Plastic small-outline 1.2.3 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacture: Finish designator Material A Hot solder dip B Tin-lead plate C Gold plate D Palladium E Gold flash palladium Provided
9、 by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04661 REV C PAGE 3 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) . -0.5 V to 6.5 V Input voltage range (VI) .
10、 -0.5 V to 6.5 V 2/ Output voltage range (VO) . -0.5 V to VCC+ 0.5 V 2/ 3/ Input clamp current (IIK) (VI 0) -50 mA Output clamp current (IOK) (VO 0) . -50 mA Continuous output current (IO) . 50 mA Continuous current through VCCor GND . 100 mA Package thermal impedance (JA): 4/ X package . 86C/W Y pa
11、ckage . 113C/W Storage temperature range (TSTG) . -65C to 150C 1.4 Recommended operating conditions. 5/ Supply voltage range (VCC): Operating 2.0 V to 3.6 V Data retention only 1.5 V minimum Minimum high level input voltage (VIH) (VCC= 2.7 V to 3.6 V) . 2.0 V Maximum low level input voltage (VIL) (V
12、CC= 2.7 V to 3.6 V) 0.8 V Input voltage range (VI) . 0.0 V to 5.5 V Output voltage range (VO) . 0.0 V to VCCMaximum high level output current (IOH): VCC= 2.7 V -12 mA VCC= 3.0 V -24 mA Maximum low level output current (IOL): VCC= 2.7 V 12 mA VCC= 3.0 V 24 mA Maximum input transition rise or fall rat
13、e (t/v) . 7 ns/V Operating free-air temperature range (TA): Device type 01 . -40C to +125C Device type 02 . -55C to +125C 1/ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device a
14、t these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2/ The input negative-voltage and output voltage ratings may be exceeded if the input and
15、output current ratings are observed. 3/ The value of VCCis provided in the recommended operating conditions table. 4/ The package thermal impedance is calculated in accordance with JESD 51-7. 5/ All unused inputs of the device must be held at VCCor GND to ensure proper device operation. Provided by
16、IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04661 REV C PAGE 4 2. APPLICABLE DOCUMENTS JEDEC SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC) JEP95 Registered and Standard Outli
17、nes for Semiconductor Devices JESD51-7 High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages (Copies of these documents are available online at http:/www.jedec.org or from JEDEC Solid State Technology Association, 3103 North 10th Street, Suite 240S, Arlington, VA 22201.) 3
18、. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturers part number as shown in 6.3 herein and as follows: A. Manufacturers name, CAGE code, or logo B. Pin 1 identifier C. ESDS identification (optional) 3.2 Unit container. The unit container shall be marked w
19、ith the manufacturers part number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical performance characteristics are as specified in 1.3, 1.4, and table I herein. 3.4 Design, construction, and physical dimensi
20、on. The design, construction, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outlines. The case outlines shall be as shown in 1.2.2 and figure 1. 3.5.2 Truth table. The truth table shall be as shown in figure 2. 3.5.3 Logic diagram. The logic diagram shall be as shown in f
21、igure 3. 3.5.4 Terminal connections. The terminal connections shall be as shown in figure 4. 3.5.5 Test circuit and timing waveforms. The test circuit and timing waveforms shall be as shown in figure 5. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,
22、-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04661 REV C PAGE 5 TABLE I. Electrical performance characteristics. 1/ Test Symbol Conditions 2/ VCCDevice type Limits Unit Min Max High level output voltage VOHIOH= -100 A 2.7 V to 3.6 V All VCC 0.2 V IOH= -12 m
23、A 2.7 V 2.2 3.0 V 2.4 IOH= -24 mA 3.0 V 2.2 Low level output voltage VOLIOL= 100 A 2.7 V to 3.6 V 0.2 V IOL= 12 mA 2.7 V 0.4 IOL= 24 mA 3.0 V 0.55 Input current IIVI= 5.5 V or GND 3.6 V 5 A Quiescent supply current ICCVI= VCCor GND, IO= 0 A 3.6 V 10 A Quiescent supply current delta ICCOne input at V
24、CC 0.6 V, Other inputs at VCCor GND 2.7 V to 3.6 V 500 A Input capacitance CiVI= VCCor GND, TA= 25C 3.3 V 5 TYP pF Power dissipation capacitance per gate Cpdf = 10 MHz, TA= 25C 2.5 V 10.6 TYP pF 3.3 V 12.5 TYP Propagation delay time, A or B to Y tpdSee figure 5. 2.7 V 4.4 ns 3.0 V to 3.6 V 1 3.8 1/
25、Testing and other quality control techniques are used to the extent deemed necessary to assure product performance over the specified temperature range. Product may not necessarily be tested across the full temperature range and all parameters may not necessarily be tested. In the absence of specifi
26、c parametric testing, product performance is assured by characterization and/or design. 2/ Over recommended operating free air temperature range. TA= -40C to +125C for device type 01 and -55C to +125C for device type 02. Unless otherwise noted. Provided by IHSNot for ResaleNo reproduction or network
27、ing permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04661 REV C PAGE 6 Case X Symbol Inches Millimeters Symbol Inches Millimeters Min Max Min Max Min Max Min Max A - .069 - 1.75 E .150 .157 3.81 4.00 A1 .004 .010 0.10 0.25
28、 E1 .228 .244 5.80 6.20 b .014 .020 0.35 0.51 e .050 BSC 1.27 BSC c .008 NOM 0.20 NOM L .016 .044 0.40 1.12 D .337 .344 8.55 8.75 NOTES: 1. All linear dimensions are in inches (millimeters). 2. This case outline is subject to change without notice. 3. Body dimensions do not include mold flash, protr
29、usion, or gate burrs. Mold flash, protrusions, or gate burrs shall not to exceed .006 inches (0.15 mm) per end. 4. Body width does not include interlead flash. Interlead flash shall not exceed .017 inches (0.43 mm) per side. 5. Falls within JEDEC MS-012 variation AB. FIGURE 1. Case outlines. Provide
30、d by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04661 REV C PAGE 7 Case Y Symbol Millimeters Symbol Millimeters Min Max Min Max A - 1.20 E 4.30 4.50 A1 0.05 0.15 E1 6.20
31、6.60 b 0.19 0.30 e 0.65 BSC c 0.15 NOM L 0.50 0.75 D 4.90 5.10 NOTES: 1. All linear dimensions are in millimeters. 2. This case outline is subject to change without notice. 3. Body dimensions do not include mold flash or protrusion, not to exceed 0.15 millimeters. 4. Fall within JEDEC MO-153. FIGURE
32、 1. Case outlines - Continued. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04661 REV C PAGE 8 (each gate) Inputs Output A B Y H X H X H H L L L H = High voltag
33、e level L = Low voltage level X = Immaterial FIGURE 2. Truth table. FIGURE 3. Logic diagram. Case outlines X and Y Terminal number Terminal symbol Terminal number Terminal symbol 1 1A 8 3Y 2 1B 9 3A 3 1Y 10 3B 4 2A 11 4Y 5 2B 12 4A 6 2Y 13 4B 7 GND 14 VCCFIGURE 4. Terminal connections. Provided by I
34、HSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04661 REV C PAGE 9 NOTES: 1. CL includes probe and jig capacitance. 2. All input pulses are supplied by generators having the fo
35、llowing characteristics: PRR 10 MHz, ZO= 50 . 3. tPLHand tPHLare the same as tpd. 4. The outputs are measured one at a time with one input transition per measurement. FIGURE 5. Test circuit and timing waveforms. Provided by IHSNot for ResaleNo reproduction or networking permitted without license fro
36、m IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04661 REV C PAGE 10 4. VERIFICATION 4.1 Product assurance requirements. The manufacturer is responsible for performing all inspection and test requirements as indicated in their internal documentation. S
37、uch procedures should include proper handling of electrostatic sensitive devices, classification, packaging, and labeling of moisture sensitive devices, as applicable. 5. PREPARATION FOR DELIVERY 5.1 Packaging. Preservation, packaging, labeling, and marking shall be in accordance with the manufactur
38、ers standard commercial practices for electrostatic discharge sensitive devices. 6. NOTES 6.1 ESDS. Devices are electrostatic discharge sensitive and are classified as ESDS class 1 minimum. 6.2 Configuration control. The data contained herein is based on the salient characteristics of the device man
39、ufacturers data book. The device manufacturer reserves the right to make changes without notice. This drawing will be modified as changes are provided. 6.3 Suggested source(s) of supply. Identification of the suggested source(s) of supply herein is not to be construed as a guarantee of present or co
40、ntinued availability as a source of supply for the item. DLA Land and Maritime maintains an online database of all current sources of supply at http:/www.landandmaritime.dla.mil/Programs/Smcr/. Vendor item drawing administrative control number 1/ Device manufacturer CAGE code Vendor part number Top
41、side marking V62/04661-01XE 01295 SN74LVC32AQDREP LVC32AE V62/04661-01YE 01295 SN74LVC32AQPWREP LVC32AE V62/04661-02XE 01295 SN74LVC32AMDREP LVC32AM V62/04661-02YE 01295 SN74LVC32AMPWREP LVC32AM 1/ The vendor item drawing establishes an administrative control number for identifying the item on the e
42、ngineering documentation. CAGE code Source of supply 01295 Texas Instruments, Inc. Semiconductor Group 8505 Forest Lane P.O. Box 660199 Dallas, TX 75243 Point of contact: U.S. Highway 75 South P.O. Box 84, M/S 853 Sherman, TX 75090-9493 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-
