1、 REVISIONS LTR DESCRIPTION DATE APPROVED A Update boilerplate paragraphs to current requirements. - PHN 11-08-22 Thomas M. Hess CURRENT DESIGN ACTIVITY CAGE CODE 16236 HAS CHANGED NAMES TO: DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 Prepared in accordance with ASME Y14.24 Vendor item drawing RE
2、V PAGE REV PAGE REV STATUS OF PAGES REV A A A A A A A A A A A A A A A PAGE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 PMIC N/A PREPARED BY Charles F. Saffle DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO 43218-3990 Original date of drawing CHECKED BY Charles F. Saffle TITLE MICROCIRCUIT, DIGITAL, ADVANCED
3、BIPOLAR CMOS, 3.3-V ABT SCAN TEST DEVICE WITH 18-BIT UNIVERSAL BUS TRANSCEIVER, MONOLITHIC SILICON YY-MM-DD 04-06-09 APPROVED BY Thomas M. Hess SIZE A CODE IDENT. NO. 16236 DWG NO. V62/04730 REV A PAGE 1 OF 15 AMSC N/A 5962-V072-11 Provided by IHSNot for ResaleNo reproduction or networking permitted
4、 without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04730 REV A PAGE 2 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a high performance 3.3-V ABT scan test device with 18-bit universal bus transceiver microcirc
5、uit, with an operating temperature range of -40C to +85C. 1.2 Vendor Item Drawing Administrative Control Number. The manufacturers PIN is the item of identification. The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation: V62/04
6、730 - 01 X E Drawing Device type Case outline Lead finish number (See 1.2.1) (See 1.2.2) (See 1.2.3) 1.2.1 Device type(s). Device type Generic Circuit function 01 SN74LVTH182512-EP 3.3-V ABT scan test device with 18-bit universal bus transceiver 1.2.2 Case outlines. The case outlines are as specifie
7、d herein. Outline letter Number of pins JEDEC PUB 95 Package style X 64 JEDEC MO-153 Plastic small-outline 1.2.3 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacturer: Finish designator Material A Hot solder dip B Tin-lead plate C Gold
8、plate D Palladium E Gold flash palladium Z Other Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04730 REV A PAGE 3 1.3 Absolute maximum ratings. 1/ Supply voltage
9、 range (VCC) . -0.5 V to +4.6 V Input voltage range (VI) . -0.5 V to 7 V 2/ Voltage range applied to any output in the high state or power-off state (VO) -0.5 V to 7 V 2/ Current into any output in the low state (IO): (A port or TDO) 128 mA (B port) 30 mA Current into any output in the high state (I
10、O): 3/ (A port or TDO) 64 mA (B port) 30 mA Input clamp current (IIK) (VIVCC. 4/ The package thermal impedance is calculated in accordance with JESD 51-7. 5/ Unused control inputs must be held high or low to prevent them from floating. 6/ Current duty cycle 50%, f 1 kHz. Provided by IHSNot for Resal
11、eNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04730 REV A PAGE 4 2. APPLICABLE DOCUMENTS JEDEC SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC) JEDEC PUB 95 Registered and Standard Outlines for S
12、emiconductor Devices JEDEC STD 51-7 High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages (Copies of these documents are available online at http:/www.jedec.org or from JEDEC Solid State Technology Association, 3103 North 10th Street, Suite 240S, Arlington, VA 22201.) THE
13、INSTITUTE OF ELECTRICAL AND ELECTRONICS ENGINEERS (IEEE) IEEE Standard 1149.1 - IEEE Standard Test Access Port and Boundary Scan Architecture. (Copies of these documents are available online at http:/www.ieee.org or from the IEEE Service Center, 445 Hoes Lane, P.O. Box 1331, Piscataway, NJ 088551331
14、. 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturers part number as shown in 6.3 herein and as follows: A. Manufacturers name, CAGE code, or logo B. Pin 1 identifier C. ESDS identification (optional) 3.2 Unit container. The unit container shall be marke
15、d with the manufacturers part number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical performance characteristics are as specified in 1.3, 1.4, and table I herein. 3.4 Design, construction, and physical dime
16、nsion. The design, construction, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outline. The case outline shall be as shown in 1.2.2 and figure 1. 3.5.2 Function table. The function table shall be as shown in figure 2. 3.5.3 Functional block diagram. The functional block d
17、iagram shall be as shown in figure 3. 3.5.4 Terminal connections. The terminal connections shall be as shown in figure 4. 3.5.5 Timing waveforms and test circuit. The timing waveforms and test circuit shall be as shown in figure 5. Provided by IHSNot for ResaleNo reproduction or networking permitted
18、 without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04730 REV A PAGE 5 TABLE I. Electrical performance characteristics. 1/ Test Symbol Conditions VCCTemperature, TADevice type Limits Unit Min Max Input clamp voltage VIKII= -18 mA 2.7 V
19、 25C, -40C to 85C All -1.2 V High level output voltage VOHA, B, TDO, IOH= -100 A 2.7 V to 3.6 V VCC 0.2 V A port, TDO, IOH= -3 mA 2.7 V 2.4 A port, TDO, IOH= -8 mA 3 V 2.4 A port, TDO, IOH= -32 mA 2 B port, IOH= -12 mA 2 Low level output voltage VOLA, B, TDO, IOL= 100 A 2.7 V 0.2 V A port, TDO, IOL=
20、 24 mA 0.5 A port, TDO, IOL= 16 mA 3 V 0.4 A port, TDO, IOL= 32 mA 0.5 A port, TDO, IOL= 64 mA 0.55 B port, IOL= 12 mA 0.8 Input current IICLK, LE, TCK VI= VCCor GND 3.6 V 1 A CLK, LE, TCK, VI= 5.5 V 0 V or 3.6 V 10 OE, TDI, TMS, VI= 5.5 V 3.6 V 5 OE, TDI, TMS, VI= VCC1 OE, TDI, TMS, VI= 0 V -25 -10
21、0 A or B ports, VI= 5.5 V 2/ 20 A or B ports, VI= VCC2/ 1 A or B ports, VI= 0 V 2/ -5 Input/output power-off leakage current IoffVIor VO= 0 V to 4.5 V 0 V 100 Input current (hold) II(hold)3/ A or B ports, VI= 0.8 V 3 V 75 500 A or B ports, VI= 2 V -75 -500 Off-state output current high IOZHTDO VO= 3
22、 V 3.6 V 1 Off-state output current low IOZLTDO VO= 0.5 V 3.6 V -1 3-state output current power-up IOZPUTDO VO= 0.5 V or 3 V 0 V to 1.5 V 50 3-state output current power-down IOZPDTDO VO= 0.5 V or 3 V 1.5 V to 0 V 50 Quiescent supply current ICCOutputs high. VI= VCCor GND, IO= 0 A 3.6 V 2 mA Outputs
23、 low. VI= VCCor GND, IO= 0 A 24 Outputs disabled. VI= VCCor GND, IO= 0 A 2 Quiescent supply current delta ICC4/ One input at VCC 0.6 V, Other inputs at VCCor GND 3 V to 3.6 V 0.5 Input capacitance CiVI= 3 V or 0 V 3.3 V 25C 4 TYP pF Input/output capacitance CioVO= 3 V or 0 V 10 TYP Output capacitanc
24、e CoVO= 3 V or 0 V 8 TYP See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04730 REV A PAGE 6 TABLE I. Electrical performance characte
25、ristics - Continued. 1/ Test Symbol Conditions VCCTemperature, TADevice type Limits Unit Min Max Normal Mode Clock frequency fclockCLKAB or CLKBA See figure 5. 2.7 V 25C, -40C to 85C All 0 80 MHz 3.3 V 0.3 V 0 100 Pulse duration See figure 5. twCLKAB or CLKBA high or low 2.7 V 5.6 ns 3.3 V 0.3 V 4.4
26、 LEAB or LEBA high 2.7 V 3 3.3 V 0.3 V 3 Setup time See figure 5. tsuA before CLKAB or B before CLKBA, 2.7 V 3 ns 3.3 V 0.3 V 2.8 A before LEAB or B before LEBA CLK high 2.7 V 0.7 3.3 V 0.3 V 1.5 A before LEAB or B before LEBA CLK low 2.7 V 1.6 3.3 V 0.3 V 1.6 Hold time See figure 5. thA after CLKAB
27、 or B after CLKBA 2.7 V 1.1 ns 3.3 V 0.3 V 1.4 A after LEAB or B after LEBA 2.7 V 3.5 3.3 V 0.3 V 3.1 Test Mode Clock frequency fclockTCK See figure 5. 2.7 V 25C, -40C to 85C All 0 40 MHz 3.3 V 0.3 V 0 50 Pulse duration twTCK high or low See figure 5. 2.7 V 10.5 ns 3.3 V 0.3 V 9.5 Setup time See fig
28、ure 5. tsuA, B, CLK, LE, or OE before TCK See figure 5. 2.7 V 7 3.3 V 0.3 V 6.5 TDI before TCK See figure 5. 2.7 V 3.5 3.3 V 0.3 V 2.5 TMS before TCK See figure 5. 2.7 V 3.5 3.3 V 0.3 V 2.5 Hold time thA, B, CLK, LE, or OE after TCK See figure 5. 2.7 V 1 3.3 V 0.3 V 1.7 TDI after TCK See figure 5. 2
29、.7 V 1 3.3 V 0.3 V 1.5 TMS after TCK See figure 5. 2.7 V 1 3.3 V 0.3 V 1.5 Delay time tdPower up to TCK See figure 5. 2.7 V 50 3.3 V 0.3 V 50 Rise time trVCCpower up See figure 5. 2.7 V 1 3.3 V 0.3 V 1 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitte
30、d without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04730 REV A PAGE 7 TABLE I. Electrical performance characteristics - Continued. 1/ Test Symbol Conditions VCCTemperature, TADevice type Limits Unit Min Max Normal Mode Maximum freque
31、ncy, CLKAB or CLKBA fmaxSee figure 5. 2.7 V 25C, -40C to 85C All 80 MHz 3.3 V 0.3 V 100 Propagation delay time, A to B tPLH, tPHL2.7 V 6.4 ns 3.3 V 0.3 V 1.5 5.7 Propagation delay time, B to A tPLH, tPHL2.7 V 5.6 ns 3.3 V 0.3 V 1.5 4.9 Propagation delay time, CLKAB to B tPLH, tPHL2.7 V 7.7 ns 3.3 V
32、0.3 V 1.5 6.7 Propagation delay time, CLKBA to A tPLH, tPHL2.7 V 6.8 ns 3.3 V 0.3 V 1.5 5.8 Propagation delay time, LEAB to B tPLH2.7 V 9.2 ns 3.3 V 0.3 V 1.5 8.2 tPHL2.7 V 6.7 3.3 V 0.3 V 1.5 6.2 Propagation delay time, LEBA to A tPLH2.7 V 8.4 ns 3.3 V 0.3 V 1.5 7.4 tPHL2.7 V 6.4 3.3 V 0.3 V 1.5 5.
33、7 Propagation delay time output enable, OEAB or OEBA to B or A tPZH, tPZL2.7 V 8.7 ns 3.3 V 0.3 V 1.5 7.9 Propagation delay time, output disable, OEAB or OEBA to B or A tPHZ, tPLZ2.7 V 8.9 ns 3.3 V 0.3 V 2.5 8.4 Test Mode Maximum frequency, TCK fmaxSee figure 5 2.7 V 25C, -40C to 85C All 40 MHz 3.3
34、V 0.3 V 50 Propagation delay time, TCK to A or B tPLH, tPHL2.7 V 17 ns 3.3 V 0.3 V 2.5 14 Propagation delay time, TCK to TDO tPLH2.7 V 6.5 3.3 V 0.3 V 1 5.5 tPHL2.7 V 7.5 3.3 V 0.3 V 1.5 6.5 Propagation delay time, output enable, TCK to A or B tPZH, tPZL2.7 V 20 3.3 V 0.3 V 4 17 See footnotes at end
35、 of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04730 REV A PAGE 8 TABLE I. Electrical performance characteristics - Continued. 1/ Test Symbol Condition
36、s VCCTemperature, TADevice type Limits Unit Min Max Test Mode (continued) Propagation delay time, output enable, TCK to TDO tPZHSee figure 5. 2.7 V 25C, -40C to 85C All 6.5 ns 3.3 V 0.3 V 1 5.5 tPZL2.7 V 6.5 3.3 V 0.3 V 1.5 5.5 Propagation delay time, output disable, TCK to A or B tPHZ2.7 V 20 ns 3.
37、3 V 0.3 V 4 18 tPLZ2.7 V 18.5 3.3 V 0.3 V 4 17 Propagation delay time, output disable, TCK to TDO tPHZ2.7 V 8.5 ns 3.3 V 0.3 V 1.5 7 tPLZ2.7 V 8 3.3 V 0.3 V 1.5 7 1/ Testing and other quality control techniques are used to the extent deemed necessary to assure product performance over the specified
38、temperature range. Product may not necessarily be tested across the full temperature range and all parameters may not necessarily be tested. In the absence of specific parametric testing, product performance is assured by characterization and/or design. 2/ Unused pins at VCCor GND. 3/ The parameter
39、II(hold)includes the off-state output leakage current. 4/ This is the increase in supply current for each input that is at the specified TTL voltage level, rather than VCCor GND. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER,
40、COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04730 REV A PAGE 9 Case X Dimensions Symbol Millimeters Inches Symbol Millimeters Inches Min Max Min Max Min Max Min Max A - 1.20 - 0.047 E 6.00 6.20 0.236 0.244 A1 0.25 TYP 0.010 TYP E1 7.90 8.30 0.311 0.327 b 0.17 0.27 0.007 0.011 e 0
41、.50 TYP 0.020 TYP c 0.15 NOM 0.006 NOM L 0.50 0.75 0.020 0.030 D 16.90 17.10 0.665 0.673 Q 0.05 0.15 0.002 0.006 NOTES: 1. This drawing is subject to change without notice. 2. Falls within JEDEC MO-153. 3. All linear dimensions are shown in millimeters (inches). Inches equivalents are given for gene
42、ral information only. 4. Body dimensions do not include mold protrusion not to exceed 0.15 millimeters. FIGURE 1. Case outline. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236
43、 DWG NO. V62/04730 REV A PAGE 10 Function Table 1/ (normal mode, each register) Inputs Output OEAB LEAB CLKAB A B L L L L L H L L L H H X L X X X X L H L H X B0* L H L H Z H = High L = Low X = Immaterial = Low-to-high clock transition. * = Output level before the indicated steady-state input conditi
44、ons are established. Z = High-impedance state 1/ A-to-B data flow is shown. B-to-A data flow is similar, but uses OEBA, LEBA, and CLKBA. FIGURE 2. Function table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBU
45、S, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04730 REV A PAGE 11 FIGURE 3. Functional block diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04730 REV A
46、 PAGE 12 Device type 01 Case outline X Terminal number Terminal symbol Terminal number Terminal symbol Terminal number Terminal symbol Terminal number Terminal symbol 1 1CLKAB 17 2A2 33 TCK 49 2B1 2 1LEAB 18 2A3 34 TDI 50 1B9 3 1OEAB 19 GND 35 2CLKBA 51 GND 4 1A1 20 2A4 36 2LEBA 52 1B8 5 1A2 21 2A5
47、37 2OEBA 53 1B7 6 GND 22 2A6 38 GND 54 1B6 7 1A3 23 VCC39 2B9 55 VCC8 1A4 24 2A7 40 2B8 56 1B5 9 1A5 25 2A8 41 2B7 57 1B4 10 VCC26 2A9 42 VCC58 1B3 11 1A6 27 GND 43 2B6 59 GND 12 1A7 28 2OEAB 44 2B5 60 1B2 13 1A8 29 2LEAB 45 2B4 61 1B1 14 GND 30 2CLKAB 46 GND 62 1OEBA 15 1A9 31 TDO 47 2B3 63 1LEBA 16 2A1 32 TMS 48 2B2 64 1CLKBA Terminal Functions Terminal Name Description 1A1 1A9, 2A1 2A9 Normal-function A-bus I/O ports. See function table (figure 2) for normal-mode logic. 1B1 1B9, 2B1 2B9 Normal-function B-bus I/O ports. See func
