1、 REVISIONSLTR DESCRIPTION DATE APPROVEDA Correct the device package top-side markings on the last sheet. Update boilerplate to current requirements. - CFS 07-07-10 Thomas M. Hess B Interchange between case outline X and Y to reflect manufacturer order. - phn 10-08-10 Thomas M. Hess C Reverse case ou
2、tline X and Y, back to as revision A. - phn 10-12-15 Thomas M. Hess Prepared in accordance with ASME Y14.24 Vendor item drawing REV PAGE REV PAGE REV STATUS OF PAGES REV C C B B B B C C B B B C PAGE 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY Phu H. Nguyen DLA LAND AND MARITIME COLUMBUS, OHIO 43
3、218-3990 Original date of drawing YY MM DD CHECKED BY Phu H. Nguyen TITLE MICROCIRCUIT, DIGITAL, SINGLE SCHMITT TRIGGER BUFFER, MONOLITHIC SILICON 06-05-17 APPROVED BY Thomas M. Hess SIZE A CODE IDENT. NO. 16236 DWG NO. V62/06621 REV C PAGE 1 OF 12 AMSC N/A 5962-V026-11 Provided by IHSNot for Resale
4、No reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/06621 REV C PAGE 2 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a high performance single Schmitt trigger buffer microcircuit, w
5、ith an operating temperature range of -55C to +125C. 1.2 Vendor Item Drawing Administrative Control Number. The manufacturers PIN is the item of identification. The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation: V62/06621 -
6、 01 X E Drawing Device type Case outline Lead finish number (See 1.2.1) (See 1.2.2) (See 1.2.3) 1.2.1 Device type(s). Device type Generic Circuit function 01 SN74LVC1G17-EP Single Schmitt Trigger buffer 1.2.2 Case outline(s). The case outlines are as specified herein. Outline letter Number of pins J
7、EDEC PUB 95 Package style X 5 MO-178 Plastic small outlineY 5 MO-203 Plastic small outline 1.2.3 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacturer: Finish designator Material A Hot solder dip B Tin-lead plateC Gold plateD PalladiumE
8、 Gold flash palladium Z Other Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/06621 REV B PAGE 3 1.3 Absolute maximum ratings. 1/ Supply voltage range ( VCC) -0.5 V to 6.5 V
9、 Input voltage range ( VI) -0.5 V to 6.5 V 2/ Voltage range applied to any output in the high impedance or power off state ( VO) -0.5 V to 6.5 V Voltage range applied to any output in the high or low state ( VO) -0.5 V to VCC+0.5 V 2/ 3/ Input clamp current ( IIK) ( VI 0 ) -50 mA Output clamp curren
10、t ( IOK) ( VO 0 ) -50 mA Continuous output current ( IO) . 50 mA Continuous current through VCCor GND . 100 mA Package thermal impedance ( JA), Case outline Y . 252C/W 4/ Storage temperature range (TSTG) . -65C to 150C 1.4 Recommended operating conditions. 5/ Supply voltage range ( VCC): Operating 1
11、.65 V to 5.5 V Data retention only . 1.5 V minimum Input voltage ( VI) . 0 V to 5.5 V Output voltage (VO) 0 to VCCMaximum high level output current ( IOH): VCC= 1.65 V -4 mA VCC= 2.3 V -8 mA VCC= 3 V . -16 mA VCC= 3 V . -24 mA VCC= 4.5 V -32 mA Maximum low level output current ( IOL): VCC= 1.65 V 4
12、mA VCC= 2.3 V 8 mA VCC= 3 V . 16 mA VCC= 3 V . 24 mA VCC= 4.5 V 32 mA Operating free-air temperature range ( TA) -55C to +125C 1/ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the dev
13、ice at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2/ The input and output voltage ratings may be exceeded if the input and output curre
14、nt ratings are observed. 3/ This value of VCC is provided in the recommended operating conditions stable. 4/ The package thermal impedance is calculated in accordance with JESD 51-7. 5/ All unused inputs of the device must be held at VCCor GND to ensure proper device operation. Provided by IHSNot fo
15、r ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/06621 REV B PAGE 4 2. APPLICABLE DOCUMENTS JEDEC PUB 95 Registered and Standard Outlines for Semiconductor Devices (Applications for copies should
16、 be addressed to the Electronic Industries Alliance, 2500 Wilson Boulevard, Arlington, VA 22201-3834 or online at http:/www.jedec.org) 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturers part number as shown in 6.3 herein and as follows: A. Manufacturers
17、 name, CAGE code, or logo B. Pin 1 identifier C. ESDS identification (optional) 3.2 Unit container. The unit container shall be marked with the manufacturers part number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditions and
18、 electrical performance characteristics are as specified in 1.3, 1.4, and table I herein. 3.4 Design, construction, and physical dimension. The design, construction, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outlines. The case outlines shall be as shown in 1.2.2 and f
19、igure 1. 3.5.2 Terminal connections. The terminal connections shall be as shown in figure 2. 3.5.3 Function table. The Function table shall be as shown in figure 3. 3.5.4 Logic diagram. The logic diagram shall be as shown in figure 4. 3.5.5 Load circuit and timing waveforms. The load circuit and tim
20、ing waveforms shall be as shown in figures 5-6. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/06621 REV B PAGE 5 TABLE I. Electrical performance characteristics. 1/ Test S
21、ymbol Conditions -55C TA 125C unless otherwise specified VCCLimits Unit Min Max Positive going input threshold voltage VT+1.65 V to 4.5 V 0.76 1.13 V 2.3 V 1.08 1.56 3.0 V 1.48 1.92 4.5 V 2.19 2.74 5.5 V 2.65 3.33 Negative going input threshold voltage VT+1.65 V to 4.5 V 0.35 0.59 V 2.3 V 0.56 0.88
22、3.0 V 0.89 1.2 4.5 V 1.51 1.97 5.5 V 1.88 2.4 Hysteresis (VT+- VT-) VT1.65 V to 4.5 V 0.36 0.64 V 2.3 V 0.45 0.78 3.0 V 0.51 0.83 4.5 V 0.58 0.93 5.5 V 0.69 1.04 High level output voltage VOHIOH= -100 mA 1.65 V to 4.5 V VCC 0.1 V IOH= -4 mA 2.3 V 1.2 IOH= -8 mA 3.0 V 1.9 IOH= -16 mA 2.4IOH= -24 mA 4
23、.5 V 2.3 IOH= -32 mA 5.5 V 3.8 Low level output voltage VOLIOL= 100 mA 1.65 V to 4.5 V 0.1 V IOL= 4 mA 2.3 V 0.45 IOL= 8 mA 3.0 V 0.3IOL= 16 mA 0.4 IOL= 24 mA 4.5 V 0.55 IOL= 32 mA 5.5 V 0.55 Input current IIVI= 5.5 V or GND 0 to 5.5 V 5 A Off current IoffVIor VO= 5.5 V 0 10 A Supply current ICCVI=
24、VCCor GND, IO= 0, 1.65 V to 5.5V 10 A Quiescent supply current delta ICCOne input at VCC 0.6 V, Other input at VCCor GND 3.0 V to 5.5V 500 A Input capacitance CiVI= VCCor GND, TA= 25C 3.3 V 4.5 Typ pF See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted
25、 without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/06621 REV B PAGE 6 TABLE I. Electrical performance characteristics Continued. 1/ Test Symbol Conditions-55C TA 125C unless otherwise specified VCCLimits Unit Min Max Propagation form input A to
26、 output Y tPDCL= 15 pF See figure 5 1.8 V 0.15 V 2.8 9.9 ns 2.5 V 0.2 V 1.6 5.5 3.3 V 0.3 V 1.5 4.6 5.0 V 0.5 V 0.9 4.4 Propagation form input A to output Y tPDCL= 30 pF or 50 pF See figure 6 1.8 V 0.15 V 3.8 11 ns 2.5 V 0.2 V 2.0 6.5 3.3 V 0.3 V 1.8 5.5 5.0 V 0.5 V 1.2 5 Power dissipation capacitan
27、ce CPDTA= 25C, f = 10 MHz 1.8 V 20 Typ pF 2.5 V 21 Typ 3.3 V 22 Typ 5.0 V 26 Typ 1/ Testing and other quality control techniques are used to the extent deemed necessary to assure product performance over the specified temperature range. Product may not necessarily be tested across the full temperatu
28、re range and all parameters may not necessarily be tested. In the absence of specific parametric testing, product performance is assured by characterization and/or design. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS
29、, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/06621 REV C PAGE 7 Case X Dimension Symbol Millimeters Symbol Millimeters Min Max Min Max A 1.45 E 1.45 1.75 A1 0.00 0.15 E1 2.60 3.00 b 0.30 0.50 e 0.95 NOM c 0.08 0.22 L 0.30 0.55 D 2.75 3.05 NOTES: 1. This drawing is subject to change without notice.
30、 2. Body dimensions do not include mold flash or protrusion not to exceed 0.15 mm (0.006 inches) per side. 3. Falls within JEDEC MO-178 variation AA. FIGURE 1. Case outlines. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUM
31、BUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/06621 REV C PAGE 8 Case Y Dimension Symbol Millimeters Symbol Millimeters Min Max Min Max A 0.80 1.10 E 1.10 1.40 A1 0.00 0.10 E1 1.80 2.40 b 0.15 0.30 e 0.65 NOM c 0.08 0.22 L 0.26 0.46 D 1.85 2.15 NOTES: 1. This drawing is subject to change without
32、 notice. 2. Body dimensions do not include mold flash or protrusion not to exceed 0.15 mm (0.006 inches) per side. 3. Falls within JEDEC MO-203. FIGURE 1. Case outlines - Continued. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIM
33、E COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/06621 REV B PAGE 9 Case X and Y Terminal number Terminal symbol 1 NC2 A 3 GND 4 Y 5 VCCNC: Not connected FIGURE 2. Terminal connections. Input A Output Y H H L L FIGURE 3. Function table. FIGURE 4. Logic diagram. Provided by IHSNot for ResaleN
34、o reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/06621 REV B PAGE 10 NOTES: 1. CLincludes probe and jig capacitance. 2. Waveform 1 is for an output with internal conditions such that the output is low exc
35、ept when disabled by the output control. 3. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. 3. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO= 50 . 4. The outputs are measu
36、red one at a time with one input transition per measurement. 5. tPLZand tPHZare the same as tdis. 6. tPZLand tPZHare the same as ten. 7. tPHLand tPLHare the same as tpd. 8. All parameters and waveforms are not applicable to all devices. FIGURE 5. Load circuit and timing waveforms. Provided by IHSNot
37、 for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/06621 REV B PAGE 11 NOTES: 1. CLincludes probe and jig capacitance. 2. Waveform 1 is for an output with internal conditions such that the outpu
38、t is low except when disabled by the output control. 3. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. 3. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO= 50 . 4. The outpu
39、ts are measured one at a time with one input transition per measurement. 5. tPLZand tPHZare the same as tdis. 6. tPZLand tPZHare the same as ten. 7. tPHLand tPLHare the same as tpd. 8. All parameters and waveforms are not applicable to all devices. FIGURE 6. Load circuit and timing waveforms. Provid
40、ed by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/06621 REV C PAGE 12 4. VERIFICATION 4.1 Product assurance requirements. The manufacturer is responsible for performing all inspecti
41、on and test requirements as indicated in their internal documentation. Such procedures should include proper handling of electrostatic sensitive devices, classification, packaging, and labeling of moisture sensitive devices, as applicable. 5. PREPARATION FOR DELIVERY 5.1 Packaging. Preservation, pac
42、kaging, labeling, and marking shall be in accordance with the manufacturers standard commercial practices for electrostatic discharge sensitive devices. 6. NOTES 6.1 ESDS. Devices are electrostatic discharge sensitive and are classified as ESDS class 1 minimum. 6.2 Configuration control. The data co
43、ntained herein is based on the salient characteristics of the device manufacturers data book. The device manufacturer reserves the right to make changes without notice. This drawing will be modified as changes are provided. 6.3 Suggested source(s) of supply. Identification of the suggested source(s)
44、 of supply herein is not to be construed as a guarantee of present or continued availability as a source of supply for the item. Vendor item drawing administrative control number 1/ Device manufacturer CAGE code Vendor part number Top side marking V62/06621-01XE 01295 SN74LVC1G17MDBVREP C170 V62/066
45、21-01YE 01295 SN74LVC1G17MDCKREP C70 1/ The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation. CAGE code Source of supply 01295 Texas Instruments, Inc. Semiconductor Group8505 Forest lane P.O. Box 660199 Dallas, TX 75243 Point of contact: U.S. Highway 75 South P.O. Box 84, M/S 853 Sherman, TX 75090-9493 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-
