1、 REVISIONS LTR DESCRIPTION DATE APPROVED Prepared in accordance with ASME Y14.24 Vendor item drawing REV PAGE REV PAGE REV STATUS OF PAGES REV PAGE 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PREPARED BY Phu H. Nguyen DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil/ Original d
2、ate of drawing YY MM DD CHECKED BY Phu H. Nguyen TITLE MICROCIRCUIT, LINEAR, 400 MHz TO 6 GHz BROADBAND QUADRATURE MODULATOR , MONOLITHIC SILICON 13-01-08 APPROVED BY Thomas M. Hess SIZE A CODE IDENT. NO. 16236 DWG NO. V62/12649 REV PAGE 1 OF 11 AMSC N/A 5962-V035-13 Provided by IHSNot for ResaleNo
3、reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/12649 REV PAGE 2 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a high performance 400 MHz to 6 GHz broadband quadrature modulator mi
4、crocircuit, with an operating temperature range of -55C to +105C. 1.2 Vendor Item Drawing Administrative Control Number. The manufacturers PIN is the item of identification. The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation
5、: V62/12649 - 01 X E Drawing Device type Case outline Lead finish number (See 1.2.1) (See 1.2.2) (See 1.2.3) 1.2.1 Device type(s). Device type Generic Circuit function 01 ADL5375-EP 400 MHz to 6 GHz broadband quadrature modulator 1.2.2 Case outline(s). The case outlines are as specified herein. Outl
6、ine letter Number of pins JEDEC PUB 95 Package style X 24 JEDEC MO-220-WGGD Lead Frame Chip Scale Package 1.2.3 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacturer: Finish designator Material A Hot solder dip B Tin-lead plate C Gold p
7、late D Palladium E Gold flash palladium Z Other Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/12649 REV PAGE 3 1.3 Absolute maximum ratings. 1/ Supply voltage, VPOS . 5.5
8、V IBBP, IBBN, QBBP, QBBN . 0 V to 2 V LOIP and LOIN 13 dBm Internal power dissipation . 1500 mW JA(Exposed paddle soldered down) 54 C/W 2/ Operating temperature range: . -55C to +105C Storage temperature range . -65C to 150C Maximum junction temperature 150C 2. APPLICABLE DOCUMENTS JEDEC SOLID STATE
9、 TECHNOLOGY ASSOCIATION (JEDEC) JEP95 Registered and Standard Outlines for Semiconductor Devices JESD51-2 Integrated Circuits Thermal Test Method Environment Conditions Natural Convection (Still Air) (Copies of these documents are available online at http:/www.jedec.org or from JEDEC Solid State Tec
10、hnology Association, 3103 North 10th Street, Suite 240S, Arlington, VA 22201.) 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturers part number as shown in 6.3 herein and as follows: A. Manufacturers name, CAGE code, or logo B. Pin 1 identifier C. ESDS id
11、entification (optional) 3.2 Unit container. The unit container shall be marked with the manufacturers part number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical performance characteristics are as specified
12、 in 1.3, and table I herein. 3.4 Design, construction, and physical dimension. The design, construction, and physical dimensions are as specified herein. 1/ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and func
13、tional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute maximum rated conditions for extended periods may affect device reliability. 2/ Per JEDC standard JESD 51-2. Provided by IHSNot for Res
14、aleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/12649 REV PAGE 4 3.5 Diagrams. 3.5.1 Case outline. The case outline shall be as shown in 1.2.2 and figure 1. 3.5.2 Terminal connections. The terminal c
15、onnections shall be as shown in figure 2. 3.5.3 Terminal function. The terminal function shall be as shown in figure 3. 3.5.4 Functional block diagram. The functional block diagram shall be as shown in figure 4. 3.5.5 Return Loss of LOIP (LOIN AC-Coupled to Ground) S11 and RFOUT S22 from 450 MHz to
16、6000 MHz. The Return Loss of LOIP (LOIN AC-Coupled to Ground) S11 and RFOUT S22 from 450 MHz to 6000 MHz shall be as shown in figure 5. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 D
17、WG NO. V62/12649 REV PAGE 5 TABLE I. Electrical performance characteristics. 1/ Test Test conditions 2/ Limits Unit Min Typ Max Operating frequency range Low frequency 400 MHz High frequency 6000 LO = 450 MHz Output power, POUTVIQ= 1 V p-p differential 0.85 dBm Modulator voltage gain RF output divid
18、ed by baseband input voltage -3.1 dB Output P1dB 9.6 dBm Output return loss -16.4 dB Carrier feedthrough -47.5 dBm Sideband suppression -37.6 dBc Quadrature error 1.7 Degrees I/Q amplitude balance 0.07 dB Second Harmonic POUT (fLO+ (2 x fBB), POUT= 0.85 dBm -75.9 dBc Third Harmonic POUT (fLO+ (3 x f
19、BB), POUT= 0.85 dBm -51.5 dBc Output IP2 f1BB = 3.5 MHz, f2BB = 4.5 MHz, baseband I/Q amplitude per tone = 0.5 V p-p differential 65.4 dBm Output IP3 26.6 Noise floor I/Q inputs = 0 V differential with a dc bias only, 20 MHz carrier offset -160.5 dBm/Hz LO = 900 MHz Output power, POUTVIQ= 1 V p-p di
20、fferential 0.75 dBm Modulator voltage gain RF output divided by baseband input voltage -3.2 dB Output P1dB 9.6 dBm Output return loss -15.7 dB Carrier feedthrough -45.1 dBm Sideband suppression -52.8 dBc Quadrature error 0.01 Degrees I/Q amplitude balance 0.07 dB Second Harmonic POUT (fLO+ (2 x fBB)
21、, POUT= 0.75 dBm -75.8 dBc Third Harmonic POUT (fLO+ (3 x fBB), POUT= 0.75 dBm -50.7 dBc Output IP2 f1BB = 3.5 MHz, f2BB = 4.5 MHz, baseband I/Q amplitude per tone = 0.5 V p-p differential 62.6 dBm Output IP3 25.9 Noise floor I/Q inputs = 0 V differential with a dc bias only, 20 MHz carrier offset -
22、160.0 dBm/Hz LO = 1900 MHz Output power, POUTVIQ= 1 V p-p differential 0.53 dBm Modulator voltage gain RF output divided by baseband input voltage -3.4 dB Output P1dB 9.9 dBm Output return loss -16.2 dB Carrier feedthrough -40.3 dBm Sideband suppression -50.2 dBc Quadrature error 0.02 Degrees I/Q am
23、plitude balance 0.07 dB Second Harmonic POUT (fLO+ (2 x fBB), POUT= 0.53 dBm -67.9 dBc Third Harmonic POUT (fLO+ (3 x fBB), POUT= 0.53 dBm -51.8 dBc See footnote at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME C
24、OLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/12649 REV PAGE 6 TABLE I. Electrical performance characteristics - Continued. 1/ Test Test conditions 2/ Limits Unit Min Typ Max Output IP2 f1BB = 3.5 MHz, f2BB = 4.5 MHz, baseband I/Q amplitude per tone = 0.5 V p-p differential 62.6 dBm Output I
25、P3 24.3 Noise floor I/Q inputs = 0 V differential with a dc bias only, 20 MHz carrier offset -160.0 dBm/Hz LO = 2150 MHz Output power, POUTVIQ= 1 V p-p differential 0.73 dBm Modulator voltage gain RF output divided by baseband input voltage -3.2 dB Output P1dB 10.0 dBm Output return loss -17.1 dB Ca
26、rrier feedthrough -39.7 dBm Sideband suppression -47.3 dBc Quadrature error -0.16 Degrees I/Q amplitude balance 0.07 dB Second Harmonic POUT (fLO+ (2 x fBB), POUT= 0.73 dBm -71.3 dBc Third Harmonic POUT (fLO+ (3 x fBB), POUT= 0.73 dBm -52.4 dBc Output IP2 f1BB = 3.5 MHz, f2BB = 4.5 MHz, baseband I/Q
27、 amplitude per tone = 0.5 V p-p differential 61.6 dBm Output IP3 24.2 Noise floor I/Q inputs = 0 V differential with a dc bias only, 20 MHz carrier offset -159.5 dBm/Hz LO = 2600 MHz Output power, POUTVIQ= 1 V p-p differential 0.61 dBm Modulator voltage gain RF output divided by baseband input volta
28、ge -3.4 dB Output P1dB 9.6 dBm Output return loss -19.3 dB Carrier feedthrough -36.5 dBm Sideband suppression -48.3 dBc Quadrature error -0.37 Degrees I/Q amplitude balance 0.07 dB Second Harmonic POUT (fLO+ (2 x fBB), POUT= 0.61 dBm -60.9 dBc Third Harmonic POUT (fLO+ (3 x fBB), POUT= 0.61 dBm -51.
29、3 dBc Output IP2 f1BB = 3.5 MHz, f2BB = 4.5 MHz, baseband I/Q amplitude per tone = 0.5 V p-p differential 55.0 dBm Output IP3 22.7 Noise floor I/Q inputs = 0 V differential with a dc bias only, 20 MHz carrier offset -159.0 dBm/Hz LO = 3500 MHz Output power, POUTVIQ= 1 V p-p differential 0.21 dBm Mod
30、ulator voltage gain RF output divided by baseband input voltage -3.8 dB Output P1dB 9.6 dBm Output return loss -20.7 dB Carrier feedthrough -30.4 dBm Sideband suppression -48.3 dBc Quadrature error 0.01 Degrees I/Q amplitude balance 0.08 dB Second Harmonic POUT (fLO+ (2 x fBB), POUT= 0.21 dBm -55.8
31、dBc Third Harmonic POUT (fLO+ (3 x fBB), POUT= 0.21 dBm -50.2 dBc Output IP2 f1BB = 3.5 MHz, f2BB = 4.5 MHz, baseband I/Q amplitude per tone = 0.5 V p-p differential 51.1 dBm Output IP3 23.1 Noise floor I/Q inputs = 0 V differential with a dc bias only, 20 MHz carrier offset -157.6 dBm/Hz See footno
32、te at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/12649 REV PAGE 7 TABLE I. Electrical performance characteristics Continued. 1/ Test Test conditions 2/ Li
33、mits Unit Min Typ Max LO = 5800 MHz Output power, POUTVIQ= 1 V p-p differential -1.36 dBm Modulator voltage gain RF output divided by baseband input voltage -5.3 dB Output P1dB 4.9 dBm Output return loss -7.4 dB Carrier feedthrough -19.5 dBm Sideband suppression -38.2 dBc Quadrature error -0.51 Degr
34、ees I/Q amplitude balance -0.05 dB Second Harmonic POUT (fLO+ (2 x fBB), POUT= -1.36 dBm -52.6 dBc Third Harmonic POUT (fLO+ (3 x fBB), POUT= -1.36 dBm -45.7 dBc Output IP2 f1BB = 3.5 MHz, f2BB = 4.5 MHz, baseband I/Q amplitude per tone = 0.5 V p-p differential 39.1 dBm Output IP3 14.6 Noise floor I
35、/Q inputs = 0 V differential with a dc bias only, 20 MHz carrier offset -153.0 dBm/Hz LO inputs LO drive level Characterization performed at typical level -6 0 +6 dBm Input return loss 500 MHz fLO 3.3 GHz, see FIGURE 5 for return loss vs frequency -10 dB Baseband inputs (Pin IBBP, Pin IBBN, Pin QBBP
36、, Pin QBBN) I/Q input bias level 3/ 500 mV Absolute voltage level 3/ On Pin IBBP, Pin IBBN, Pin QBBP, Pin QBBN 0 1 V Input bias current Current sourcing from each baseband input 41 A Input offset current 0.1 Differential input impedance 60 k Bandwidth (0.1 dB) LO = 1900 MHz, base band input = 500 mV
37、 p-p sine wave 95 MHz Output disable (Pin DSOP) Off isolation POUT(DSOP low) POUT(DSOP high) 84 dB DSOP high, LO leakage, LO = 2150 MHz -55 dBm Turn ON settling time DSOP high to low (90% of envelope) 220 ns Turn OFF settling time DSOP low to high (10% of envelope) 100 ns DSOP high level (Logic 1) 2
38、.0 V DSOP low level (Logic 0) 0.8 Power supply (Pin VPS1 and VPS2) Voltage 4.75 5.25 V Supply current DSOP = low 194 mA DSOP = High 126 1/ Testing and other quality control techniques are used to the extent deemed necessary to assure product performance over the specified temperature range. Product
39、may not necessarily be tested across the full temperature range and all parameters may not necessarily be tested. In the absence of specific parametric testing, product performance is assured by characterization and/or design. 2/ VS= 5 V; TA= 25C; LO = 0 dBm single-ended drive; baseband I/Q amplitud
40、e = 1 V p-p differential sine waves in quadrature with a 500 mV dc bias; baseband I/Q frequency (fBB) = 1 MHz, unless otherwise noted. 3/ The input bias level can vary as long as the voltages on the individual IBBP, IBBN, QBBP, and QBBN pins remain within the specified absolute voltage level. Provid
41、ed by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/12649 REV PAGE 8 Case X D/EAA2A1SEATINGPLANETOP VIEWb24 PLSeLPIN 1INDICATORBOTTOM VIEWe1e21618137 1224 19PIN 1INDICATOREXPOSEDPADDi
42、mensions Symbol Millimeters Symbol Millimeters Min Max Min Max A 0.70 0.80 e 0.50 BSC A1 0.05 e1 2.45 2.65 A2 0.20 REF e2 0.25 b 0.18 0.30 L 0.30 0.50 D/E 3.90 4.10 NOTES: 1. All linear dimensions are in millimeters. 2. Falls within JEDEC MO-220-WGGD. FIGURE 1. Case outline. Provided by IHSNot for R
43、esaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/12649 REV PAGE 9 Case outline X Terminal number Terminal symbol Terminal number Terminal symbol 1 DSOP 13 NC 2 COMM 14 COMM 3 LOIP 15 NC 4 LOIN 16 RF
44、OUT 5 COMM 17 COMM 6 NC 18 VPS1 7 NC 19 COMM 8 COMM 20 COMM 9 QBBN 21 IBBP 10 QBBP 22 IBBN 11 COMM 23 COMM 12 COMM 24 VPS2 NOTES: 1. NC = No connect. Do not connect to this pin. 2. Connect to the ground plane via a low impedance path. FIGURE 2. Terminal connections. Case outline X Terminal Descripti
45、on Number Mnemonic 1 DSOP Output disable. A logic high on this pin disables the RF output. Connect this pin to ground or leave it floating to enable the output 2, 5, 8, 11, 12, 14, 17, 19, 20, 23 COMM Input Common pins. Connect to ground plane via a low impedance path. 3,4 LOIP, LOIN Local Oscillato
46、r inputs. Single-ended operation: The LOIP pin is driven from the LO source through an AC-coupling capacitor while the LOIN pin is ac-coupled to ground through a capacitor. Differential operation: The LOIP and LOIN pins must be driven differentially through ac-coupling capacitors in this mode of ope
47、ration. 6, 7, 13, 15 NC No connect. These pins can be left open or tied to ground. 9, 10, 21, 22 QBBN, QBBP, IBBN, IBBP Differential in phase and Quadrature baseband inputs. These high impedance inputs should be dc-biased to the recommended level (500 mV). These inputs should be driven from a low im
48、pedance source. Nominal characterized ac signal swing is 500 mV p-p on each pin. This results in a differential drive of 1 V p-p. These inputs are not self-biased and must be externally biased. 16 RFOUT RF output. Single ended, 50 internally biased RF output. RFOUT must be ac-coupled to the load. 18, 24 VPS1, VPS2 Positive supply voltage pins. All pins should be
