1、MIL-M-385L0/422A 57 W 9777706 00611777 7 W -%5a-19 - I REQUIREMENTS I I REMOVED I MIL-M-38510/422A 9 August 1983 SUPtRStUINti MIL-M-38510/422(USAF) 27 November 1979 MILITARY SPECIFICATION MICROCIRCUITS, DIGITAL, SCHOTTKY TTL, CLOCK GENERATOR AND DRIVER, MONOLITHIC SILICON I IINACTIVE FOR NEW DESIGN
2、AFTER DATE OF THIS REVISION I This specification is approved for use by all Depart- ments and Agencies of the Department of Defense. 1. SCOPE 1.1 Scope. This specification covers the detail requirements for monolithic silicon, Schottky TTL, clock generator/driver microcircuits. One product assurance
3、 class and a choice of case outlines and lead finishes are provided and are reflected in the complete part number. MIL-M-38510, except the JAN or “J“ certification mark shall not be used. 1.2 Part number. 1.2.1 Device type. The device type shaT1 be as follows: Device type Circuit Thellcomplete part
4、number shall be in accordance with o1 Clock generator/driver 1.2.2 Device class. The device class shall be the product assurance level as defined in MIL-M-38510. 1.2.3 Case outline. The case outline shall be designated as follows: Outline letter Case outline (see MIL-M-38510, appendix C) E D-2 (16-1
5、 ead, 1/4“ x 7/8“), dual -i n-1 i ne package 1.3 Absolute maximum ratings. Supply voltage range (VDDI - - - - - - - - - - Supply voltage range (Vcc) - - - - - - - - - - Input voltage range- - - - - - - - - - - - - - Storage temperature range- - - - - - - - - - - Maximum power dissipation, (PD) L/ -
6、- - - - - Lead temperature (soldering, 10 seconds) - - - Thermal resistance, junction-to-case (QJc) : Junction temperature (TJ)- - - - - - - - - - - Case E - - - - - - - - - - - I - - - - - - - -0.5 V dc to t13.5 V dc -0.5 V dc to t7.0 V dc -1.0 V dc to t7.0 V dc -65C to +15OoC 791 mW dc t3OO“C O. 0
7、3 C/W +175“C - l/ Must withstand the added PD due to short circuit test (e.g., 10s). Beneficial comments (recommendations, additions, deletions) and any perti- nent data which may be of use in improving this document should be addressed to: Rome Air Development Center (RBE-21, Griffiss AFB, NY 13441
8、, by using the self -addressed Standardization Document Improvement Proposal (DD Form 1426) appearing at the end of this document or by letter. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-1.4 Recommended operating conditions. Supply voltage range
9、 (VDD) - - - - - - Supply voltage range (Vcc) - - - - - - Minimum high-level input voltage All other inputs - - - - - - - - - - Maximum low-level input voltage- - - - Case operating temperature range (TC)- Setup time, tSHL/LH msfN input- - - - - - - - - - - - RESIN to STSTB - - - - - - - - - - Hold
10、time, t“L/HL _I RESIN to STSTB - - - - - - - - - - 10.8 V dc minimum to 13.2 V dc maximum 4.5 V dc minimum to 5.5 V dc maximum 2.6 V dc 2.0 V dc -55C to +125C 50 ns -4 t 21 ns minimum 0.8 V dC - -P 21 ns minimum 4*- Oscillating frequency (fOSC) - - - - RESIN input hysteresis (HI - - - - - - 0.25 mV
11、minimum Positive-going threshol d voltage (VT+)- - - - - - - - - - - - 2.6 V maximum Negative-going threshold voltage (VT.)- - - - - - - - - - - - 0.8 V minimum Normalized fanout (maximum values) i/ Low leve1 - - - - - - - - - - - - - 40 I 10 I 10 4.3 MHz minimum to 18.43 MHz maximum i(TTL)OSC IRese
12、t, Ready I STSTB 10 I 1 Ill High level - - - - - - - - - - - - 2. APPLICABLE DOCUMENTS 2.1 Governmepecifications and standards. Unless otherwise specified, the following speci cations and standards, of the issue listed in that issue of the Department of Defense Index of Specifications and Standards
13、specified in the solici- tation, form a part of this specification to the extent specified herein. SPECI F I CATION MILITARY MIL -M-38510 - Microcircuits, General Specification for. STANDARD M I L I TARY MIL -STD -883 - -Test Methods and Procedures for Microelectronics. (Copies of specifications, st
14、andards, handbooks, drawings, and pub1 ications required by manufacturers in connection with specific acquisition functions should be obtained from the contracting activity or as directed by the contracting officer.) 2.2 Order of precedence. In the event of a conflict between the text of this specif
15、ication and the references cited herein, the text of this specification shall take precedence. 3. REQUIREMENTS 3.1 Detail specification. The individual item requirements shall be in accordance with MI-0 , and as specified herein. 3.2 Design, construction, and physical dimensions. The design, constru
16、ction, and physicalmensions shall be as speciffed in -510 and herein. 2/ tp = OSC. C. CL 3/ Fanout of 1 = 250 pA for low level, fanout of 1 = 100 KA for high level. C Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-fl-38530/422A 59 W 9999906 0064
17、783 5 E MIL-M-38510/422A o *- a o TABLE I. Electrical performance characteristics. I I Test I Symbol I I I High level output vol tage, 181, $2 I I 10“ i I IHigh-level output voltage, IVOH2 I READY, RESET I I I f V03 IOSC, m, 82 (TTL) I I Hi gh-1 evel output vol tage, i i I Low-1 evel output vol tage
18、, 1 VOL 1 I81, $2, READY, I I RESET, STSTB 1 I I ILow-level output vol tage, I VOL2 182 (TTL), OSC I I I I I 1 Input cl amp vol tage I I I I I I I I I I IHigh-level input current IIIH I I I I i VIC ILow-level input current f IIL i i I Output short circuit 110s Icurrent, OSC, $2 (TTL), I I STSTB, REA
19、DY, RESET I I I I Supply current I Icc I I I 1 IDD I lnput capacitance ICIN I I I I I I I I I I I I 141 to 2 delay ItPLH4 I 182 to $1 delay /tPLH I I I 1l to 82 delay ItPLH5 I I TLH 161, 82 rise time Il, I 2 fall time I THL II31 pulse width tdl 182 pulse width I t82 I I Limits i/ I I Conditions L/ !
20、Min IMax IUnit I I I I I cc = 4.5 Y; I 9.0 I IV i VDD = 10.8 V; I I I I I I IOH = -100 PA I I I I I I VIL = GND VIH = 4.5 V I 3.3 I IV I I I I I I I I I ND I 2.4 I IV VDD = 10.8 Y, 4.5 VI I I I I I I I IOH = -1 mA I VDD = 10.8 V; VIH = 4.5 VI I I I I 10.45 I V I I cc = 4.5 V; VIL = GND I I I I IOL =
21、 2.5 mA I vcc = 5.5 v I I 10 I UA I VDD = 13.2 V I I I I VIL = 5.5 V I I I I VCC - 5.0 V I -10 I -70 I mA I VDD = 13.2 V I I I 1 I I I I II I I I I I 115 I mA I I I I I 2 ImA I 1 I I I pcc = 5.5 “ VDD = 13.2 V I I I Vcc = 5.0 Y; VDD = 12 V; I 8 IPF I VBIAS = 2.5 V; f = 1 MHz;I I I TC = +25C I I I I
22、I I I I I 2tp-201 I ns I -cL = 50 Pk I I II I IT I (see fig 5 for Ri) 13-45 i I ns I I I I I I IO I ns I I I I I 1 2tp-251 I ns I Ia- I I I 1% iJ i 2 FIGURE 2. Logic and timing diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-uillator functio
23、n The oscillator circuit derives its basic operating frequency from an external, series resonant, fundamental mode crystal. The two inputs, XTAL1 and XTAL2, provide the crystal connections. Crystal frequency is selected to be 9 times the associated processor operating frequency, or: Crystal frequenc
24、y = -9- tP Where tp = processor cycle time (period), trimning as indicated in the circuit. Crystals exceeding 10 MHz may require frequency The oscillator circuit may be operated with overtone made crystals. An external LC network must be added to the tank input as shown in the diagram to compensate
25、for the lower gain overtone crystal. The LC network is AC coupled to ground. The formula for the LC network is: F= 1 2* 437 1 ri- Crystal requirements Tolerance: ,005X -55O to 125OC Resonance: Series (fundamental )* Load capacitance: 20 -35 pF Equivalent resistance: 75-2On Power dissipation: 4mW min
26、 *With tank circult use 3rd overtone mode. I I RDYIN FIGURE 3. Crystal input requirements. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-NC SP 3 SP2 NC SPI NC NC GND 16 15 14 13 12 +5.OVk5% NC P NC NC MIL-M-385L0/422A 57 7777706 0064787 b M MIL-M-3
27、8510/422A P L 3 4 5 * 5 %o ov NOTES : 2. All pulse widths shall be +5%. 3. 1. CL = 50 PF +lo% The pin designations shown above indicate the stresses to be applied (see waveforms). “NC“ indicates no connection. I 7 - 5.0 V k 5 O10 SPI ov - I 5.0V SP2 k 5% -0v FIGURE 4. Burn-in and steady state life t
28、est circuit and inwt waveforms, Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,- MIL-M-385iO/q22A 57 7777706 0064788 W SEE VCC Voo SEE NOTE I p NOTEI Y l-7- PULSE GEN ERATOR LA- lN-Ar-( FORCING ) IN-8 FUNCTION vL %E 3 P XTALI XTAL2 RESET occ NOTE3 2
29、(TTL) - RECIN SYNC RDY I N GFJ I NOTES : 2. D1 = 1N3064 or equivalent. 1. Vcc = 5.0 Y; YDD = 12.0 Y RL 2L LIaR 2.1 Y 3. Loading: Ready, reset 33On r5% 150 pF 210% pi2 (TTL), OSC 330a r5% 01, pi2 Open 470 55% 5.3 + Y FIGURE 5. Switching waveforms for device type 01. Provided by IHSNot for ResaleNo re
30、production or networking permitted without license from IHS-,-,-flIL-fl-38510/V22A 57 777770b 0064787 T 4. The XTAL1 and XTALP inputs may be driven by either a pulse generator, automatic logic tester or a flip-flop (543112) as shown below. characteristics are: Pulse generator or logic tester wavefor
31、m +OUTPUT -OUTPUT I I 1 pins4 +5ns Rise time = fall time = 5 ns max (0.7 V to 2.7 V). Timing references are at 1.5 V. m+5-0v CLOCK 2.0 +0.2v 0.8 20.2V 2.0 +0.2v 0.8+-0.2V Flip flop input curcuit. 5. IN-A has the following characteristics: gen (0.7 V to 2.7 V). IN-B and IN-C have the following charac
32、teristics: gen = 3.0 V, rise time = fall time = l ns (0.7 V to 2.7 V). =3.0 V, rise time = fall time = 10 ns 6. FIGURE 5. Switching waveforms for device type O1 - Continued. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-flIL-M-3B510/422A 57 W 79770
33、6 0064770 b MIL-M-38510/422A I - 7- - OSC XTALI XTAL2 d - -VOL I tPLH44 VOH VOL 1.5V 2 TTL Waveform A 3.0 +-O. 2 V IN-A (SYNC) OVf0.2V -I- VOH VOL 7.0 V #2 0.8V Waveform i3 FIGURE 5. Switching waveforms for device type O1 - Continued. 12 Provided by IHSNot for ResaleNo reproduction or networking per
34、mitted without license from IHS-,-,-MIL-M-385L0/22A 57 7777706 00611771 8 W MI L-M- 385 1 O/ 4 2 2A VOH - -VOL -VOH STSTB VOL RESET 3.0+0.2V IN-C (RDYIN) VOH VOL - READY Waveform C FIGURE 5. Switching waveforms for device type O1 - Continued; Provided by IHSNot for ResaleNo reproduction or networkin
35、g permitted without license from IHS-,-,-c f 14 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-fl-385L/LI22A 59 M 9999906 0064793 1 4z c 4 c! -I- - 3 I oi h m N L 1 15 Provided by IHSNot for ResaleNo reproduction or networking permitted without
36、license from IHS-,-,-c! 3 el4elelxxxxxxxxxxelelelelelelelxxxxxxxx “8: # p. x x x x x el el el el el el el el el el el J el el el el el el el elel el el el -.- - el el el el x x x x x x z x x x el el el el el el el el x x x T x x x x 5 mmmmmmmmmmmmmmmmuuuuuu “$2 elelclclelelelelelelelelxxxxxxxxxxelel
37、xxxxxD I-/ IEl Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,- MIL-M-385L0/422A 59 M 479470b 00bY79b 7 W MIL-M-38510/422A k a c w r Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-I I M “5 h a 81 IS
38、Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-s m c 20 c Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-. MI L-M-38510/422(USAF) NOTES: Prior to measuring output parameters, the device under test m
39、ust be initialized according to the following flow di;igr:im. Terminal conditions must be applied prior to initialization. Clock pu1se“CP“ is aleve1 change as defined in I;iguie 5, note 5 and by the waveforms below: START l _9.4v C7-T YES 4 -+ 2CPrn Niiiiihcr olclock piilses “CI“. c.g. one clock pii
40、lse. 2/ 0.8 V, then VT+ min. 3! XTALI and XTAL2 inputs arc defined by figure 5, note 5. f . r . - -21 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-4/ 2.6 V, then VT- max. .Y Prior to performing truth table tests, the device under test must be init
41、ialized according to the following flow diagram. Clock pulse “CP“ is u single pulse as defined in table III, note 6 and by the waveforms below: SYNC =L RDYIN = L RESIN =H * YES I=H NO *Number of clock pulses “CP“, e.g. one clock pulse. RESIN=L 0 INITIALIZATION COMPLETE Provided by IHSNot for ResaleN
42、o reproduction or networking permitted without license from IHS-,-,-a 9 a t a MIL-M-38510/422A 57 W 7977706 0064801 7 W MIL-M-38510/422A 4/ Functional test timing waveforms: r“ ns _I A ALL INPUTS 8 4 OUTPUTS RELEVANT AT 85 ns MIN ALL Y OUTPUTS A r L 1 Input voltages are: A 2 2.0 V, B 5 0.8 V except
43、RESIN: A I 2.6 V; B s 0.8 V The measurement terminal is all outputs. Output voltages are defined in the following table: outputs L H 4L2 I 0.45 V Ready, Reset I 0.45 V 2 9.0 V 2 3.3 v All other outputs 5 0.45 V 2 2.4 V 8/ Test numbers 37 through 116 shali be run in sequence. e/ Tests shall be perfor
44、med with fundamental mode crystals as specified in figure 3. Crystal frequencies shall be: Test No. 128- 4.5 MHz Test No. 129-18.432 MHz HI/ These tests shall be performed for initial qualification only and shail only apply to subgroup one for CIN or subgroup 9 for Fosc (see 4.4.1). Provided by IHSN
45、ot for ResaleNo reproduction or networking permitted without license from IHS-,-,-4.3 Qualification inspection. Qualification inspection is not required. 4.4 Quality conformance inspection. Quality conformance inspection shall be in accordance with MIL - M 38510 , and as specified herein. Inspection
46、s to be performed shall be those specified in method 5005 of MIL-STD-883 and herein for groups A, B, C, and O inspections (see 4.4.1 through 4.4.4). Generic test data (see 6.6) may be used to satisfy the requirements for groups C and D inspections. Quality conformance inspection shall be completed o
47、n the specific devices covered by this specification before they are shipped. 4.4.1 Group A inspection. Group A inspection shall be in accordance with table I of method 5005 of MIL-STD-893 and as follows: a. Tests shall be as specified in table II herein. b. Subgroups 4, 5, and 6 of table I of metho
48、d 5005 of MIL-STD-883 shall be c. d. The read and record measurements under subgroups 1, 2, and 12 only shall be omitted. The CIN measurement under subgroup 1 shall be performed after process or design changes which may affect design capacitance. performed after process or design changes which may affect oscillator design characteristics 4.4.2 Group B inspection. Group B inspection shall be in accordance with table II of met
