1、 MIL-PRF-19500/313J 24 February 2011 SUPERSEDING MIL-PRF-19500/313H 18 January 2006 PERFORMANCE SPECIFICATION SHEET SEMICONDUCTOR DEVICE, TRANSISTOR, NPN, SILICON, LOW POWER, TYPES 2N2432, 2N2432A, 2N2432UB, 2N2432AUB, JAN, JANTX, JANTXV, JANS, JANHC, AND JANKC This specification is approved for use
2、 by all Departments and Agencies of the Department of Defense. The requirements for acquiring the product described herein shall consist of this specification sheet and MIL-PRF-19500. 1. SCOPE 1.1 Scope. This specification covers the performance requirements for low power, high speed chopper, NPN si
3、licon transistors. Four levels of product assurance are provided for each device type as specified in MIL-PRF-19500. Two levels of product assurance are provided for die. 1.2 Physical dimensions. See figure 1 (TO-18), figure 2 (JANHC/JANKC die), and figure 3 (AUB and UB package). 1.3 Maximum ratings
4、, unless otherwise specified, TC=+ 25C. Type VCBOV dc VCEOV dc VECOV dc ICmA dc TJand TSTGC 2N2432, 2N2432UB 30 30 15 100 -65 to 2N2432A, 2N2432AUB 45 45 18 100 +200 Type PTTA= +83C (1) PTTC= +150C (1) PTTSP= +165C RJA(2) RJC(2) RJSP(2) 2N2432 2N2432A 2N2432UB 2N2432AUB mW 360 360 N/A N/A mW 360 360
5、 N/A N/A mW N/A N/A 360 360 C/W 325 325 N/A N/A C/W 150 150 N/A N/A C/W N/A N/A 95 95 (1) For derating, see figures 4 and 5. (2) For thermal impedance curves, see figures 6, 7, and 8. AMSC N/A FSC 5961 INCH-POUND * Comments, suggestions, or questions on this document should be addressed to DLA Land
6、and Maritime, ATTN: VAC, P.O. Box 3990, Columbus, OH 43218-3990, or emailed to Semiconductordla.mil. Since contact information can change, you may want to verify the currency of this address information using the ASSIST Online database at https:/assist.daps.dla.mil . The documentation and process co
7、nversion measures necessary to comply with this document shall be completed by 24 May 2011. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-PRF-19500/313J 2 1.4 Primary electrical characteristics at TA= +25C. Limits hFE1VCE= 5 V dc hFE2VCE= 5 V d
8、c hFE(inv)1VCE= 5 V dc IE= 200 A dc VCE(sat)IC= 10 mA dc rec(on)Ie= 100 A ac (rms) IB= 1 mA dc, IE= 0, f = 1 kHz IC= 10 A dc IC= 1 mA dc 2N2432 2N2432A IB= 500 A dc 2N2432 2N2432UB 2N2432A 2N2432AUB Min Max 30 80 400 2 3 V dc .15 Ohms 20 Ohms 15 2. APPLICABLE DOCUMENTS 2.1 General. The documents lis
9、ted in this section are specified in sections 3, 4, or 5 of this specification. This section does not include documents cited in other sections of this specification or recommended for additional information or as examples. While every effort has been made to ensure the completeness of this list, do
10、cument users are cautioned that they must meet all specified requirements of documents cited in sections 3, 4, or 5 of this specification, whether or not they are listed. 2.2 Government documents. 2.2.1 Specifications, standards, and handbooks. The following specifications, standards, and handbooks
11、form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATIONS MIL-PRF-19500 - Semiconductor Devices, General Specification for. DEPARTMENT OF DEFENSE STANDAR
12、DS MIL-STD-750 - Test Methods for Semiconductor Devices. * (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch or https:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) * 2.3 Ord
13、er of precedence Unless otherwise noted herein or in the contract, in the event of a conflict between the text of this document and the references cited herein, the text of this document takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific
14、 exemption has been obtained. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-PRF-19500/313J 3 Dimensions Symbol Inches Millimeters Note Min Max Min Max CD .178 .195 4.52 4.95 CH .170 .210 4.32 5.33 HD .209 .230 5.31 5.84 LC .100 TP 2.54 TP 6 LD
15、.016 .021 0.41 0.53 7,8 LL .500 .750 12.70 19.05 7,8 LU .016 .019 0.41 0.48 7,8 L1 .050 1.27 7,8 L2 .250 6.35 7,8 P .100 2.54 Q .030 0.76 5 TL .028 .048 0.71 1.22 3,4 TW .036 .046 0.91 1.17 3 r .010 0.25 10 45 TP 45 TP 6 NOTES: 1. Dimension are in inches. 2. Millimeters are given for general informa
16、tion only. 3. Beyond r (radius) maximum, TW shall be held for a minimum length of .011 inch (0.28 mm). 4. Dimension TL measured from maximum HD. 5. Body contour optional within zone defined by HD, CD, and Q. 6. Leads at gauge plane .054 +.001 -.000 inch (1.37 +0.03 -0.00 mm) below seating plane shal
17、l be within .007 inch (0.18 mm) radius of true position (TP) at maximum material condition (MMC) relative to tab at MMC. 7. Dimension LU applies between L1and L2. Dimension LD applies between L2and LL minimum. Diameter is uncontrolled in L1and beyond LL minimum. 8. All three leads. 9. The collector
18、shall be internally connected to the case. 10. Dimension r (radius) applies to both inside corners of tab. 11. In accordance with ASME Y14.5M, diameters are equivalent to x symbology. 12. Lead 1 = emitter, lead 2 = base, lead 3 = collector. FIGURE 1. Physical dimensions (similar to TO-18). Provided
19、by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-PRF-19500/313J 4 NOTES: 1. Chip size .015 x .019 inch .001 inch, (0.38 x 0.48 0.02 millimeter). 2. Chip thickness .010 .0015 inch, (0.25 0.04 millimeter). 3. Top metal Aluminum 15,000 minimum, 18,000 nominal
20、. * 4. Back metal Gold 3,500 minimum, 5,000 nominal. 5. Backside Collector 6. Bonding pad B = .003 inch (0.08 millimeter). E = .004 inch diameter (0.10 millimeter). * 7. Passivation Si3N4(Silicon Nitride) 5.6 k min, 8 k nom. * 8. See 6.4. FIGURE 2. Physical dimensions, JANHCA and JANKCA (B - version
21、) die. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-PRF-19500/313J 5 Symbol Dimensions Note Symbol Dimensions Note Inches Millimeters Inches Millimeters Min Max Min Max Min Max Min Max BH .046 .056 1.17 1.42 LS1 .035 .039 0.89 0.99 BL .115 .12
22、8 2.92 3.25 LS2 .071 .079 1.80 2.01 BW .085 .108 2.16 2.74 LW .016 .024 0.41 0.61 CL .115 .128 2.92 3.25 r .008 0.20 CW .085 .108 2.16 2.74 r1 .012 0.31 LL1 .022 .038 0.56 0.96 r2 .022 0.56 LL2 .017 .035 0.43 0.89 NOTES: 1. Dimensions are in inches. 2. Millimeters are given for general information o
23、nly. 3. Hatched areas on package denote metallized areas 4. Pad 1 = Base, Pad 2 = Emitter, Pad 3 = Collector, Pad 4 = Shielding connected to the lid. 5. In accordance with ASME Y14.5M, diameters are equivalent to x symbology. * FIGURE 3. Physical dimensions, surface mount (AUB and UB version). UB Pr
24、ovided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-PRF-19500/313J 6 3. REQUIREMENTS 3.1 General. The individual item requirements shall be as specified in MIL-PRF-19500 and as modified herein. 3.2 Qualification. Devices furnished under this specificat
25、ion shall be products that are manufactured by a manufacturer authorized by the qualifying activity for listing on the applicable qualified manufacturers list before contract award (see 4.2 and 6.3). 3.3 Abbreviations, symbols, and definitions. Abbreviations, symbols, and definitions used herein sha
26、ll be as specified in MIL-PRF-19500 and as follows. hFE(inv)Forward current transfer ratio except that the collector and emitter shall be interchanged. IeEmitter current (rms). PCB Printed circuit board. rec(on Small signal emitter to collector on state resistance. RJAThermal resistance junction to
27、ambient. RJCThermal resistance junction to case. RJSPThermal resistance junction to solder pads. VBCBase to collector voltage. V(BR)ECOBreakdown voltage, emitter to collector, with base open circuited. VEC(ofs)Emitter to collector offset voltage, i.e., open circuit voltage between emitter and collec
28、tor when the base to collector junction is forward biased. VecEmitter to collector voltage (rms). 3.4 Interface and physical dimensions. Interface and physical dimensions shall be as specified in MIL-PRF-19500, and on figures 1, 2, and 3. 3.4.1 Lead finish. Lead finish shall be solderable in accorda
29、nce with MIL-PRF-19500, MIL-STD-750, and herein. Where a choice of lead finish is desired, it shall be specified in the acquisition document (see 6.2). 3.5 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in 1.3, 1
30、.4, and table I. 3.6 Electrical test requirements. The electrical test requirements shall be as specified in table I. 3.7 Marking. Marking shall be in accordance with MIL-PRF-19500. 3.8 Workmanship. Semiconductor devices shall be processed in such a manner as to be uniform in quality and shall be fr
31、ee from other defects that will affect life, serviceability, or appearance. 4. VERIFICATION 4.1 Classification of inspections. The inspection requirements specified herein are classified as follows: a. Qualification inspection (see 4.2). b. Screening (see 4.3). * c. Conformance inspection (see 4.4 a
32、nd tables I and II and 4.5.7). 4.2 Qualification inspection. Qualification inspection shall be in accordance with MIL-PRF-19500 and as specified herein. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-PRF-19500/313J 7 4.2.1 JANHC and JANKC device
33、s. JANHC and JANKC devices shall be qualified in accordance with MIL-PRF-19500. 4.2.2 Group E qualification. Group E inspection shall be performed for qualification or re-qualification only. In case qualification was awarded to a prior revision of the specification sheet that did not request the per
34、formance of table II tests, the tests specified in table II herein that were not performed in the prior revision shall be performed on the first inspection lot of this revision to maintain qualification. * 4.3 Screening (JANS, JANTX, and JANTXV levels only). Screening shall be in accordance with tab
35、le E-IV of MIL-PRF-19500, and as specified herein. The following measurements shall be made in accordance with table I herein. Devices that exceed the limits of table I herein shall not be acceptable. Screen (see table E-IV of Measurement MIL-PRF-19500) JANS level JANTX and JANTXV levels (1) 3c Ther
36、mal impedance, method 3131 of MIL-STD-750, see 4.3.3. Thermal impedance, method 3131 of MIL-STD-750, see 4.3.3. 7 Optional Optional 9 ICBO2, hFE1Not applicable 10 48 hours minimum 48 hours minimum 11 ICBO2; hFE1; ICBO2= 100 percent of initial value or 5 nA dc, whichever is greater. hFE1= 15 percent.
37、 ICBO2, hFE112 See 4.3.1 See 4.3.1 13 Subgroups 2 and 3 of table I herein; ICBO2= 100 percent of initial value or 5 nA dc, whichever is greater; hFE1= 15 percent. Subgroup 2 of table I herein; ICBO2= 100 percent of initial value or 5 nA dc, whichever is greater; hFE1= 15 percent. 14 Required Require
38、d (1) Shall be performed anytime after temperature cycling, screen 3a; and does not need to be repeated in screening requirements. 4.3.1 Power burn-in conditions. Power burn-in conditions are as follows: VCB= 10 - 30 V dc; power shall be applied to achieve TJ= +135C minimum using a minimum PD= 75 pe
39、rcent of PTmaximum, TAambient rated as defined in 1.3. With approval of the qualifying activity and preparing activity, alternate burn-in criteria (hours, bias conditions, TJ, and mounting conditions) may be used for JANTX and JANTXV quality levels. A justification demonstrating equivalence is requi
40、red. In addition, the manufacturing sites burn-in data and performance history will be essential criteria for burn-in modification approval. 4.3.2 Screening (JANHC and JANKC). Screening of JANHC and JANKC die shall be in accordance with MIL-PRF-19500 “Discrete Semiconductor Die/Chip Lot Acceptance”.
41、 Burn-in duration for the JANKC level follows JANS requirements; the JANHC follows JANTX requirements. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-PRF-19500/313J 8 4.3.3 Thermal impedance. The thermal impedance measurements shall be performed
42、 in accordance with method 3131 of MIL-STD-750 using the guidelines in that method for determining IM, IH, tH, tMD(and VCwhere appropriate). The thermal impedance limit shall comply with the thermal impedance graph in figures 7, 8, and 9 (less than or equal to the curve value at the same tHtime) or
43、shall be less than the process determined statistical maximum limit as outlined in method 3131 of MIL-STD-750. See table II, subgroup 4 herein. 4.4 Conformance inspection. Conformance inspection shall be in accordance with MIL-PRF-19500 and as specified herein. 4.4.1 Group A inspection. Group A insp
44、ection shall be conducted in accordance with MIL-PRF-19500, and table I herein. * 4.4.2 Group B inspection. Group B inspection shall be conducted in accordance with the tests and conditions specified for subgroup testing in table E-VIa (JANS) of MIL-PRF-19500 and 4.4.2.1. Electrical measurements (en
45、d-points) and delta requirements shall be in accordance with table I, subgroup 2 and 4.5.7 herein. See 4.4.2.2 for JAN, JANTX, and JANTXV group B testing. Electrical measurements (end-points) and delta requirements for JAN, JANTX, and JANTXV shall be after each step in 4.4.2.2 and shall be in accord
46、ance with table I, subgroup 2 and 4.5.7 herein. * 4.4.2.1 Group B inspection (JANS), table E-VIa of MIL-PRF-19500. Subgroup Method Condition B4 1037 VCB= 10 V dc. B5 1027 VCB= 10 V dc; PD 100 percent of maximum rated PT(see 1.3). (NOTE: If a failure occurs, resubmission shall be at the test conditio
47、ns of the original sample.) Option 1: 96 hours minimum sample size in accordance with MIL-PRF-19500, table VIa, adjust TAor PDto achieve TJ= +275C minimum. Option 2: 216 hours minimum, sample size = 45, c = 0; adjust TAor PDto achieve a TJ= +225C minimum. 4.4.2.2 Group B inspection, (JAN, JANJ, JANT
48、X, and JANTXV). Separate samples may be used for each step. In the event of a lot failure, the resubmission requirements of MIL-PRF-19500 shall apply. In addition, all catastrophic failures during CI shall be analyzed to the extent possible to identify root cause and corrective action. Whenever a fa
49、ilure is identified as wafer lot or wafer processing related, the entire wafer lot and related devices assembled from the wafer lot shall be rejected unless an appropriate determined corrective action to eliminate the failures mode has been implemented and the devices from the wafer lot are screened to eliminate the failure mode. Step Me
