1、 MIL-PRF-19500/393L 5 September 2013 SUPERSEDING MIL-PRF-19500/393K 3 February 2012 PERFORMANCE SPECIFICATION SHEET SEMICONDUCTOR DEVICE, TRANSISTOR, NPN, SILICON POWER, TYPES 2N3418, 2N3418S, 2N3418U4, 2N3419, 2N3419S, 2N3419U4, 2N3420, 2N3420S, 2N3420U4, 2N3421, 2N3421S, AND 2N3421U4, JAN, JANTX,
2、JANTXV, JANS, JANSM, JANSD, JANSP, JANSL, JANSR, JANSF, JANSG, JANSH, JANHCC, JANKCC, JANKCCM, JANKCCD, JANKCCP, JANKCCL, JANKCCR, JANKCCF, JANKCCG, AND JANKCCH This specification is approved for use by all Departments and Agencies of the Department of Defense. The requirements for acquiring the pro
3、duct described herein shall consist of this specification sheet and MIL-PRF-19500. 1. SCOPE 1.1. Scope. This specification covers the performance requirements for NPN, silicon, transistors for use in medium power switching applications. Four levels of product assurance are provided for each device t
4、ype, and two levels of product assurance for die (element evaluation) are provided, as specified in MIL-PRF-19500. RHA level designators “M”, “D”, “P“, “L”, “R”, “F”, “G”, and “H” are appended to the device prefix to identify devices, which have passed RHA requirements. 1.2. Physical dimensions. See
5、 figure 1 (similar to TO-5 for long leaded devices and TO-39 for short leaded devices), figure 2 for JANHC and JANKC (die), and figure 3 (2N3418U4 through 2N3421U4) dimensions. 1.3 Maximum ratings, unless otherwise specified TA= +25C. Type PTTA= +25C (1) PTTC= +100C (1) VCBOVCEOVEBOICIC(2) TSTGand T
6、JRJA(3) RJC(3) W W V dc V dc V dc A dc A dc C C/W C/W 2N3418, 2N3418S 1.0 5 85 60 8 3 5 -65 to +200 175 175 18 4.5 2N3418U4 1.0 15 85 60 8 3 5 2N3419, 2N3419S 2N3419U4 1.0 5 125 80 8 3 5 -65 to +200 175 175 18 4.5 1.0 15 125 80 8 3 5 2N3420, 2N3420S 2N3420U4 1.0 5 85 60 8 3 5 -65 to +200 175 175 18
7、4.5 1.0 15 85 60 8 3 5 2N3421, 2N3421S 2N3421U4 1.0 5 125 80 8 3 5 -65 to +200 175 175 18 4.5 1.0 15 125 80 8 3 5 (1) For derating, see figure 4 through figure 6. (2) This value applies for tp 1 ms, duty cycle 50 percent. (3) For thermal impedance curves see figures 7, 8, and 9. AMSC N/A FSC 5961 IN
8、CH-POUND * Comments, suggestions, or questions on this document should be addressed to DLA Land and Maritime, ATTN: VAC, P.O. Box 3990, Columbus, OH 43218-3990, or emailed to Semiconductordla.mil. Since contact information can change, you may want to verify the currency of this address information u
9、sing the ASSIST Online database at https:/assist.dla.mil. The documentation and process conversion measures necessary to comply with this document shall be completed by 5 December 2013. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-PRF-19500/39
10、3L 2 1.4. Primary electrical characteristics at TA= +25C. Limits hFE2(1) hFE4(1) VCE(sat) (1) VBE(sat)(1) |hfe| CoboVCE= 2 V dc VCE= 5 V dc IC= 1 A dc IC= 1 A dc VCE= 10 V dc VCB= 10 V dc IC= 1 A dc IC= 5 A dc IB= 0.1 A dc IB= 0.1 A dc IC= 0.1 A dc IE= 0 f = 20 MHz 100 kHz f 1 MHz 2N3418 2N3420 2N34
11、18 2N3420 2N3418S 2N3420S 2N3418S 2N3420S 2N3418U4 2N3420U4 2N3418U4 2N3420U4 2N3419 2N3421 2N3419 2N3421 2N3419S 2N3421S 2N3419S 2N3421S 2N3419U4 2N3421U4 2N3419U4 2N3421U4 V dc V dc pF Min 20 40 10 15 0.6 1.3 Max 60 120 0.25 1.2 8 150 (1) Pulsed (see 4.5.1). 2. APPLICABLE DOCUMENTS 2.1 General. Th
12、e documents listed in this section are specified in sections 3, 4, or 5 of this specification. This section does not include documents cited in other sections of this specification or recommended for additional information or as examples. While every effort has been made to ensure the completeness o
13、f this list, document users are cautioned that they must meet all specified requirements of documents cited in sections 3, 4, or 5 of this specification, whether or not they are listed. 2.2 Government documents. 2.2.1 Specifications, standards, and handbooks. The following specifications, standards,
14、 and handbooks form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATIONS MIL-PRF-19500 - Semiconductor Devices, General Specification for. DEPARTMENT OF
15、DEFENSE STANDARDS MIL-STD-750 - Test Methods for Semiconductor Devices. * (Copies of these documents are available online at http:/quicksearch.dla.mil or https:/assist.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.3 Order of
16、 precedence. Unless otherwise noted herein or in the contract, in the event of a conflict between the text of this document and the references cited herein, the text of this document takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exe
17、mption has been obtained. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-PRF-19500/393L 3 Dimensions Symbol Inches Millimeters Note Min Max Min Max CD .305 .335 7.75 8.51 CH .240 .260 6.10 6.60 HD .335 .370 8.51 9.40 LC .200 TP 5.08 TP 6 LD .016
18、 .021 0.41 0.53 LL .500 .750 12.7 19.05 7 LU See notes 7, 13, 14 L1.050 1.27 7 L2.250 6.35 7 P .100 2.54 5 Q .040 1.02 4 TL .029 .045 0.74 1.14 3,10 TW .028 .034 0.71 .86 9,10 r .010 0.25 11 45 TP 45 TP 6 NOTES: 1. Dimensions are in inches. 2. Millimeters are given for general information only. 3. S
19、ymbol TL is measured from HD maximum. 4. Details of outline in this zone are optional. 5. Symbol CD shall not vary more than .010 inch (0.25 mm) in zone P. This zone is controlled for automatic handling. 6. Leads at gauge plane .054 inch (1.37 mm) +.001 inch (0.03 mm) -.000 inch (0.00 mm) below seat
20、ing plane shall be within .007 inch (0.18 mm) radius of TP relative to tab. Device may be measured by direct methods or by gauge. 7. Symbol LU applies between L1and L2. Dimension LD applies between L2and LL minimum. Diameter is uncontrolled in L1and beyond LL minimum. 8. Lead number 3 is electricall
21、y connected to case. 9. Beyond r maximum, TW shall be held for a minimum length of .021 inch (0.53 mm). 10. Lead number 4 omitted on this variation. 11. Symbol r applied to both inside corners of tab. 12. For transistor types 2N3418S, 2N3419S, 2N3420S, 2N3421S, LL is .500 (12.70 mm) minimum and .750
22、 (19.05 mm) maximum. 13. For transistor types 2N3418, 2N3419, 2N3420, 2N3421, LL is 1.500 (38.10 mm) minimum, and 1.750 (44.45 mm) maximum. 14. In accordance with ASME Y14.5M, diameters are equivalent to x symbology. 15. Lead 1 is emitter, lead 2 is base, and lead 3 is collector. FIGURE 1. Physical
23、dimensions. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-PRF-19500/393L 4 1. Chip size: .075 x .075 inch .002 inches (1.905 x 1.905 mm 0.051 mm). 2. Chip thickness: .014 .003 inch nominal (0.356 0.0762 mm). 3. Top metal: Aluminum 110,000 minim
24、um, 125,000 nominal. 4. Back metal: Al/Ti/Ni/Au 10,000 minimum, 12,500 nominal. 5. Backside: Collector. 6. Bonding pad: B = .014 x .014 inch (0.3556 x 0.3556 mm), E = .014 x .014 inch (0.3556 x 0.3556 mm). * 7. In accordance with ASME Y14.5M, diameters are equivalent to x symbology. FIGURE 2. JANHCC
25、 and JANKCC-version die dimensions. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-PRF-19500/393L 5 Symbol Dimensions Inches Millimeters Min Max Min Max BL .215 .225 5.46 5.72 BW .145 .155 3.68 3.94 CH .049 .075 1.24 1.91 LH .020 0.51 LW1 .135 .
26、145 3.43 3.68 LW2 .047 .057 1.19 1.45 LL1 .085 .125 2.16 3.17 LL2 .045 .075 1.14 1.91 LS1 .070 .095 1.78 2.41 LS2 .035 .048 0.890 1.21 Q1 .030 .070 0.76 1.78 Q2 .020 .035 0.510 0.890 Term 1 Collector Term 2 Base Term 3 Emitter NOTES: 1. Dimensions are in inches. 2. Millimeters are given for general
27、information only. * 3. In accordance with ASME Y14.5M, diameters are equivalent to x symbology. FIGURE 3. Physical dimensions and configuration (U4). BLBW CHLH(3X)LS2Q2 LW2(2X)Q1 (2X)LW1LL1LL2 (2X)U412 3Ls1Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-
28、,-,-MIL-PRF-19500/393L 6 3. REQUIREMENTS 3.1 General. The individual item requirements shall be as specified in MIL-PRF-19500 and as modified herein. 3.2 Qualification. Devices furnished under this specification shall be products that are manufactured by a manufacturer authorized by the qualifying a
29、ctivity for listing on the applicable qualified manufacturers list (QML) before contract award (see 4.2 and 6.3). 3.3 Abbreviations, symbols, and definitions. Abbreviations, symbols, and definitions used herein shall be as specified in MIL-PRF-19500. RJAThermal resistance junction to ambient. RJCThe
30、rmal resistance junction to case. 3.4 Interface and physical dimensions. Interface and physical dimensions shall be as specified in MIL-PRF-19500, and on figure 1, (similar to TO-5 and TO-39), figure 2 (die), and figure 3 (surface mount) herein. 3.4.1 Lead finish. Lead finish shall be solderable in
31、accordance with MIL-PRF-19500, MIL-STD-750, and herein. Where a choice of lead finish is desired, it shall be specified in the acquisition document (see 6.2). 3.5 Radiation hardness assurance (RHA). Radiation hardness assurance requirements, PIN designators, and test levels shall be as defined in MI
32、L-PRF-19500. 3.6 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in 1.3, 1.4, and table I. 3.7 Marking. Marking shall be in accordance with MIL-PRF-19500. The radiation hardened designator M, D, P, L, R, F, G, or
33、H shall immediately precede (or replace) the device “2N” identifier (depending upon degree of abbreviation required). 3.8 Workmanship. Semiconductor devices shall be processed in such a manner as to be uniform in quality and shall be free from other defects that will affect life, serviceability, or
34、appearance. 4. VERIFICATION 4.1 Classification of inspections. The inspection requirements specified herein are classified as follows: a. Qualification inspection (see 4.2). b. Screening (see 4.3). c. Conformance inspection (see 4.4 and, tables I, II, and III). 4.2 Qualification inspection. Qualific
35、ation inspection shall be in accordance with MIL-PRF-19500 and as specified herein. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-PRF-19500/393L 7 4.2.1 Group E qualification. Group E inspection shall be performed for qualification or re-qualif
36、ication only. In case qualification was awarded to a prior revision of the specification sheet that did not request the performance of table III tests, the tests specified in table III herein that were not performed in the prior revision shall be performed on the first inspection lot of this revisio
37、n to maintain qualification. 4.2.2 JANHC and JANKC qualification. JANHC and JANKC qualification inspection shall be in accordance with MIL-PRF-19500. 4.3 Screening (JANS, JANTX, and JANTXV levels only). Screening shall be in accordance with table E-IV of MIL-PRF-19500, and as specified herein. The f
38、ollowing measurements shall be made in accordance with table I herein. Devices that exceed the limits of table I herein shall not be acceptable. Screen (see table E-IV of MIL-PRF-19500) Measurement JANS level JANTX and JANTXV levels (1) 3c Thermal impedance (see 4.3.3) Thermal impedance (see 4.3.3)
39、9 ICEX1and hFE2ICEX111 ICEX1; hFE2; ICEX1= 100 percent or 50 nA dc, whichever is greater; hFE2= +15, -10 percent change of initial value. ICEX1and hFE2; ICEX1= 100 percent or 100 nA dc, whichever is greater. 12 See 4.3.1 See 4.3.1 13 Subgroups 2 and 3 of table I herein; ICEX1= 100 percent or 50 nA d
40、c, whichever is greater; hFE2= +15, -10 percent of initial value. Subgroup 2 of table I herein; ICEX1= 100 percent or 100 nA dc, whichever is greater; hFE2= +20, -10 percent of initial value. (1) Shall be performed anytime after temperature cycling, screen 3a; JANTX and JANTXV levels do not need to
41、be repeated in screening requirements. 4.3.1 Power burn-in conditions. Power burn-in conditions are as follows: VCB= 10 - 30 V dc. Power shall be applied to achieve TJ= +175C minimum and a minimum PD= 75 percent of PTmaximum rated as defined in 1.3. 4.3.2 Screening JANHC or JANKC. Screening of die s
42、hall be in accordance with MIL-PRF-19500. 4.3.3 Thermal impedance. The thermal impedance measurements shall be performed in accordance with method 3131 of MIL-STD-750 using the guidelines in that method for determining IM, IH, tH, tSW(VCand VHwhere appropriate). Measurement delay time (tMD) = 70 s m
43、ax. See table III, group E, subgroup 4 herein. 4.4 Conformance inspection. Conformance inspection shall be in accordance with MIL-PRF-19500 and as specified herein. 4.4.1 Group A inspection. Group A inspection shall be conducted in accordance with MIL-PRF-19500 and table I herein. Electrical measure
44、ments (end-points) shall be in accordance with the applicable inspections of table I, subgroup 2 herein. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-PRF-19500/393L 8 4.4.2 Group B inspection. Group B inspection shall be conducted in accordanc
45、e with the conditions specified for subgroup testing in table VIa (JANS) of MIL-PRF-19500 and 4.4.2.1. Electrical measurements (end-points) shall be in accordance with group A, subgroup 2. See 4.4.2.2 for JAN, JANTX, and JANTXV group B testing. Electrical measurements (end-points) for JAN, JANTX, an
46、d JANTXV shall be after each step in 4.4.2.2 and shall be in accordance with table I, subgroup 2 herein. * 4.4.2.1 Group B inspection, table E-VIa (JANS) of MIL-PRF-19500. Subgroup Method Condition B3 2037 Test condition D. All internal wires for each device shall be pulled separately. B4 1037 VCE=
47、5 V dc, 2,000 cycles, adjust device current, or power, to achieve a minimum TJof +100C. B5 1027 VCE= 5 V dc, PTadjusted to achieve TJand time required in MIL-PRF-19500. 4.4.2.2 Group B inspection, (JAN, JANTX, and JANTXV). Separate samples may be used for each step. In the event of a lot failure, th
48、e resubmission requirements of MIL-PRF-19500 shall apply. In addition, all catastrophic failures during CI shall be analyzed to the extent possible to identify root cause and corrective action. Whenever a failure is identified as wafer lot and wafer processing related, the entire wafer lot and relat
49、ed devices assembled from the wafer lot shall be rejected unless an appropriate determined corrective action to eliminate the failures mode has been implemented and the devices from the wafer lot are screened to eliminate the failure mode. Step Method Condition 1 1026 Steady-state life: 1,000 hours minimum, VCB= 10 V dc, power
