1、i INCHPOUND MILSTD7502 w/CHANGE 4 1 September 2013 SUPERSEDING MILSTD750-2 w/CHANGE 3 29 April 2013 (see 6.4) DEPARTMENT OF DEFENSE TEST METHOD STANDARD MECHANICAL TEST METHODS FOR SEMICONDUCTOR DEVICES PART 2: TEST METHODS 2001 THROUGH 2999 AMSC N/A FSC 5961The documentation and process conversion
2、measures necessary to comply with this revision shall be completed by 15 October 2013. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-STD-750-2 w/CHANGE 4 ii FOREWORD 1. This standard is approved for use by all Departments and Agencies of the De
3、partment of Defense. 2. This revision has resulted in many changes to the format, but the most significant one is the splitting the document into parts. See MILSTD750 for the change summary. 3. Comments, suggestions, or questions on this document should be addressed to: Commander, Defense Logistics
4、Agency, DLA Land and Maritime, ATTN: VAC, P.O. Box 3990, Columbus, OH 432183990, or emailed to semiconductordla.mil. Since contact information can change, you may want to verify the currency of this address information using the ASSIST Online database at https:/assist.dla.mil. Provided by IHSNot for
5、 ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-STD-750-2 w/CHANGE 4 iii SUMMARY OF CHANGE 4 MODIFICATIONS 1. Test method 2006 was revised to include default conditions. 2. Test method 2056 was revised to include examination and failure criteria requirements. Test Met
6、hod Paragraph Modification 2006 3 Changed 2006 4 Changed 2056 3.3 Changed 2056 3.4 Changed Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-STD-750-2 w/CHANGE 4 iv PARAGRAPH PAGE FOREWORD.ii SUMMARY OF CHANGE 4 MODIFICATIONS iii 1. SCOPE . 1 1.1 P
7、urpose . 1 1.2 Numbering system 1 1.2.1 Classification of tests . 1 1.2.2 Test method revisions . 1 1.3 Methods of reference 1 2. APPLICABLE DOCUMENTS 2 2.1 General . 2 2.2 Government documents 2 2.2.1 Specifications, standards, and handbooks 2 2.3 Non-Government publications . 2 2.4 Order of preced
8、ence . 3 3. DEFINITIONS . 4 3.1 Acronyms, symbols, and definitions 4 3.2 Acronyms used in this standard 4 4. GENERAL REQUIREMENTS . 4 4.1 General . 4 4.2 Test circuits . 5 4.3 Destructive tests 5 4.4 Nondestructive tests 6 4.5 Laboratory suitability . 6 5. DETAILED REQUIREMENTS . 6 6. NOTES 6 6.1 In
9、tended use . 6 6.2 International standardization agreement . 7 6.3 Subject term (key word) listing 7 6.4 Supersession data. 7 6.5 Change notations 7 CONCLUDING MATERIALC-1 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-STD-750-2 w/CHANGE 4 v CON
10、TENTS FIGURE TITLE 20171 Uniform force distribution 20172 Rotational capability 20173 Perpendicular force application 20174 Die shear strength criteria 20371 Minimum bond pull limits 20372 Wire loop angle 20373 Flat loop wire pull testing 20381 Sample apparatus fixture with force measuring gauge 203
11、82 Close up view of sample apparatus fixture 20383 Condition B 20384 Condition C 20385 Condition D 20521 Typical STU 20691 Bond dimensions 20692 Torn bonds 20693 Acceptable and unacceptable voids and excessive pigtails 20694 Acceptable and unacceptable bonding material build-up 20695 Extraneous bond
12、ing material build-up 20696 Acceptable and unacceptable excess material 20701 Metallization scratches and voids (expanded contact) 20702 Cracks and chips 20703 Bond dimensions 20704 Lifted or torn bonds 20705 Mesh geometry 20706 Interdigitated geometry 20707 Spine geometry 20711 Radial cracks extend
13、ing more than one-half the distance from pin to outer member 20712 Circumferential cracks 20713 Bubbles in glass exceeding one-third of the sealing area 20714 Single bubble or void 20715 Two bubbles in a line 20716 Interconnecting bubbles 20717 Meniscus cracks 20718 Chip outs 20719 Transparent glass
14、 diode 207110 Braze separation/delamination 207111 Crack in braze metallization 207112 Discontinuous braze metallization 207113 Ceramic feedthrough visual inspection criteria 207114 Rejectable foreign material conditions 20721 Metallization scratches, probe marks and voids 20722 Innermost guard band
15、 metallization scratches, probe marks and voids 20723 Active region metallization scratches, probe marks and voids 20724 Pad and contact metallization scratches, probe marks and voids 20725 Contact metallization scratches, probe marks and voids 20726 Metallization probing damage 20727 Metallization
16、bridging between two normally unconnected metallization areas 20728 Metallization bridging between two normally unconnected metallization paths 20729 Metallization misalignment, cross section view 207210 Metallization misalignment 207211 Passivation and diffusion faults 207212 Passivation and diffus
17、ion faults, cross section view Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-STD-750-2 w/CHANGE 4 vi CONTENTS FIGURE TITLE 207213 Passivation and diffusion faults 207214 Contact window in a diffused area which extends across a junction faults 2
18、07215 Die cracks and chips 207216 Bond dimensions 207217 Lift and torn bonds 207218 Ball bond diameter is less than 2 times or greater than 5 times the wire diameter 207219 Ball bonds where the wire exit is not completely within the periphery of the ball 207220 Ball bonds where exiting wire is not w
19、ithin boundaries of the bonding pad 207221 Intermetallic formation at the periphery of gold ball bond 207222 Wedge bonds on the die or package post criteria 207223 Tailless bond dimensions 207224 Wire bond to bonding pad area misalignment 207225 Wire bond tails contacting with metallization not cove
20、red by glassivation 207226 Wire bond tails limits 207227 Bonds on the flat surface of the post top 207228 A bond on top of another bond 207229 Bond to unglassivated die metallization 207230 Bond to glassivated die metallization 207231 Adjacent bonds violating separation limits 207232 Wire that viola
21、tes allowed limits 207233 Wire nicks, tears, bonds, cuts, crimps, scoring, or neckdown 207234 Bond tearing at interface of pad and wire 207235 Wire that has no arc or stress relief 207236 Wire not within 10 degrees of the perpendicular to the surface of the chip 207237 Excessive lead burn at lead po
22、st weld 207238 Pigtail to unglassivated active metal spacing 207239 Bow or loop in wire between double bonds at post 207240 Excessive loops, bows, or sags in wire 207241 Non-embedded foreign particles present on the surface of the die 207242 Glass-embedded foreign particles on the die that bridge pa
23、ths or junctions 207243 Ink on the surface of the die 207244 Balling of the die mounting material 207245 Tipped or tilted die 207246 Acceptable and unacceptable voids and excessive pigtails 207247 Acceptable and unacceptable bonding material buildup 207248 Extraneous bonding material buildup 207249
24、Acceptable and unacceptable excess material 207250 Unacceptable die placement 207251 Two or more adjacent active metallization paths not covered by glassivation 207252 Unglassivated areas at the edge of bonding pad that expose silicon 207253 Glassivation covering the design bonding pad area 20731 Bu
25、tton contact diodes 20732 High voltage planar diode I 20733 High voltage planar diodes II 20734 Inside moat mesa diodes 20735 Low voltage contact overlay diodes 20736 Low voltage planar diode 20737 Outside moat mesa diodes 20738 Schottky barrier diodes 20741 Die chip outs 20742 Die cracks Provided b
26、y IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-STD-750-2 w/CHANGE 4 vii CONTENTS FIGURE TITLE 2074A1 Glass cracks and chips 2074A2 Package deformities 2074A3 Solder protrusions 2074A4 Embedded whisker 2074A5 Whisker toe contact 2074A6 Whisker toe contact
27、on top surface of die 2074A7 Whisker heel contact 2074A8 Whisker point contact 2074A9 S bend whisker compressed height 2074A10 C bend whisker compressed height 2074A11 Die alignment 2074B1 Straight through internal construction 2074B2 Solder voids 2074B3 Solder bridge 2074B4 Solder voids 2074B5 Sold
28、er overflow 2074B6 Solder slivers and spikes 2074B7 Die-to-die solder connection 2074C1 Glass cracks 2074C2 High seal 2074C3 Insufficient seal 2074C4 Plug alignment 2074C5 Plug displacement 2074C6 Incomplete weld 2074D1 Chip outs 2074D2 Deformity 2074D3 Positioning 2074D4 Insufficient seal 2074D5 Ti
29、lt 2074D6 Die non-contract 2074D7 Plug offset 2074D8 Plug tilt angle 2074D9 Lead offset 2074D10 End-cap clearance 2074D11 End-cap tilt 2074D12 End-cap deformation 2074D13 End-cap rotation 2074D14 Mounting surface nicks and pits 2074E1 Whisker touches glass body wall 2074E2 Whisker loops touch one an
30、other 2074E3 Whisker angle over 10 degrees from normal 2074E4 Die touches glass package 2074G1 Solder protrusion 2074G2 Solder flow 2074G3 Element alignment 2074G4 Element tilt 2074G5 Die chip out 2074G6 Die cracks 2074H1 Offset die 2074H2 Tilted die 2074I1 Diamond base construction Provided by IHSN
31、ot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-STD-750-2 w/CHANGE 4 viii CONTENTS FIGURE TITLE 20761 Acceptable and unacceptable voids and excessive pigtails 20762 Lid seal voids and rejection criterion (drawing) 20763 Clearance in dual-in-line or flat pack typ
32、e device 20764 Clearance in round or box transistor type device 20765 Clearance in cylindrical axial lead type device 20766 Typical digital radiography view of a UB device 20771 Cross-sectional planes at various passivation steps 20772 Directional edge 20773 Viewing angle 20774 Wafer sampling proced
33、ures 20775 Concept of reduction of cross sectional area of metallization as accept/reject criteria 20776 Void near oxide step at 3,400X 20777 Voids at oxide step at 3,300X 20778 Tunnel/cave at oxide step at 10,000X 20779 Tunnel/cave at oxide step at 5,000X 207710 Separation of metallization at oxide
34、 step at base contact at 10,000X 207711 Separation of metallization at contact step at 7,000X 207712 Crack-like defect at oxide step at 20,000X 207713 Crack-like defect at oxide step at 7,000X 207714 Acceptable thinning at oxide step (multi-level-metal) at 7,200X 207715 Unacceptable thinning at oxid
35、e step (multi-level-metal) at 7,200X 207716 Steep oxide step (MOS) at 6,000X 207717 Steep oxide step (MOS) at 9,500X 207718 Peeling or lifting of general metallization in contact window area at 5,000X 207719 General metallization voids at 10,000X 207720 General metallization voids at 5,000X (reject)
36、 207721 Etch back/undercut type of notch at oxide step (multi-layered-metal) at 5,000X 207722 Barrier or adhesion layer etch back/undercut type of notch at oxide step at 5,000X 20781 Metallization scratches and voids 20782 Metallization scratches and voids Continued 20783 Passivation and diffusion f
37、aults 20784 Cracks and chips 20785 Cracks and chips (continued) 20786 Bond dimensions, wedge 20787 Bond dimensions, tailless or crescent 20788 Pigtail length 20789 Unacceptable wirebond neckdown 207810 Wire bond stress relief 207811 Wirebond to pad placement 207812 Extraneous bonding material build-
38、up 207813 Acceptable and unacceptable excess material 21001 Typical scan location on flat surface mounted devices 21002 Scan locations on can style package 21003 Scan locations on metal base flange mount style package 21004 Scan locations on glass, axial leaded package style 21005 Scan locations cer
39、amic, metal sealed, single in-line package 21006 Scan locations on metal electrode face (MELF) style package 21011 Axial lead or surface mount construction 21012 Axial lead or surface mount construction 21013 Stud package Provided by IHSNot for ResaleNo reproduction or networking permitted without l
40、icense from IHS-,-,-MIL-STD-750-2 w/CHANGE 4 ix CONTENTS TABLE TITLE I Destructive tests II Non-destructive tests 2031I Test conditions 2037I Minimum bond strength 2052I Package height vs. test frequency for 20 g acceleration (condition A) 2070I GaAs microwave device high magnification requirements
41、2070II Resistor criteria 2072I Die magnification requirements 2073I Magnification requirements 2077I Wafer sampling procedures 2077II Examination procedure for sample dice 2078I Die magnification requirements 2101I Mandatory procedures 2101II Die attach criteria TEST METHOD NO. TITLE 2005.2 Axial le
42、ad tensile test * 2006.2 Constant acceleration 2016.2 Shock 2017.3 Die attach integrity 2026.11 Solderability 2031.4 Resistance to soldering heat 2036.5 Terminal strength 2037.1 Bond strength (destructive bond pull test) 2038 Surface mount end cap bond integrity 2046.2 Vibration fatigue 2051.1 Vibra
43、tion noise 2052.5 Particle impact noise detection (PIND) test * 2056.2 Vibration, variable frequency 2057.3 Vibration, variable frequency (monitored) 2066 Physical dimensions 2068 External visual for nontransparent glassencased, double plug, noncavity axial leaded diodes 2069.2 Precap visual, power
44、MOSFETs 2070.2 Precap visual microwave discrete and multichip transistors 2071.7 Visual and mechanical examination 2072.7 Internal visual transistor (precap) inspection 2073.2 Visual inspection for die (semiconductor diode) 2074.6 Internal visual inspection (discrete semiconductor diodes) 2075.1 Dec
45、ap internal visual design verification 2076.4 Radiography 2077.4 Scanning electron microscope inspection of metallization 2078 Internal visual for wire bonded diodes/rectifiers 2081 Forward instability, shock (FIST) 2082 Backward instability, vibration (BIST) 2100 Xray fluorescence (XRF) scan locati
46、ons for discrete semiconductor Tin Lead content analysis 2101.3 Destructive physical analysis for diodes 2102.1 Destructive physical analysis for wire bonded devices 2103 Design verification for surface mount devices Provided by IHSNot for ResaleNo reproduction or networking permitted without licens
47、e from IHS-,-,-MIL-STD-750-2 w/CHANGE 4 x This page is intentionally left blank. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-STD-750-2 w/CHANGE 4 1 1. SCOPE 1.1 Purpose. Part 2 of this test method standard establishes uniform test methods for the mechanical testing to determine resistance to deleterious effects of natural elements and conditions surrounding military operations. For the purpose of this standard, the term “devices“ includes such items as transistors, diodes, voltage regulators, rectifiers, tunnel diodes, and other re
