1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Make a correction to the maximum input clock frequency test, move the 1.5 GHz limit from the minimum column to the maximum column as specified under Table IA. Make corrections to paragraphs 4.2.1a(1) and 4.4.2.1a. - ro 08-04-02 R. HEBER B Add VIN
2、+ and VIN- limits to paragraph 1.3. Make changes to VIN+ and VIN- limits as specified under paragraph 1.4. Make changes to VILand VIHtests as specified under Table IA. - ro 09-06-23 C. SAFFLE REV SHET REV B B B B B SHEET 15 16 17 18 19 REV STATUS REV B B B B B B B B B B B B B B OF SHEETS SHEET 1 2 3
3、 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Dan Wonnell DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY Rajesh Pithadia APPROVE
4、D BY Robert M. Heber MICROCIRCUIT, DIGITAL-LINEAR, A/D CONVERTER, DUAL 8-BIT 1.5 GSPS, SINGLE 8-BIT 3.0 GSPS, MONOLITHIC SILICON DRAWING APPROVAL DATE 08-01-09 AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-07214 SHEET 1 OF 19 DSCC FORM 2233 APR 97 5962-E349-09 Provided by IHSNot for ResaleNo
5、 reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-07214 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels con
6、sisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the
7、PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 F 07214 01 V Z C Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device class
8、es Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA d
9、evice. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 ADC08D1520 Dual 8-bit, 1.5 GSPS A/D converter; single 8-bit, 3.0 GSPS A/D converter 1.2.3 Device class designator. The device class designator is a single letter i
10、dentifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-
11、PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style Z See figure 1 128 Gullwing lead chip carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q
12、and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-07214 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 AP
13、R 97 1.3 Absolute maximum ratings. 1/ Supply voltage (VA, VDR) 2.2 V Supply difference (VDR VA) 0 V to 100 mV Voltage on any input pin -0.15 V to (VA+ 0.15 V) Voltage on VIN+, VIN- (maintaining common mode) -0.15 V to 2.5 V Ground difference (|GND DR GND|) 0 V to 100 mV Input current at any pin . 25
14、 mA Package input current . 50 mA Junction temperature (TJ) . +175C Storage temperature range -65C to +175C Thermal resistance, junction-to-ambient (JA) 11.5C/W Thermal resistance, junction-to-case (JC) . 3.8C/W Thermal pad resistance (J-PAD) 2.0C/W 1.4 Recommended operating conditions. Ambient oper
15、ating temperature range (TA) . -55C to +125C Supply voltage (VA) . +1.8 V to +2.0 V VA/2 tolerance for supply 1.9 V . 650 mV VA/ 2 1.2 V Driver supply voltage (VDR) +1.8 V to VAAnalog input common mode voltage . VCMO50 mV VIN+, VIN- voltage range (maintaining common mode) : 100% duty cycle . 0 V to
16、2.15 V 10% duty cycle 0 V to 2.5 V Ground difference (|GND DR GND|) 0 V CLK pins voltage range . 0 V to VADifferential CLK amplitude 0.4 Vp-p to 2.0 Vp-p 1.5 Radiation features. Maximum total dose available (dose rate = 50 300 rads(Si)/s) 300 krads(Si) Single event latch-up (SEL) 120 MeV-cm2/mg 2/ 2
17、. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract.
18、DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. _ 1/ Stresses above the absolute
19、maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Limits are based on characterization, but not production tested unless specified on the purchase order or contract. Provided by IHSNot for ResaleNo rep
20、roduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-07214 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings
21、. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a confli
22、ct between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requ
23、irements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirem
24、ents for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device c
25、lasses Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline. The case outline shall be in accordance with 1.2.4 herein and figure 1. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2. 3.2.3 Block diagram. The block diagram shall
26、be as specified on figure 3. 3.2.4 Radiation exposure circuit. The radiation exposure circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing and acquiring activity upon request. 3.3 Electrical performance characteristics and
27、 postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table IA and shall apply over the full ambient operating temperature range. 3.4 Electrical test requirements. The electrical test
28、requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN n
29、umber is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device clas
30、s M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6
31、Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer i
32、n order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirement
33、s of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided wit
34、h each lot of microcircuits delivered to this drawing. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-07214 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 AP
35、R 97 TABLE IA. Electrical performance characteristics. Test Symbol Conditions 1/, 2/ -55C TA+125C unless otherwise specified Group A subgroups Device type Limits Unit Min MaxSTATIC CONVERTER CHARACTERISTICS Integral Non-linearity INL DC coupled, 1 MHz sine wave overanged 1, 2, 3 01 0.9 LSB Different
36、ial Non-linearity DNL DC coupled, 1 MHz sine wave overanged 1, 2, 3 01 0.6 LSB Resolution with no missing codes RES 1, 2, 3 01 8 Bits Offset error VOFF1, 2, 3 01 -1.5 +1.5 LSB Positive full-scale error PFSE 3/ 1, 2,3 01 25 mV Negative full-scale error NFSE 3/ 1, 2,3 01 25 mV ANALOG INPUT AND REFEREN
37、CE CHARACTERISTICS Full-scale analog differential input range VINFSR pin 14 low 1, 2, 3 01 530 650 mVp-p FSR pin 14 high 840 960 Differential input resistance RIN1, 2, 3 01 94 106 ANALOG OUTPUT CHARACTERISTICS Bandgap reference output voltage VBGIBG= 100 A 1, 2, 3 01 1.20 1.33 V CLOCK INPUT CHARACTE
38、RISTICS Differential clock input level VIDSine wave clock 1, 2, 3 01 0.5 2.0 Vp-p Square wave clock 0.5 2.0 DIGITAL CONTROL PIN CHARACTERISTICS Logic high input voltage VIHOutV, DCLK_RST, PD, PDQ CAL 1, 2, 3 01 0.67 x VAV OutEdge, FSR, DES/ SCS 0.77 x VALogic low input voltage VILOutV, DCLK_RST, PD,
39、 PDQ CAL 1, 2, 3 01 0.33 x VAV OutEdge, FSR 0.23 x VADES/ SCS M,D,P,L,R 1 0.23 x VADES/ SCS F only 1 0.15 x VASee footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-07214 DEFENSE SUPPL
40、Y CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE IA. Electrical performance characteristics - continued. Test Symbol Conditions 1/, 2/ -55C TA+125C unless otherwise specified Group A subgroups Device type Limits Unit Min MaxDIGITAL OUTPUT CHARACTERISTI
41、CS LVDS differential output voltage VODMeasured differentially, 4/ OutV = VA, VBG= floating 1, 2, 3 01 580 920 mVp-p Measured differentially, 4/, VBG= floating, OutV = GND 380 720 POWER SUPPLY CHARACTERISTICS Analog supply current IA1:2 demux output PD = PDQ = low 1, 2, 3 01 875 mA PD = low, PDQ = h
42、igh 615 Output driver supply current IDR1:2 demux output PD = PDQ = low 1, 2, 3 01 290 mA PD = low, PDQ = high 170 Power consumption PD1:2 demux output PD = PDQ = low 1, 2, 3 01 2.2 W PD = low, PDQ = high 1.49 NORMAL MODE (Non DES) DYNAMIC CONVERTER CHARACTERISTICS Effective number of bits ENOB fIN=
43、 373 MHz, VIN= FSR 0.5 dB 4, 5, 6 01 7 Bits Signal-to-noise plus distortion ratio SINAD fIN= 373 MHz, VIN= FSR 0.5 dB 4, 5, 6 01 43.9 dB Signal-to-noise ratio SNR fIN= 373 MHz, VIN= FSR 0.5 dB 4, 5, 6 01 43.9 dB Total harmonic distortion THD fIN= 373 MHz, VIN= FSR 0.5 dB 4, 5, 6 01 -47.5 dB Spurious
44、-free dynamic range SFDR fIN= 373 MHz, VIN= FSR 0.5 dB 4, 5, 6 01 47.5 dB Out of range output code (VIN+) (VIN-) + full-scale 4, 5, 6 01 255 (VIN+) (VIN-) - full-scale 0 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-S
45、TANDARD MICROCIRCUIT DRAWING SIZE A 5962-07214 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 TABLE IA. Electrical performance characteristics - continued. Test Symbol Conditions 1/, 2/ -55C TA+125C unless otherwise specified Group A subgroups
46、 Device type Limits Unit Min MaxINTERLEAVE MODE (DES pin 127 = VA/ 2) DYNAMIC CONVERTER CHARACTERISTICS. Effective number of bits ENOB fIN= 373 MHz, VIN= FSR 0.5 dB 4, 5, 6 01 6.6 Bits Signal-to-noise plus distortion ratio SINAD fIN= 373 MHz, VIN= FSR 0.5 dB 4, 5, 6 01 41.5 dB Signal-to-noise ratio
47、SNR fIN= 373 MHz, VIN= FSR 0.5 dB 4, 5, 6 01 41.5 dB Total harmonic distortion THD fIN= 373 MHz, VIN= FSR 0.5 dB 4, 5, 6 01 -45.2 dB Spurious-free dynamic range SFDR fIN= 373 MHz, VIN= FSR 0.5 dB 4, 5, 6 01 44.1 dB AC TIMING CHARACTERISTICS Maximum input clock frequency fCLK(MAX)Normal mode (non DES
48、) or DES mode in 1:2 output demux 9, 10, 11 01 1.5 GHz Normal mode (non DES) or DES mode in non-demux outout 1.0 DCLK duty cycle 9, 10, 11 01 45 55 % Pulse width DCLK_RST tPWR9, 10, 11 01 4 CLK cycles (min) CAL pin low time tCAL-LSee figure 5 9, 10, 11 01 1280 CLK cycles CAL pin high time tCAL-HSee figure 5 9, 10, 11 01 1280 CLK cycles 1/ The following specifications apply after calibration for VA= VDR= +1.9
