1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Updated drawing paragraphs. -sld 11-07-21 Charles F. Saffle B Sheet 17; added the “ FIGURE 4. Read cycle timing diagram.“ under the first timing diagram. -sld 12-05-01 Charles F. Saffle REV SHEET REV B B B B B B B B SHEET 15 16 17 18 19 20 21 22
2、REV STATUS REV B B B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Steve Duncan DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING CHECKED BY Greg Cecil THIS DRAWING IS AVAILABLE FOR USE BY ALL
3、 DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE APPROVED BY Robert M. Heber MICROCIRCUIT, MEMORY, DIGITAL, 3.3 VOLT BOOT BLOCK FLASH EPROM, 2M X 32-BIT, MONOLITHIC SILICON DRAWING APPROVAL DATE 08-10-02 AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-08245 SHEET 1 OF 22 DSCC FORM 2233 A
4、PR 97 5962-E332-12 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-08245 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documen
5、ts five product assurance classes as defined in paragraph 1.2.3 and MIL-PRF-38534. A choice of case outlines and lead finishes which are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of radiation hardness assurance levels are reflected in the PIN. 1.2
6、PIN. The PIN shall be as shown in the following example: 5962 - 08245 01 H X X Federal RHA Device Device Case Lead stock class designator type class outline finish designator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 Radiation hardness assurance
7、(RHA) designator. RHA marked devices shall meet the MIL-PRF-38534 specified RHA levels and shall be marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit
8、 function Access time 01 AS8FLC2M32BQT-120/Q FLASH EPROM, 2M x 32-bit 120 ns 02 AS8FLC2M32BQT-100/Q FLASH EPROM, 2M x 32-bit 100 ns 03 AS8FLC2M32BQT-90/Q FLASH EPROM, 2M x 32-bit 90 ns 04 AS8FLC2M32BQT-70/Q FLASH EPROM, 2M x 32-bit 70 ns 1.2.3 Device class designator. This device class designator sh
9、all be a single letter identifying the product assurance level. All levels are defined by the requirements of MIL-PRF-38534 and require QML Certification as well as qualification (Class H, K, and E) or QML Listing (Class G and D). The product assurance levels are as follows: Device class Device perf
10、ormance documentation K Highest reliability class available. This level is intended for use in space applications. H Standard military quality class level. This level is intended for use in applications where non-space high reliability devices are required. G Reduced testing version of the standard
11、military quality class. This level uses the Class H screening and In-Process Inspections with a possible limited temperature range, manufacturer specified incoming flow, and the manufacturer guarantees (but may not test) periodic and conformance inspections (Group A, B, C and D). E Designates device
12、s which are based upon one of the other classes (K, H, or G) with exception(s) taken to the requirements of that class. These exception(s) must be specified in the device acquisition document; therefore the acquisition document should be reviewed to ensure that the exception(s) taken will not advers
13、ely affect system performance. D Manufacturer specified quality class. Quality level is defined by the manufacturers internal, QML certified flow. This product may have a limited temperature range. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STAN
14、DARD MICROCIRCUIT DRAWING SIZE A 5962-08245 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X See
15、figure 1 68 Ceramic quad flatpack, lead formed Y See figure 1 66 Pin-Grid-Array (66 HIP) 1.2.5 Lead finish. The lead finish shall be as specified in MIL-PRF-38534. 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) 2/ -0.5 V dc to +4.0 V dc Signal voltage range (any pin except A9) 2/ -0.5 V
16、 dc to VCC+0.5 V dc Power dissipation (PD) . 0.33 W maximum at 5 MHz Storage temperature range . -65 C to +150 C Lead temperature (soldering, 10 seconds) +300 C Data retention 10 years minimum Endurance (write/erase cycles) . 100,000 cycles minimum RESET , OE , and A9 voltage for auto select and sec
17、tor protect (VID): -0.5 V dc to +12.5 V dc 3/ 1.4 Recommended operating conditions. Supply voltage range (VCC) . +3.0 V dc to +3.6 V dc Input low voltage range (VIL) . -0.5 V dc to +0.8 V dc Input high voltage range (VIH) +2.2 V dc to VCC+ 0.3 V dc Case operating temperature range (TC) -55 C to +125
18、 C RESET , OE , and A9 voltage for auto select and sector protect (VID), (VCC= +3.3 V): . +11.5 V dc to +12.5 V dc 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified
19、 herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATIONS MIL-PRF-38534 - Hybrid Microcircuits, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits.
20、MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. 1/ Stresses above the absolute maximum ratings may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Minimum DC voltage in input or I/O pins is -0.5 V
21、 dc. During voltage transitions, inputs may overshoot VSSto -2.0 V dc for periods up to 20 ns. Maximum DC voltage on output and I/O pins VCC+0.5 V dc. During voltage transitions, outputs may overshoot to VCC+2.0 V dc for periods up to 20 ns. 3/ Minimum DC input voltage on RESET , OE , and A9 is -0.5
22、 V dc. During voltage transitions, RESET , OE , and A9 may overshoot VSSto -2.0 V dc for periods up to 20 ns. Maximum DC input voltage on A9 is +13.5 V which may overshoot to +14.0 V dc for periods up to 20 ns. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from
23、 IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-08245 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of the
24、se documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited h
25、erein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item performance requirements for device classes D, E, G, H, and K shal
26、l be in accordance with MIL-PRF-38534. Compliance with MIL-PRF-38534 shall include the performance of all tests herein or as designated in the device manufacturers Quality Management (QM) plan or as designated for the applicable device class. The manufacturer may eliminate, modify or optimize the te
27、sts and inspections herein, however the performance requirements as defined in MIL-PRF-38534 shall be met for the applicable device class. In addition, the modification in the QM plan shall not affect the form, fit, or function of the device for the applicable device class. 3.2 Design, construction,
28、 and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38534 and herein. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein and figure 1. 3.2.2 Terminal connections. The terminal connections shall be as specified
29、on figure 2. 3.2.3 Truth table(s). The truth table(s) shall be as specified on figure 3. 3.2.4 Timing diagrams. The timing diagram(s) shall be specified on figures 4, 5, and 6. 3.2.5 Block diagram. The block diagram shall be as specified on figure 7. 3.2.6 Output load circuit. The output load circui
30、t shall be as specified on figure 8. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full specified operating temperature range. 3.4 Electrical test requirements. The electr
31、ical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Programming procedure. The programming procedure shall be as specified by the manufacturer and shall be available upon request. 3.6 Marking of device(s). Marking of
32、 device(s) shall be in accordance with MIL-PRF-38534. The device shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers vendor similar PIN may also be marked. 3.7 Data. In addition to the general performance requirements of MIL-PRF-38534, the manufacturer of the device des
33、cribed herein shall maintain the electrical test data (variables format) from the initial quality conformance inspection group A lot sample, for each device type listed herein. Also, the data should include a summary of all parameters manually tested, and for those which, if any, are guaranteed. Thi
34、s data shall be maintained under document revision level control by the manufacturer and be made available to the preparing activity (DLA Land and Maritime -VA) upon request. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWI
35、NG SIZE A 5962-08245 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 3.8 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to supply to this drawing. The certificate of compliance (original copy) submi
36、tted to DLA Land and Maritime -VA shall affirm that the manufacturers product meets the performance requirements of MIL-PRF-38534 and herein. 3.9 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38534 shall be provided with each lot of microcircuits delivered to this d
37、rawing. 3.10 Endurance. A reprogrammability test shall be completed as part of the vendors reliability monitors. This reprogrammability test shall be done for the intial characterization and after any design process changes which may affect the reprogrammability of the device. The methods and proced
38、ures may be vendor specific, but shall guarantee the number of program/erase cycles listed in section 1.3 herein over the full military temperature range as specified herein. The vendors procedure shall be kept under document control and shall be made available upon request of the acquiring or prepa
39、ring activity. 3.11 Data retention. A data retention stress test shall be completed as part of the vendors reliabilty monitors. This test shall be done for the intial characterization and after any design or process change which may affect data retention. The methods and procedures may be vendor spe
40、cific, but shall gurantee the number of years listed in section 1.3 herein over the full military temperature range as specified herein. The vendors procedure shall be kept under document control and shall be made available upon request of the acquiring or preparing activity. Provided by IHSNot for
41、ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-08245 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ 2/ -55
42、C TC+125 C unless otherwise specified Group A subgroups Device types Limits Unit Min Max DC parameters Input leakage current ILIVCC= 3.6 V dc, VIN= GND to VCC 1,2,3 All 5 mA Output leakage current ILOVCC= 3.6 V dc, VIN= GND to VCC1,2,3 All 5 mA VCCactive current for read ICC1 CS = VIL, OE = VIH, f =
43、 8 MHz, VCC = 3.6 V dc 1,2,3 All 70 mA CS = VIL, OE = VIH, f = 14 MHz, VCC = 3.6 V dc 120 mA VCCactive current for Program or erase 3/ ICC2 CS = VIL, OE = VIH, VCC = 3.6 V dc 1,2,3 All 140 mA VCC standby current ICC3 VCC = 3.6 V dc, CS = VIH, f = 5 MHz, RESET = VCC 0.3 V 1,2,3 All 0.25 mA Input low
44、level 3/ VIL1,2,3 All -0.5 0.8 V Input high level 3/ VIH1,2,3 All 2.2 VCC+ 0.3 V V Output low voltage VOLVCC = 4.5 V dc, IOL= 12.0 mA 1,2,3 All 0.45 V Output high voltage VOHVCC = 4.5 V dc, IOH= -2.0 mA 1,2,3 All 2.4 V Low VCC, lockout voltage VLKO1,2,3 All 2.3 2.5 V Dynamic characteristics Address
45、capacitance 3/ CADVIN= 0 V dc, f = 1.0 MHz, TA= +25 C 4 All 40 pF Output enable 3/ Capacitance COEVIN= 0 V dc, f = 1.0 MHz, TA= +25 C 4 All 40 pF See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRA
46、WING SIZE A 5962-08245 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions 1/ 2/ -55 C TC+125 C unless otherwise specified Group A subgroups Device types Limits Unit Min Max
47、 Dynamic characterisitics - continued Write enable 3/ Capacitance CWEVIN= 0 V dc, f = 1.0 MHz, TA= +25 C 4 All 15 pF Chip select capacitance 3/ CCSVIN= 0 V dc, f = 1.0 MHz, TA= +25 C 4 All 15 pF Data I/O capacitance 3/ CI/OVIN= 0 V dc, f = 1.0 MHz, TA= +25 C 4 All 15 pF Functional testing Functional
48、 tests See 4.3.1c 7,8A,8B All Read cycle AC timing characteristics Read cycle time 3/ tRCSee figure 4 9,10,11 01 02 03 04 120 100 90 70 ns Address access time tACCSee figure 4 9,10,11 01 02 03 04 120 100 90 70 ns Chip select access time tCESee figure 4 9,10,11 01 02 03 04 120 100 90 70 ns Output enable to output valid tOESee figure 4 9,10,11 01 02 03 04 40 35 35 30 ns Output hold from address, CS or OE change, 3/ Whichever is first tOHSee figure 4 9,10,11 All 0 ns
