1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED REV SHEET REV SHEET 15 REV STATUS REV OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY JEFFERY TUNSTALL DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWIN
2、G IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY RAJESH PITHADIA APPROVED BY CHARLES SAFFLE MICROCIRCUIT, DIGITAL-LINEAR, 2x2 LVDS CROSSPOINT SWITCH, MONOLITHIC SILICON DRAWING APPROVAL DATE 12-07-30 AMSC N/A REVISION LEVEL SIZE A CAGE CODE 67268 5962-11
3、242 SHEET 1 OF 15 DSCC FORM 2233 APR 97 5962-E361-12 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-11242 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE
4、 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance
5、 (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 11242 01 V F A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2) Device class designator Case outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing numbe
6、r 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type. The device type identify the circuit function as follows: Device type Generic nu
7、mber Circuit function 01 SN55LVCP22-SP 2x2 LVDS crosspoint switch 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation Q or V Certification and qualification to MIL-PRF-38535 1
8、.2.4 Case outline. The case outline are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style F GDFP2-F16 16 Flat pack 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A. Pr
9、ovided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-11242 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ Supply voltage range, VCC . -
10、0.5 V to 4 V 2/ CMOS/TTL input voltage (ENO, EN1, SEL0, SEL1) . -0.5 V to 4 V LVDS receiver input voltage (IN+, IN-) . -0.7 V to 4.3 V LVDS driver output voltage (OUT+, OUT-) -0.5 V to 4.0 V LVDS output short circuit current Continuous Storage temperature range . -65C to 125C Junction temperature +1
11、50C Power dissipation (PD) 313 mW 3/ Thermal resistance, junction-to-ambient (JA) 82.5 C/W Thermal resistance, junction-to-case (JC) 7.5 C/W Maximum lead temperature (soldering 10 seconds) 300C Electrostatic discharge (ESD) classification: Human body model (HBM) 5000 V Charged-device mode (CDM) 500V
12、 1.4 Recommended operating conditions. Supply voltage, VCC 3 V to 3.6 V Receiver input voltage . 0 V to 4 V Operating case Temperature, range (TC) -55C to +125C Magnitude of differential input voltageVID 0.1 V to 3V 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The
13、following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufactur
14、ing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Micro
15、circuit Drawings. (Copies of these documents are available online at https:/assist.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and
16、 the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended ope
17、ration at the maximum levels may degrade performance and affect reliability. 2/ All voltage values, except differential I/O bus voltages, are with respect to network ground terminals. 3/ Test conditions: VCC= 3.6 V, TA=125C, 1Gbps. Provided by IHSNot for ResaleNo reproduction or networking permitted
18、 without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-11242 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MI
19、L-PRF-38535 as specified herein, or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensi
20、ons shall be as specified in MIL-PRF-38535 and herein for device classes Q and V. 3.2.1 Case outline. The case outline shall be in accordance with 1.2.4 herein. 3.2.2 Terminal Connections. The terminal connections shall be as specified on figure 1. 3.2.3 Function table. The function table shall be a
21、s specified on figure 2. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table IA and shall apply over the full ambient operating te
22、mperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical tests for each subgroup are defined in table IA. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers P
23、IN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q
24、 and V shall be in accordance with MIL-PRF-38535. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from
25、 a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for dev
26、ice classes Q and V, the requirements of MIL-PRF-38535 and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 shall be provided with each lot of microcircuits delivered to this drawing. Provided by IHSNot for ResaleNo reproduc
27、tion or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-11242 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL SHEET 5 DSCC FORM 2234 APR 97 TABLE IA. Electrical performance characteristics. Test Symbol Conditions -55C TC +125C Group A subgro
28、ups Device type Limits Unit unless otherwise specified Min Max CMOS/TTL DC SPECIFICATION (EN0, EN1, SEL0, SEL1) High-level input voltage VIH1, 2, 3 01 2 VCCV Low-level input voltage VIL1, 2, 3 01 GND 0.8 V High-level input current IIHVIN= 3.6 V or 2.0 V, VCC= 3.6 V 1, 2, 3 01 25 A Low-level input cu
29、urent IILVIN= 0.0 V or 0.8 V, VCC= 3.6 V 1, 2, 3 01 15 A Input clamp voltage VCLICL= -18mA 1, 2, 3 01 -1.5 V LVDS OUTPUT SPECIFICATION (OUT0, OUT1) Differential output voltage VOD RL= 75 , See figure 3 1, 2, 3 01 255 475 mV RL= 75 , VCC= 3.3 V, TA= 25C, See figure 3 1 01 285 440 Change in differenti
30、al output voltage magnitude between states VOD VID= 100mV, See figure 3 1, 2, 3 01 -25 25 mV Steady-state offset voltage VOSSee Figure 4 1, 2, 3 01 1 1.45 V Change in steady-state offset voltage between logic states VOSSee Figure 4 1, 2, 3 01 -25 25 mV High-impedance output current IOZVOUT= GND or V
31、CC1, 2, 3 01 15 A Power-off leakage current IOFFVCC= 0 V, 1.5 V; VOUT= 3.6 V or GND 1, 2, 3 01 15 A Output short-circuit current IOSVOUT+ or VOUT- = 0 V 1, 2, 3 01 -8 mA Both outputs short-circuit current IOSBVOUT+ and VOUT- = 0 V 1, 2, 3 01 -8 8 mA See footnotes at end of table. Provided by IHSNot
32、for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-11242 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL SHEET 6 DSCC FORM 2234 APR 97 TABLE IA. Electrical performance characteristics - Continued. Test Symbol Condit
33、ions -55C TC +125C Group A subgroups Device type Limits Unit unless otherwise specified Min Max LVDS RECIEVER DC SPECIFICATION (IN0, IN1) Positive-going differential input voltage threshold VTHSee table IB 1, 2, 3 01 100 mV Negative-going differential input voltage threshold VTLSee table IB 1, 2, 3
34、01 -100 mV Differential input voltage hysteresis VID(HYS) 1, 2, 3 150 mV Common-mode voltage range VCMRVID= 100mV, VCC= 3.0 V to 3.6 V 1,2,3 01 .05 3.95 V Input current IINVIN= 4 V, VCC= 3.6 V or 0.0 V 1, 2, 3 01 18 A VIN= 0 V, VCC= 3.6 V or 0.0 V 1, 2, 3 01 18 SUPPLY CURRENT Quiescent supply curren
35、t ICCQRL= 75, ENO = EN1 = High 1, 2, 3 01 87 mA Total supply current ICCDRL= 75, CL= 5 pF, 500 MHz(1000 Mbps), EN0 = EN1 = High 1, 2, 3 01 87 mA Three state supply current ICCZEN0 = EN1 = Low 1, 2, 3 01 35 mA Functional test See 4.4.1b 7,8 01 SWITCHING CHARACTERISTICS Input to SEL setup time tSETSee
36、 figure 5 9, 10, 11 2.2 ns Input to SEL hold time tHOLDSee figure 5 9, 10, 11 01 2.2 ns SEL to switched output tSWITCHSee figure 5 9, 10, 11 01 2.6 ns Disable time, high-level-to-high-impedance tPHZSee figure 6 9, 10, 11 01 4 ns Disable time, low-level-to-high-impedance tPLZSee figure 6 9, 10, 11 01
37、 4 ns Enable time, high-impedance-to-high-level output tPZHSee Figure 6 9, 10, 11 01 4 ns Enable time, high-impedance-to-low-level output tPZLSee Figure 6 9, 10, 11 01 8 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-
38、,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-11242 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL SHEET 7 DSCC FORM 2234 APR 97 TABLE IA. Electrical performance characteristics - Continued. Test Symbol Conditions -55C TC +125C Group A subgroups Device type Limits Unit unless otherwise
39、 specified Min Max SWITCHING CHARACTERISTICS Continued. Differential output signal rise time (20%-80%) 1/ tLHTCL= 5 pF, see Figure 7 9, 10, 11 01 620 ps Differential output signal fall time (20%-80%) 1/ tHLTCL= 5 pF, See Figure 7 9, 10, 11 01 620 ps Propagation delay time, low-to-high level output 1
40、/ tPLHD9, 10, 11 01 200 2350 ps Propagation delay time, high-to-low-level output 1/ tPHLD9, 10, 11 01 200 2350 ps Pulse skew (tPLHD-tPHLD) 2/ 3/ tskewCL= 5 pF, See Figure 7 9, 10, 11 01 160 ps Maximum operating frequency 2/ 4/ fMAX4, 5, 6 01 1 GHz 1/ Input: VIC= 1.2 V, VID= 200 mV, 50% duty cycle, 1
41、 MHz, tr/tf= 500 ps. 2/ Pulse skew and fMAX parameters are guaranteed by characterization, but not production tested. 3/ tskewis the magnitude of the time difference between the tPLHDand tPHLDof any output of a single device. 4/ Signal generator conditions: 50% duty cycle, tror tf 100 ps (10% to 90%
42、), transmitter output criteria: Duty cycle = 45% to 55% VOD 300 mV. Table IB. Reciever Input voltage threshold Test. Applied Voltages Resulting differential Input Voltage Resulting Common-Mode input Voltage Output 1/ VIAVIBVIDVIC1.25 V 1.15 V 100mA 1.2 V H 1.15 V 1.25 -100mV 1.2 V L 4.0 V 3.9 V 100
43、mV 3.95 V H 3.9 V 4.0 V -100 mA 3.95 V L 0.1 V 0.0 V 100 mV 0.05 V H 0.0 V 0.1 V -100 mA 0.05 L 1.7 V 0.7 V 1000 mV 1.2 V H 0.7 V 1.7 V -1000 mV 1.2 V L 4.0 V 3.0 V 1000 mV 3.5 V H 3.0 V 4.0 V -1000 mV 3.5 V L 1.0 V 0.0 V 1000 mV 0.5 V H 0.0 V 1.0 V -1000 mV 0.5 V L 1/ H = High level, L = low level.
44、 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-11242 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL SHEET 8 DSCC FORM 2234 APR 97 Device type 01 Case outline F Terminal number Terminal symbo
45、l 1 SEL1 2 SEL0 3 IN0+ 4 IN0- 5 VCC 6 IN1+ 7 IN1- 8 NC 9 NC 10 OUT1- 11 OUT1+ 12 GND 13 OUT0- 14 OUT0+ 15 EN1 16 EN0 NC = No internal connection FIGURE 1. Terminal connection. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAW
46、ING SIZE A 5962-11242 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL SHEET 9 DSCC FORM 2234 APR 97 SEL0 SEL1 OUT0 OUT1 Mode 0 0 IN0 IN0 1:2 splitter 0 1 IN0 IN1 Repeater 1 0 IN1 IN0 Switch 1 1 IN1 IN1 1:2 splitter FIGURE 2. Function table. Figure 3. Differential output voltage (VOD)
47、test circuit. Note: All input pulses are supplied by a generator having the following characteristics tror tf 1 ns, Pulse-repetition rate (PRR) = 0.5 Mbps, pulse width = 500 10 ns; RL= 100 ; CLincludes instrumentation and fixture capacitance within 0.06 mm of the D.U.T.; the measurement of VOC(PP) is made on test equipment with a -3 db bandwidth of at least 300 MHz. Figure 4. Test circuit and definition f
