1、 REV ISIONS LTR DESCRIPTION DATE (YR-MO-DA ) A PPROV ED REV SHEET REV SHEET 15 16 17 REV STATUS REV OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Steve L. Duncan DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil/ STANDARD MICROCIRCUIT DRAWING T
2、HIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY Charles F. Saffle APPROVED BY Charles F. Saffle MICROCIRCUIT, CMOS, ANALOG TO DIGITAL CONVERTER, 14-BIT, 16 CHANNEL MULTIPLEXED, MONOLITHIC SILICON DRAWING APPROVAL DATE 13-12-19 AMSC N/A REVISIO
3、N LEVEL SIZE A CA GE CODE 67268 5962-12203 SHEET 1 OF 17 DSCC FORM 2233 A PR 97 5962-E450-13 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-12203 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REV ISION LEV
4、 EL SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents five product assurance classes as defined in paragraph 1.2.3 and MIL-PRF-38534. A choice of case outlines and lead finishes which are available and are reflected in the Part or Identifying Number (PIN). When available, a ch
5、oice of radiation hardness assurance levels is reflected in the PIN. 1.2 PIN. The PIN shall be as shown in the following example: 5962 - 12203 01 K X C Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2) Device class designator Case outline (see 1.2.4) Lead finish (see
6、1.2.5) / (see 1.2.3) / Drawing number 1.2.1 Radiation hardness assurance (RHA) designator. RHA marked devices shall meet the MIL-PRF-38534 specified RHA levels and shall be marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) ide
7、ntify the circuit function as follows: Device type Generic number Circuit function 01 RHD5950 A/D converter, 14-bit, 16 channel multiplexed 1.2.3 Device class designator. This device class designator shall be a single letter identifying the product assurance level. All levels are defined by the requ
8、irements of MIL-PRF-38534 and require QML Certification as well as qualification (Class H, K, and E) or QML Listing (Class G and D). The product assurance levels are as follows: Device class Device performance documentation K Highest reliability class available. This level is intended for use in spa
9、ce applications. H Standard military quality class level. This level is intended for use in applications where non-space high reliability devices are required. G Reduced testing version of the standard military quality class. This level uses the Class H screening and In-Process Inspections with a po
10、ssible limited temperature range, manufacturer specified incoming flow, and the manufacturer guarantees (but may not test) periodic and conformance inspections (Group A, B, C and D). E Designates devices which are based upon one of the other classes (K, H, or G) with exception(s) taken to the requir
11、ements of that class. These exception(s) must be specified in the device acquisition document; therefore the acquisition document should be reviewed to ensure that the exception(s) taken will not adversely affect system performance. D Manufacturer specified quality class. Quality level is defined by
12、 the manufacturers internal, QML certified flow. This product may have a limited temperature range. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-12203 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REV IS
13、ION LEV EL SHEET 3 DSCC FORM 2234 APR 97 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X See figure 1 48 Ceramic quad flat pack 1.2.5 Lead finish. The lead finish shall be as specified in MIL
14、-PRF-38534. 1.3 Absolute maximum ratings. 1/ Supply voltages . +6.0 V dc Clock frequency . 1.5 MHz Input voltage (PREF, NREF) . VCC + 0.4 V, GND - 0.4 V Thermal resistance, junction-to-case (JC) +3.5C/W Storage temperature range . -65C to +150C Lead temperature (soldering, 10 seconds) +300C Junction
15、 temperature (TJ) +150C Power dissipation (PD) . 100 mW Case operating temperature range (TC) -55C to +125C 1.4 Recommended operating conditions. Analog power supply voltage (AVCC) +5.0 V Digital power supply voltage (DVCC) +5.0 V Digital output high reference level range (DRVP) +3.3 V to +5.0 V Dig
16、ital output low reference level (DRVN) 0 V High analog reference voltage (PREF) . +4.5 V Low analog reference voltage (NREF) +0.5 V 1.5 Radiation features. Maxim um Total Ionizing Dose (TID). (dose rate = 50 - 300 rad(Si)/s): In accordance with MIL-STD-883, method 1019, condition A. 1 Mrad(Si) 2/ En
17、hanced Low Dose Rate Sensitvity (ELDRS) 3/ Single Event Latchup (SEL) . 100 MeV-cm2/mg 4/ Neutron Displacement Damage ( 1 x 1014 neutrons/cm2). 3/ 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this
18、 drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATIONS MIL-PRF-38534 - Hybrid Microcircuits, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test
19、 Method Standard Microcircuits. MIL-STD-1835 - Interface Standard for Electronic Component Case Outlines. _ 1/ Stresses above the absolute maximum ratings may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ The device
20、will be tested every wafer diffusion lot. 3/ Not tested, Immune by 100 percent CMOS technology. 4/ This limit is guaranteed by design or process, but not production tested. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING
21、 SIZE A 5962-12203 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REV ISION LEV EL SHEET 4 DSCC FORM 2234 APR 97 DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at h
22、ttp:/quicksearch.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following documents form a part of this document to the extent specified herein. AMERICAN SOCIETY FOR TESTING AND MATERIALS (A
23、STM) ASTM F1192 - Standard Guide for the Measurement of Single Event Phenomena (SEP) Induced by Heavy Ion Irradiation of Semiconductor Devices. (Copies of these documents are available online at http:/www.astm.org or from the American Society for Testing and Materials, P O Box C700, 100 Barr Harbor
24、Drive, West Conshohocken, PA 19428-2959) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific ex
25、emption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item performance requirements for device classes D, E, G, H, and K shall be in accordance with MIL-PRF-38534. Compliance with MIL-PRF-38534 shall include the performance of all tests herein or as designated in the devic
26、e manufacturers Quality Management (QM) plan or as designated for the applicable device class. The manufacturer may eliminate, modify, or optimize the tests and inspections herein, however, the performance requirements as defined in MIL-PRF-38534 shall be met for the applicable device class. In addi
27、tion, the modification in the QM plan shall not affect the form, fit, or function of the device for the applicable device class. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38534 and herein. 3.2.1 Case outline(
28、s). The case outline(s) shall be in accordance with 1.2.4 herein and figure 1. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2. 3.2.3 Truth table(s). The truth table(s) shall be as specified on figure 3. 3.2.4 Block diagram. The block diagram shall be as specif
29、ied on figure 4. 3.2.5 Radiation exposure circuits. The radiation exposure circuits shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing and acquiring activity upon request. 3.3 Electrical performance characteristics. Unless other
30、wise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full specified operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for
31、 each subgroup are defined in table I. 3.5 Marking of device(s). Marking of device(s) shall be in accordance with MIL-PRF-38534. The device shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers vendor similar PIN may also be marked. 3.6 Data. In addition to the general pe
32、rformance requirements of MIL-PRF-38534, the manufacturer of the device described herein shall maintain the electrical test data (variables format) from the initial quality conformance inspection group A lot sample, for each device type listed herein. Also, the data should include a summary of all p
33、arameters manually tested, and for those which, if any, are guaranteed. This data shall be maintained under document revision level control by the manufacturer and be made available to the preparing activity (DLA Land and Maritime -VA) upon request. Provided by IHSNot for ResaleNo reproduction or ne
34、tworking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-12203 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REV ISION LEV EL SHEET 5 DSCC FORM 2234 APR 97 3.7 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to
35、supply to this drawing. The certificate of compliance (original copy) submitted to DLA Land and Maritime -VA shall affirm that the manufacturers product meets the performance requirements of MIL-PRF-38534 and herein. 3.8 Certificate of conformance. A certificate of conformance as required in MIL-PRF
36、-38534 shall be provided with each lot of microcircuits delivered to this drawing. 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38534 or as modified in the device manufacturers Quality Management (QM) plan. The modification in th
37、e QM plan shall not affect the form, fit, or function as described herein. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-12203 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REV ISION LEV EL SHEET 6 DSCC F
38、ORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ AVCC = +5.0 V, DVCC = +5.0 V, DRVP = +5.0 V -55C TC +125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max Digital supply current sleep DICCS VEN = DGND 1,2,3 01 1 mA Digital supply
39、 current active DICCA VEN = DVCC 1,2,3 01 2 mA Digital supply current quiescent DICCQ VEN = DVCC, CLK = DGND 1,2,3 01 1 mA Analog supply current sleep AICCS VEN = DGND 1,2,3 01 4 mA Analog supply current active AICCA VEN = DVCC 1,2,3 01 10 mA Analog supply current quiescent AICCQ VEN = DVCC, CLK = D
40、GND 1,2,3 01 10 mA Digital output supply current sleep IDRVPS VEN = DGND, CL = 50 pF 1,2,3 01 1 mA Digital output supply current active IDRVPA VEN = DVCC, CL = 50 pF 1,2,3 01 1 mA Digital output supply current quiescent IDRVPQ VEN = DVCC, CL = 50 pF, CLK = DGND 1,2,3 01 0.10 mA Full-scale input rang
41、e VIN 1,2,3 01 NREF PREF V Input capacitance 2/ CIN TC = +25C 1 01 50 pF Analog reference impedance ZREF PREF to NREF 1,2,3 01 2 6 k High analog reference current IPREF PREF-NREF = 4.0 V 1,2,3 01 0.67 2 mA High analog reference voltage VPREF 1,2,3 01 NREF +5 V Low analog reference voltage VNREF 1,2,
42、3 01 0 PREF V Integral non-linearity INL PREF-NREF = 4.5 V 4,5,6 01 0.25 %FSR Differential non-linearity DNL PREF-NREF = 4.5 V 4,5,6 01 0.05 %FSR DC offset VOS PREF-NREF = 4.5 V 4,5,6 01 0.012 %FSR DC gain AE PREF-NREF = 4.5 V 4,5,6 01 -0.006 0.006 %FSR Channel isolation 2/ ISO TC = +25C 4 01 80 dB
43、Clock frequency fC PREF-NREF = 4.5 V 4,5,6 01 1 MHz Maximum sampling rate fSAMPLE fC = 1 MHz 4,5,6 01 50 kSPS Address input voltage (AD00 - AD03) VAH VEN = DVCC 1,2,3 01 3.5 V VAL VEN = DVCC 1.5 Address input current (AD00 - AD03) IAL VA = DGND 1 01 -5 5 nA 2 -50 50 IAH VA = DVCC 1 01 -5 5 nA 2 -50
44、50 Digital input voltage EN_H, STCNV_H, OE_H VIH 1,2,3 01 3.5 V Digital input voltage CLK VIH 4.0 Digital input voltage EN_H, STCNV_H, OE_H, CLK VIL 1.5 See footnotes on next page. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT
45、 DRAWING SIZE A 5962-12203 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REV ISION LEV EL SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions 1/ AVCC = +5.0 V, DVCC = +5.0 V, DRVP = +5.0 V -55C TC +125C unless otherwise specified Group
46、A subgroups Device type Limits Unit Min Max Digital input current EN_H, STCNV_H, OE_H, CLK IIH Digital input under test = DVCC, All other digital inputs = DGND 1 01 -5 5 nA 2 -50 50 IIL All digital inputs = DGND 1 01 -5 5 nA 2 -50 50 High input leakage current (AIN00 - AIN15) IINLK(HI) Input under t
47、est = AVCC, VEN = DVCC 1 01 -5 5 nA 2 -50 50 Low input leakage current (AIN00 - AIN15) IINLK(LO) Input under test = AGND, VEN = DVCC 1 01 -5 5 nA 2 -50 50 Output voltage (B00 - B13) VOH VEN = DVCC, DRVP = +5.0 V 1,2,3 01 3.5 V VOL 1.5 Output current (B00 - B13) IO(SOURCE) VEN = DVCC, VOH = 3.5 V 1,2
48、,3 01 4 mA IO(SINK) VEN = DVCC, VOL = 1.5 V 4 High output leakage current (B00 - B13) IOUTLK(HI) VOE = DGND 1 01 -5 5 nA 2 -50 50 Low output leakage current (B00 - B13) IOUTLK(LO) VOE = DGND 1 01 -5 5 nA 2 -50 50 1/ This device has been tested to (2 Mrad(Si) to Method 1019, condition A of MIL-STD-883 at +25C for these parameters to assure the requirements of RHA designator level “H” (1Mrad(Si) are met. 2/ Not tested. Shall be guaranteed by design, characterization, or correlation to other test parameters. Provided by IHSNot for ResaleNo reproduction or networking permitt
