1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED B Pg. 4: Delete tRand tF. Pg. 5: Change tWH(R)to 250 ns Max. Change tWH(E)to 375 ns Max. Pg. 6: Delete tPLHpropagation delay time reset at Q. Editorial changes throughout. Case outline “F” inactive for new design. 85-03-12 M. A. Frye C Add vendor F
2、SCM 27014. Editorial changes throughout. 86-03-03 M. A. Frye D Delete vendor CAGE 27014 and 31019. Add vendor CAGE 18714. Change drawing CAGE to 67268. Technical changes in 1.4 and table I. Add logic diagram and counting sequence diagram. Editorial changes throughout. Convert to military drawing for
3、mat. 89-08-18 M. A. Frye E Update boilerplate to MIL-PRF-38535 requirements. jak 01-03-07 Thomas M. Hess F Made change to paragraph 3.5. Update boilerplate to MIL-PRF-38535 requirements. LTG 05-03-14 Thomas M. Hess G Update high level output voltage (VOH) and low level output voltage (VOL) test cond
4、ition in table I. Update boilerplate paragraphs to the current MIL-PRF-38535 requirements. - LTG 11-04-21 David J, Corbett CURRENT CAGE CODE 67268 REV SHET REV SHET REV STATUS REV G G G G G G G G G G G OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PREPARED BY A. J. Foley DLA LAND AND MARITIME COL
5、UMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A CHECKED BY C. R. Jackson APPROVED BY Nelson A. Hauck MICROCIRCUIT, DIGITAL, CMOS, DUAL BINARY UP-COUNTER, MONOLITHIC SIL
6、ICON DRAWING APPROVAL DATE 77-09-12 REVISION LEVEL G SIZE A CAGE CODE 14933 77023 SHEET 1 OF 11 DSCC FORM 2233 APR 97 5962-E280-11 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 77023 DLA LAND AND MARITIME COLUMB
7、US, OHIO 43218-3990 REVISION LEVEL G SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as
8、shown in the following example: 77023 01 E A Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 4520B Dual binary Up-counter 1.2.2 Case
9、outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 Dual-in-line F GDFP2-F16 or CDFP3-F16 16 Flat pack 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix
10、 A. 1.3 Absolute maximum ratings. 1/ Supply voltage range (VDD) -0.5 V dc to +20.0 V dc Input voltage range (VIN) -0.5 V dc to VDD+ 0.5 V dc DC input current . 10 mA Storage temperature range (TSTG) . -65C to +150C Maximum power dissipation (PD) . 500 mW 2/ Lead temperature (soldering, 10 seconds) +
11、300C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) . +175C 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ For TA= +100C, derat
12、e linearly at 12 mW/C to 200 mW. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 77023 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 3 DSCC FORM 2234 APR 97 1.4 Recommended operating condi
13、tions. Supply voltage range (VDD) +3.0 V dc to +18.0 V dc Case operating temperature range (TC) . -55C to +125C Minimum clock pulse width (tw1): TC= +25C, VDD= 5.0 V dc 200 ns TC= +25C, VDD= 10.0 V dc 100 ns TC= +25C, VDD= 15.0 V dc 70 ns Minimum reset pulse width (tw2): TC= +25C, VDD= 5.0 V dc 250
14、ns TC= +25C, VDD= 10.0 V dc 110 ns TC= +25C, VDD= 15.0 V dc 80 ns Minimum enable pulse width (tw3): TC= +25C, VDD= 5.0 V dc 400 ns TC= +25C, VDD= 10.0 V dc 200 ns TC= +25C, VDD= 15.0 V dc 140 ns Minimum input clock frequency (fMAX): TC= +25C, VDD= 5.0 V dc 1.5. MHz TC= +25C, VDD= 10.0 V dc 3.0 MHz T
15、C= +25C, VDD= 15.0 V dc 4.0 MHz Maximum clock input rise and fall time (trand tf): TC= +25C, VDD= 5.0 V dc 15.0 s TC= +25C, VDD= 10.0 V dc 5.0 s TC= +25C, VDD= 15.0 V dc 5.0 s 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and
16、handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTME
17、NT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these docum
18、ents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, t
19、he text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE
20、A 77023 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product buil
21、t to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifyi
22、ng activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as describ
23、ed herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein.
24、3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specif
25、ied on figure 3. 3.2.5 Counting sequence. The counting sequence shall be as specified on figure 4. 3.2.6 Switching waveforms. The switching waveforms shall be as specified on figure 5. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance character
26、istics are as specified in table I and shall apply over the full (case or ambient) operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Markin
27、g. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked as listed in MIL-HDBK-103 (see 6.6 herein). 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be mar
28、ked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance
29、 shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land and Maritime -VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the r
30、equirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change t
31、o DLA Land and Maritime -VA shall be required for any change that affects this drawing. 3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritimes agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore
32、documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 77023 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 5 DSCC FORM
33、 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Test conditions -55C TC +125C unless otherwise specified Group A subgroups Limits Unit Min Max Quiescent supply current IDDVDD= 5.0 V 1/ VIN= 0.0 V or VDD1, 3 5.0 A 2 150.0VDD= 10.0 V 1/ VIN= 0.0 V or VDD1, 3 10.0 2 300.0VDD=
34、15.0 V 1/ VIN= 0.0 V or VDD1, 3 20.0 2 600.0VDD= 20.0 V VIN= 0.0 V or VDD1, 3 100.0 2 3.0 mA High-level output voltage VOHVIN= 0.0 V or VDDIOH = -1.0 A VDD= 5.0 V 1/ 1, 2, 3 4.95 V VDD= 10.0 V 1/9.95 VDD= 15.0 V 14.95 Low-level output voltage VOLVIN= 0.0 V or VDDIOL= +1.0 A VDD= 5.0 V 1/ 1, 2, 3 0.0
35、5 V VDD= 10.0 V 1/ 0.05 VDD= 15.0 V 0.05 Low-level input voltage VILVDD= 5.0 V VO= 0.5 V or 4.5 V 1, 2, 3 1.5 V VDD= 10.0 V VO= 1.0 V or 9.0 V 1/ 3.0 VDD= 15.0 V VO= 1.5 V or 13.5 V 4.0 High-level input voltage VIHVDD= 5.0 V VO= 0.5 V or 4.5 V 1, 2, 3 3.5 V VDD= 10.0 V VO= 1.0 V or 9.0 V 1/ 7.0 VDD=
36、 15.0 V VO= 1.5 V or 13.5 V 11.0 Low-level output current IOLVDD= 5.0 V 2/ VO= 0.4 V VIN= 0.0 V or VDD1 0.51 mA 2 0.36 3 0.64 VDD= 10.0 V 1/ VO= 0.5 V VIN= 0.0 V or VDD1 1.3 2 0.9 3 1.6 VDD= 15.0 V 1/ VO= 1.5 V VIN= 0.0 V or VDD1 3.4 2 2.4 3 4.2 See footnotes at end of table. Provided by IHSNot for
37、ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 77023 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Test condition
38、s -55C TC +125C unless otherwise specified Group A subgroups Limits Unit Min Max High-level output current IOHVDD= 5.0 V 2/ VO= 4.6 V VIN= 0.0 V or VDD1 -0.51 mA 2 -0.36 3 -0.64 VDD= 5.0 V 2/ VO= 2.5 V VIN= 0.0 V or VDD1 -1.6 2 -1.15 3 -2.0 VDD= 10.0 V 1/ VO= 9.5 V VIN= 0.0 V or VDD1 -1.3 2 -0.9 3 -
39、1.60 VDD= 15.0 V 1/ VO= 13.5 V VIN= 0.0 V or VDD1 -3.4 2 -2.4 3 -4.2 Input current IINVDD= 18 V 1, 3 0.1 A 2 1.0 Input capacitance CINVIN= 0.0 V, TC= +25C, See 4.3.1c 4 7.5 pF Functional tests See 4.3.1d 7, 8 L H Transition time tTHL, tTLHCL= 50 pF 10% RL= 200 k tr= tf= 20 ns VDD= 5.0 V 9 1.5 200.0
40、ns 10, 11 1.5 260.0 VDD= 10.0 V 1/ 9 1.5 100.010, 11 1.5 130.0 ns VDD= 15.0 V 1/ 9 1.5 80.010, 11 1.5 104.0 Propagation delay time, CLOCKn or ENABLEn to Q tPHL1, tPLH1VDD= 5.0 V 9 1.5 560.0 ns 10, 11 1.5 728.0 VDD= 10.0 V 1/ 9 1.5 230.010, 11 1.5 299.0 ns VDD= 15.0 V 1/ 9 1.5 160.010, 11 1.5 208.0 S
41、ee footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 77023 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance ch
42、aracteristics - Continued. Test Symbol Test conditions -55C TC +125C unless otherwise specified Group A subgroups Limits Unit Min Max Propagation delay time, RESETn to Q tPHL2CL= 50 pF 10% RL= 200 k tr= tf= 20 ns VDD= 5.0 V 9 1.5 650.0 ns 10, 11 1.5 845.0 VDD= 10.0 V 1/ 9 1.5 225.010, 11 1.5 293.0 n
43、s VDD= 15.0 V 1/ 9 1.5 170.010, 11 1.5 221.0 1/ This parameter is guaranteed, if not tested, to the specified limits in table I. 2/ The IOLand IOHtests are tested 100 percent at TC= +25C, and are guaranteed, if not tested, for TC= -55C and TC= +125C. Device type All Case outlines E, F Terminal numbe
44、r Terminal symbol 1 CLOCK A 2 ENABLE A 3 Q1A 4 Q2A 5 Q3A6 Q4A 7 RESET A8 GND 9 CLOCK B 10 ENABLE B 11 Q1B12 Q2B13 Q3B14 Q4B15 RESET B16 VDDFIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING S
45、IZE A 77023 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 8 DSCC FORM 2234 APR 97 CLOCKn ENABLEn RESETn Action L X H X H X L X L L L L L L H Increment counter Increment counter No change No change No change No change Q1nthrough Q4n H = High voltage level L = Low voltage leve
46、l X = Irrelevant = Low to high clock transition = High to low clock transition FIGURE 2. Truth table. FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 77023 DLA LAND AND MARITIME COLUMBUS,
47、OHIO 43218-3990 REVISION LEVEL G SHEET 9 DSCC FORM 2234 APR 97 FIGURE 4. Counting sequence. FIGURE 5. Switching waveforms. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 77023 DLA LAND AND MARITIME COLUMBUS, OHIO
48、 43218-3990 REVISION LEVEL G SHEET 10 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B,
