1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED G Delete vendor CAGE 34335. Convert to military drawing format. Delete minimum limits from propagation delays. Add logic diagram. 87-07-01 N. A. Hauck H Changes in accordance with NOR 5962-R277-97. -tn 97-04-14 Raymond Monnin J Update to reflect la
2、test changes in format and requirements. Editorial changes throughout. -les 04-07-27 Raymond Monnin CURRENT CAGE CODE 67268 THE ORIGINAL FIRST PAGE OF THIS DRAWING HAS BEEN REPLACED. REV SHET REV SHET REV STATUS REV J J J J J J J J J J J J OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED
3、 BY Monica L. Grosel DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY D. A. DiCenzo COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY N. A. Hauck MICROCIRCUIT, DIGITAL, LOW POWER SCHOTTKY, TTL, SHIFT REGISTER AND
4、AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 78-12-20 MONOLITHIC SILICON AMSC N/A REVISION LEVEL J SIZE A CAGE CODE 14933 78024 SHEET 1 OF 12 DSCC FORM 2233 APR 97 5962-E347-04 .Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-STANDARD MI
5、CROCIRCUIT DRAWING SIZE A 78024 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL J SHEET 2 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Id
6、entifying Number (PIN). The complete PIN is as shown in the following example: 78024 01 R A Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device types. The device types identify the circuit function as follows: Device type Generic number Circuit function
7、01 54LS299 8-bit universal shift/storage register 02 25LS299 8-bit universal shift/storage register 1.2.2 Case outlines. The case outlines are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style R GDIP1-T20 or CDIP2-T20 20 dual-in-line S GDFP2-
8、F20 or CDFP3-F20 20 flat 2 CQCC1-N20 20 square chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage range ) -0.5 V dc to +7.0 V dc Input voltage range . -1.5 V dc at 18 mA to +7.0 V dc Storage temperature -65C to +
9、150C Maximum power dissipation (PD) . 292 mW 1/ Lead temperature (soldering, 10 seconds) . +300C Junction temperature (TJ) +175C Thermal resistance, junction-to-case (JC): Cases R, S, and 2 See MIL-STD-1835 1.4 Recommended operating conditions. Supply voltage range (VCC) 4.5 V dc minimum to 5.5 V dc
10、 maximum High level output current (IOH): QAthrough QH-1 mA QAor QH-0.4 mA Low level output current (IOL): QAthrough QH12 mA QAor QH4 mA Case operating temperature range (TC) -55C to +125C _ 1/ Maximum power dissipation is defined as VCCX ICC, and must withstand the added PDdue to short circuit test
11、 e.g., IOS.DSCC FORM 2234 APR 97 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-STANDARD MICROCIRCUIT DRAWING SIZE A 78024 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL J SHEET 3 Select setup time: Device 01 35 ns minimum Dev
12、ice 02 23 ns minimum Data setup time: 2/ Device 01 20 ns minimum Device 02 23 ns minimum Clear inactive state setup time: Device 01 20 ns minimum Device 02 23 ns minimum Select hold time 2/ 10 ns minimum Data hold time: Device 01 3 ns minimum Device 02 9 ns minimum 2. APPLICABLE DOCUMENTS 2.1 Govern
13、ment specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATI
14、ON MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Mi
15、crocircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or www.dodssp.daps.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Ord
16、er of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 I
17、tem requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manuf
18、acturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may m
19、ake modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow opti
20、on is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. _ 2/ Data includes the two serial inputs and the eight input/output data lines. DSCC FORM 2234 APR 97 Provided by IHSNot for
21、 ResaleNo reproduction or networking permitted without license from IHS-,-STANDARD MICROCIRCUIT DRAWING SIZE A 78024 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL J SHEET 4 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal conne
22、ctions. The terminal connections shall be as specified on figure 1. 3.2.3 Truth tables. The truth tables shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3 3.3 Electrical performance characteristics. Unless otherwise specified herein, the elec
23、trical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in tabl
24、e I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. 3.5.1 Certification/compliance mark. A compliance indicator C shall be marked on all non-JAN devices bui
25、lt in compliance to MIL-PRF-38535, appendix A. The compliance indicator C shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufa
26、cturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the r
27、equirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that af
28、fects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. DSCC FORM 2234 APR 97 Pro
29、vided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-STANDARD MICROCIRCUIT DRAWING SIZE A 78024 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL J SHEET 5 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC +1
30、25C unless otherwise specified Group A subgroups Device type Limits UnitMin MaxHigh level input voltage VIH 1, 2, 3 All 2 V Low level input voltage VIL 1, 2, 3 All 0.7 V Input clamp voltage VIC VCC= 4.5 V, IIN= -18 mA, TC= +25C 1 All -1.5 V High level output voltage, QAthrough QHVOH1VCC= 4.5 V, VIL=
31、 0.7 V, IOH= -1 mA 1, 2, 3 All 2.4 V High level output voltage QAor QHVOH2VIH= 2 V IOH= -0.4 mA 1, 2, 3 All 2.5 V Low level output voltage, VOL1IOL= 12 mA 1, 2, 3 01 0.4 V QAthrough QHOL= 8 mA 1, 2, 3 02 0.4 V Low level output voltage, VOL2IOL= 4 mA 1, 2, 3 01 0.4 V QAor QH OL= 4 mA 1, 2, 3 02 0.45
32、V Off-state output current high level voltage applied, QAthrough QHIOZHVCC= 5.5 V, VIH= 2 V, VOUT= 2.7 V 1, 2, 3 All 40 A Off-state output current low level voltage applied, QAthrough QHIOZLVCC= 5.5 V, VIL= 0.7 V, VOUT= 0.4 V 1, 2, 3 All -400 A Input current at maximum input voltage IIVCC= 5.5 V, S0
33、, S1 inputs; VIN= 7 V 1, 2, 3 All 200 A A through H inputs; VIN= 5.5 V 1, 2, 3 All 100 A All other inputs; VIN= 7 V 1, 2, 3 All 100 A High level input current IIHVCC= 5.5 V, A through H, S0, S1 inputs 1, 2, 3 All 40 A IN= 2.7 V All other inputs 1, 2, 3 All 20 A Low level input current IILVCC= 5.5 V,
34、 S0, S1 inputs 1, 2, 3 All -0.8 mA IN= 0.4 V All other inputs 1, 2, 3 All -0.4 mA Short circuit output current IOSVCC= 5.5 V, QAthrough QH1, 2, 3 All -30 -130 mA 1/ VOUT= 0.0 V QAor QH1, 2, 3 All -20 -100 mA Supply current ICCVCC= 5.5 V 1, 2, 3 All 60 mA Functional tests See 4.3.1c 7 All See footnot
35、es at end of table. DSCC FORM 2234 APR 97 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-STANDARD MICROCIRCUIT DRAWING SIZE A 78024 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL J SHEET 6 TABLE I. Electrical performance chara
36、cteristics Continued. Test Symbol Conditions -55C TC +125C unless otherwise specified Group A subgroups Device type Limits UnitMin MaxMaximum clock frequency fMAXCL= 50 pF 10% 9 02 25 MHz 10, 11 32Propagation delay, clock tPLH1VCC= 5.0 V, CL= 15 pF 10% 9 02 28 ns to QAor QHPHL1RL= 2 k 5% 10, 11 382/
37、 CL= 50 pF 10% 9 02 33 ns 10, 11 45Propagation delay, clear tPHL2CL= 15 pF 10% 9 02 35 ns to QAor QH10, 11 49CL= 50 pF 10% 9 02 40 ns 10, 11 56 Propagation delay, clock tPLH3CL= 45 pF 10% 9 02 35 ns to QAthrough QHPHL310, 11 45 CL= 50 pF 10% 9 02 40 ns 10, 11 52 Maximum clock frequency fMAXCL= 50 pF
38、 10% 9 01 20 MHz 10, 11 12Propagation delay, clock tPLH4CL= 15 pF 10% 9 01 33 ns to QAor QH10, 11 46CL= 50 pF 10% 9 01 36 ns 10, 11 50tPHL4CL= 15 pF 10% 9 01 39 ns 10, 11 55CL= 50 pF 10% 9 01 42 ns 10, 11 59Propagation delay, clear tPHL5CL= 15 pF 10% 9 01 40 ns to QAor QH10, 11 56CL= 50 pF 10% 9 01
39、43 ns 10, 11 60Propagation delay, clock tPLH6VCC= 5.0 V, CL= 45 pF 10% 9 01 25 ns to QAthrough QHRL= 665 5% 10, 11 352/ CL= 50 pF 10% 9 01 26 ns 10, 11 36tPHL6CL= 45 pF 10% 9 01 39 ns 10, 11 55CL= 50 pF 10% 9 01 40 ns 10, 11 56 See footnotes at end of table. DSCC FORM 2234 APR 97 Provided by IHSNot
40、for ResaleNo reproduction or networking permitted without license from IHS-,-STANDARD MICROCIRCUIT DRAWING SIZE A 78024 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL J SHEET 7 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions -55C TC +125C un
41、less otherwise specified Group A subgroups Device type Limits UnitMin MaxPropagation delay, clear tPHL7VCC= 5.0 V, CL= 45 pF 10% 9 01 40 ns to QAto QHRL= 665 5% 10, 11 56Propagation delay, clear tPHL82/ CL= 45 pF 10% 9 02 35 ns to QAto QH10, 11 49Propagation delay, G1, G2 tPZHCL= 45 pF 10% 9 All 35
42、ns to QAthrough QHPZL10, 11 49 Propagation delay, G1, G2 tPHZCL= 5 pF 10% 9 All 25 ns to QAthrough QHPLZ10, 11 35 1/ Not more than one output should be shorted at a time and the duration of the short circuit condition should not exceed 1 second. 2/ Propagation delay time testing and maximum clock fr
43、equency testing may be performed using either CL= 5 pF, CL= 15 pF, CL= 45 pF, or CL= 50 pF. However, the manufacturer must certify and guarantee that the microcircuits meet the switching test limits specified for a 50 pF load. DSCC FORM 2234 APR 97 Provided by IHSNot for ResaleNo reproduction or net
44、working permitted without license from IHS-,-STANDARD MICROCIRCUIT DRAWING SIZE A 78024 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL J SHEET 8 DSCC FORM 2234 APR 97 Device type 01 02 Case outlines R, S, 2 R, S Terminal number Terminal symbol 1 S0 S0 2 G1 G1 3 G2 G2 4 G/QGD
45、Y65 E/QEDY46 C/QCDY27 A/QADY08 QAQ09 CLR CLR10 GND GND 11 SR SR12 CLK CP 13 B/QBDY114 D/QDDY315 F/QFDY516 H/QHDY717 QHQ718 SL SL19 S1 S1 20 VCCVCCFIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-STANDARD MICROCIRCUIT DRAW
46、ING SIZE A 78024 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL J SHEET 9 DSCC FORM 2234 APR 97 Device 01 Inputs Inputs/outputs Outputs Mode Function Output Serial selct control CLR CLK S1 S0 G 1 G 2 SL SR A/QAB/QBC/QCD/QDE/QEF/QFG/QGH/QHQAQHClear L X L L L X X X L L L L L L
47、 L L L L L L X L L X X X L L L L L L L L L L Hold H L L L L X X X QA0QB0QC0QD0QE0QF0QG0QH0QA0QH0H X X L L L X X QA0QB0QC0QD0QE0QF0QG0QH0QA0QH0Shift H L H L L X H H QAnQBnQCnQDnQEnQFnQGnH QGnRight H L H L L X L L QAnQBnQCnQDnQEnQFnQGnL QGnShift H H L L L H X QBnQCnQDnQEnQFnQGnQHnH QBnH Left H H L L L
48、 L X QBnQCnQDnQEnQFnQGnQHnL QBnL Load H H H X X X X a b c d e f g h a h When one or both output controls are high, the eight input/output terminals are disabled to the high-impedance state; however, sequential operation or clearing of the register is not affected. L = Low = Transition low to high Z = High impedance H = High X = Dont care Device 02 Function Inputs Outputs Inputs/outputs SR SL CLR CLK S0 S1 G1 G2 Q0Q7DY0DY1DY2DY3DY4DY5DY6DY7Clear
