1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED E Change to vendor similar part number for vendor CAGE number 61772 for devices 08KX, 09KX, 10KX, 11KX, 12KX, 13KX, 14KX, 15KX, and 16KX. Remove vendor CAGE number 61772 from devices 08YX, 09YX, 10YX, 11YX, 12YX, 13YX, 15YX, and 16YX. Change to ven
2、dor similar part number for vendor CAGE number 65786 for devices 09 and 11. Add vendor CAGE number 50088 to the drawing as a source of supply for devices 04JX and 05JX. Add vendor CAGE number 65896 to the drawing as a source of supply for devices 15 and 16. Removed 4.3.3 from drawing. Editorial chan
3、ges throughout. 92-04-27 M. A. Frye F Added provisions for the addition of QD certified parts to drawing. Updated boilerplate. Added CAGE OC7V7 as supplier. - ksr 00-09-27 Raymond Monnin G Correction to marking paragraph 3.5. Updated boilerplate paragraphs. ksr 05-03-11 Raymond Monnin H Boilerplate
4、update, part of 5 year review. - ksr 11-02-14 Charles F. Saffle THE ORIGINAL FIRST PAGE OF THIS DRAWING HAS BEEN REPLACED CURRENT CAGE CODE 67268 REV SHET REV H H H H H H H H SHEET 15 16 17 18 19 20 21 22 REV STATUS REV H H H H H H H H H H H H H H OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMI
5、C N/A PREPARED BY Roger Mell DLA LAND AMD MARITIME COLUMBUS, OHIO 43218-3990 STANDARD MICROCIRCUIT DRAWING CHECKED BY D. A. DiCenzo http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Nelson A. Hauck MICROCIRCUITS, MEMORY, DIGITAL, CMOS, 16K (2048 X 8) BIT STATIC
6、RAM, AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 84 08 - 24 MONOLITHIC SILICON AMSC N/A REVISION LEVEL H SIZE A CAGE CODE 14933 84036 SHEET 1 OF 22 DSCC FORM 2233 APR 97 5962-E166-11 .Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-
7、,-STANDARD MICROCIRCUIT DRAWING SIZE A 84036 DLA LAND AMD MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535,
8、appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 84036 01 J X Drawing number Device type Case outline Lead finish (see 1.2.1) (see 1.2.2) (see 1.2.3) 1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type
9、 Generic number 1/ Supply voltage variation Address access time 01 10% 200 ns (synchronous) 02 10% 90 ns 03 10% 90 ns 04 10% 150 ns 05 10% 200 ns 06 10% 70 ns 07 10% 120 ns (synchronous) 08 10% 45 ns 09 10% 45 ns 10 10% 55 ns 11 10% 55 ns 12 10% 70 ns 13 10% 70 ns 14 10% 35 ns 15 10% 120 ns 16 10% 9
10、0 ns 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style J CDIP2-T24 or GDIP1-T24 24 dual-in-line package K CDFP3-F24 or GDFP2-F24 24 flat package L CDIP4-T24 or GDIP3-T24 24 dual-in-line package X
11、 CQCC1-N32 32 rectangular chip carrier package Y See Figure 1 24 rectangular chip carrier package Z CQCC1-N32 32 rectangular chip carrier package with castellated instead of chamfered corners and extended pad metallization at terminal number 1. 3 CQCC1-N28 28 square chip carrier package 1.2.3 Lead f
12、inish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1/ Generic numbers are listed on the standardized military drawing source approval bulletin at the end of this Standard Microcircuit Drawing and will also be listed in MIL-HDBK-103. Provided by IHSNot for ResaleNo reproduction or n
13、etworking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84036 DLA LAND AMD MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. Supply voltage range (VCC) - -0.3 V dc to +7.0 V dc 2/ Temperature under bias - -55
14、C to +125C Storage temperature range - -55C to +150C Maximum power dissipation (PD) - 1.0 W Lead temperature (soldering, 5 seconds) - +275C Thermal resistance, junction-to-case (JC): - See MIL-STD-1835 Case Y - 30C/W Junction temperature (TJ) - +150C 3/ All input or output voltages with respect to g
15、round - -0.3 V dc to VCC+0.3 V dc 4/ 1.4 Recommended operating conditions. Case operating temperature range (TC) - -55C to +125C Input low voltage (VIL): Device types 01 through 16 - -0.3 V dc to 0.8 V dc 2/ Input high voltage (VIH): Device types 01, 07 - 2.4 V dc to VCC +0.3 V dc 2/ Device types 02
16、 through 06, 08 through 16 - 2.2 V dc to VCC +0.3 V dc 2/ Supply voltage range (VCC): - 4.5 V dc to 5.5 V dc 2/ Minimum chip enable low time - 40 ns 5/ Minimum chip enable high time - 40 ns 5/ Maximum input rise time - 40 ns Maximum input fall time - 40 ns 2. APPLICABLE DOCUMENTS 2.1 Government spec
17、ification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PR
18、F-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircui
19、t Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event
20、of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 2/ All voltages referenced to VSS. 3/ Maximum juncti
21、on temperature shall not be exceeded except for allowable short duration burn-in screening conditions in accordance with method 5004 of MIL-STD-883. 4/ Negative undershoots to a minimum of -3.0 V are allowed with a maximum of 20 ns pulse width. 5/ For device types 02, 03, and 06 only. Provided by IH
22、SNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84036 DLA LAND AMD MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall
23、be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification t
24、o MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modif
25、ications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. This drawing has been modified to allow the m
26、anufacturer to use the alternate die/fabrication requirements of paragraph A.3.2.2 of MIL-PRF-38535 or alternative approved by the Qualifying Activity. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendi
27、x A and herein. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.2 herein and figure 1. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2. 3.2.3 Truth table(s). The truth table(s) shall be as specified on figure 3. 3.2.4 Logic diagram(s)
28、. The logic diagram(s) shall be as specified on figure 4. 3.2.5 Die overcoat. Polyimide and silicone coatings are allowable as an overcoat on the die for alpha particle protection only. Each coated microcircuit inspection lot (see inspection lot as defined in MIL-PRF-38535) shall be subjected to and
29、 pass the internal moisture content test at 5000 ppm (see method 1018 of MIL-STD-883). The frequency of the internal water vapor testing shall not be decreased unless approved by the preparing activity for class M. The TRB will ascertain the requirements as provided by MIL-PRF-38535 for classes Q an
30、d V. Samples may be pulled any time after seal. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The
31、electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufac
32、turers PIN may also be marked. 3.5.1 Certification/compliance mark. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, Appendix A. For Class Q product built in accordance with A.3.2.2 of MIL-PRF-38535 or other alternative approved by the Qualifying Activity, the “QD“
33、 certification mark shall be used in place of the “QML“ or “Q“ certification mark. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance su
34、bmitted to DLA Land and Maritime-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535,
35、 appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DLA Land and Maritime-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritime
36、s agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license
37、 from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84036 DLA LAND AMD MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Test conditions 1/ 2/ VSS= 0 V, 4.5 V VCC 5.5 V -55C TC +125C Group A subgroupsDevice t
38、ype Limits Unit unless otherwise specified Min Max High-level output voltage VOHIOH = -1 mA 1,2,3 01-07, 15,16 2.4 V IOH = -4 mA 1,2,3 08-14 Low-level output voltage VOLIOL = +3.2 mA 1,2,3 01,07 0.4 V IOL = +4.0 mA 02,03, 06,15 IOL = +2.0 mA 04,05,16 IOL = +8.0 mA 08-14 High impedance output leakage
39、 current IIOLZ IIOHZOE = VIH 1,2,3 01,02, 06,07 -1.0 1.0 A 04,05,09,11,13,14,15,16 -10.0 10.0 03,08, 10,12 -5.0 5.0 Input leakage current IIL IIHVIN= GND VIN= 5.5 V 1,2,3 01,02, 06,07 -1.0 1.0 A 04,05, 15 -2.0 2.0 03,08,10,12,16 -5.0 5.0 09,11, 13,14 -10.0 10.0 Operating supply current ICC1VCC= 5.5
40、V, f = fmax 3/ CE = VIL, outputs open All other inputs at VIL1,2,3 01,07 10 mA 04,05,13,15,16 90 02,03,06 70 08,10,12 85 09,11 120 14 150 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZ
41、E A 84036 DLA LAND AMD MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Test conditions 1/ 2/ VSS = 0 V, 4.5 V VCC 5.5 V -55C TC +125C Group A subgroupsDevice type Limits Unit unless otherwise s
42、pecified Min Max Standby supply current ICC2CE = WE = VIH, IO= 0 1,2,3 02,03,06 8 mA 04,05 10 10,12,15,16 15 09,11,13,14 25 Standby supply current ICC3CE = VCC0.3 V, IO= 0 1,2,3 06,07 50 A 01,02 100 04,05 250 03,08,10,12,15,16 900 13 10 mA 09,11,14 20 Data retention current ICC4CE = VCC, VCC= 2.0 V
43、1,2,3 01,02 50 A 04,05 100 08,10,12,15,16 200 03 300 06,07 25 Input capacitance 4/ CIVI= VCCor GND f = 1 MHz See 4.3.1c 4 All 10 pF Output capacitance 4/ COVI= VCCor GND f = 1 MHz See 4.3.1c 4 All 12 pF See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitt
44、ed without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84036 DLA LAND AMD MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Test conditions 1/ 2/ VSS= 0 V, 4.5 V VCC 5.5 V -55C TC +
45、125C Group A subgroups Device type Limits Unit unless otherwise specified Min Max Read/write cycle time tAVAV 5/ 6/ 9, 10, 11 01 280 ns 02,03,16 90 04 150 05 200 15 120 07 170 08,09 45 10,11 55 06,12,13 70 14 35 Address access time tAVQV 5/ 6/ 9, 10, 11 01 200 ns 02,03,16 90 04 150 05 200 07,15 120
46、08,09 45 10,11 55 06,12,13 70 14 35 Output hold after address change 4/ tAVQX 5/ 6/ 9, 10, 11 15,16 0 ns 04,05 10 02,03,06, 07,08-14 5 Output enable to output active 4/ tOLQX 5/ 6/ 9, 10, 11 01,07 10 ns 02,03,06, 08,12,13 5 04,05,09,11,14,15, 16 0 Output enable access time tOLQV 5/ 6/ 9, 10, 11 01,07,15 80 ns 02,03,16 65 04 60 05 70 08,09 25 10,11 40 06,12,13 50 14 20 See footnote
