DLA SMD-5962-84037 REV J-2009 MICROCIRCUIT DIGITAL HIGH-SPEED CMOS QUAD 2-INPUT NAND GATE MONOLITHIC SILICON.pdf

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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED F Add vendor CAGE F8859. Add device class V criteria. Editorial changes throughout. jak. 99-11-05 Monica L. Poelking G Correct data limits in paragraph 1.3 and IINtest conditions in table I. Add case outline X. Add table III, delta limits. Editoria

2、l changes throughout. - jak 00-06-21 Monica L. Poelking H Correct table II. Update boilerplate to MIL-PRF-38535 requirements. jak 02-01-25 Thomas M. Hess J Change address. Add JEDEC Standard 7-A reference paragraphs 2.2 and 4.4.1c. Update boilerplate paragraphs to the current verbiage as specified i

3、n MIL-PRF-38535. Update propagation delay time, data to output. - jak 09-08-17 Thomas M. Hess CURRENT CAGE CODE 67268 REV SHEET REV SHEET REV STATUS REV J J J J J J J J J J J J J OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 PMIC N/A PREPARED BY Jeffery Tunstall DEFENSE SUPPLY CENTER COLUMBUS STANDA

4、RD MICROCIRCUIT DRAWING CHECKED BY D.A.DiCenzo COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY N. A. Hauck MICROCIRCUIT, DIGITAL, HIGH-SPEED CMOS, QUAD 2-INPUT NAND GATE, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DR

5、AWING APPROVAL DATE 84-05-09 AMSC N/A REVISION LEVEL J SIZE A CAGE CODE 14933 84037 SHEET 1 OF 13 DSCC FORM 2233 APR 97 5962-E401-09 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84037 DEFENSE SUPPLY CENTER COLU

6、MBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL J SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are

7、available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following examples. For device classes M and Q: 84037 01 C A Drawing number Device type Case outline

8、 Lead finish (see 1.2.2) (see 1.2.4) (see 1.2.5) For device class V: 5962 - 84037 01 V X A Federal RHA Device Device Case Lead stock class designator type class outline finish designator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. D

9、evice classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates

10、a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54HC00 Quad 2-input positive-NAND gate 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance l

11、evel as listed below. Since the device class designator has been added after the original issuance of this drawing, device classes M and Q designators will not be included in the PIN and will not be marked on the device. Device class Device requirements documentation M Vendor self-certification to t

12、he requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT

13、DRAWING SIZE A 84037 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL J SHEET 3 DSCC FORM 2234 APR 97 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style A GDFP5-F14 or CDFP6

14、-T14 14 Flat pack B GDFP4-F14 14 Flat packC GDIP1-T14 or CDIP2-T14 14 Dual-in-line D GDFP1-F14 or CDFP2-F14 14 Flat pack X CDFP3-F14 14 Flat pack2 CQCC1-N20 or CQCC2-N20 20 Square leadless chip carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or

15、MIL-PRF-38535, appendix A for device class M. 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VCC) -0.5 V dc to +7.0 V dc DC input voltage range (VIN) -0.5 V dc to VCC+0.5 V dc DC output voltage range (VOUT) . -0.5 V dc to VCC+0.5 V dc Input clamp current (IIK) (VINVCC) . 20 mA Output c

16、lamp current (IOK) (VOUTVCC) . 20 mA Continuous output current (IOUT) (VOUT= 0.0 to VCC) 25 mA Continuous current through VCCor GND . 50 mA Storage temperature range (TSTG) . -65C to +150C Maximum power dissipation (PD): 500 mW 4/ Lead temperature (soldering, 10 seconds) +260C Thermal resistance, ju

17、nction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) +175C 5/ 1.4 Recommended operating conditions. 2/ 3/ Supply voltage range (VCC) +2.0 V dc to +6.0 V dc Case operating temperature range (TC) -55C to +125C Input rise or fall time (tr, tf): VCC= 2.0 V 0 to 1,000 ns VCC= 4.5 V 0 to 500 n

18、s VCC= 6.0 V 0 to 400 ns 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unless otherwise noted, all voltages are referenced to GND. 3/ The limits for the parameters sp

19、ecified herein shall apply over the full specified VCC range and case temperature range of -55C to +125C. 4/ For TC= +100C to +125C, derate linearly at 12 mW/C. 5/ Maximum junction temperature shall not be exceeded except for allowable short duration burn-in screening conditions in accordance with m

20、ethod 5004 of MIL-STD-883. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84037 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL J SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1

21、Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECI

22、FICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Stand

23、ard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-50

24、94.) 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. ELECTRONIC INDUSTRIES ALLIANCE (EIA) JEDEC Standard No. 7-A - Standa

25、rd for Description of 54/74HCXXXX and 54/74HCTXXXX High-Speed CMOS Devices (Copies of these documents are available online at http:/www.eia.org or from the Electronic Industries Alliance, 2500 Wilson Boulevard, Arlington, VA 22201-3834.) 2.3 Order of precedence. In the event of a conflict between th

26、e text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for

27、device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for devi

28、ce class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and

29、V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. Provided by IHSNot for ResaleNo reproduction or networking permitted

30、without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84037 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL J SHEET 5 DSCC FORM 2234 APR 97 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as spe

31、cified on figure 3. 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified in figure 4. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics a

32、nd postirradiation parameter limits are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table

33、 I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the devi

34、ce. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark

35、 for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535

36、listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance

37、 submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Cer

38、tificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class

39、 M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to re

40、view the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 36

41、(see MIL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84037 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL J SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical pe

42、rformance characteristics. Test Symbol Test conditions 1/ -55C TC +125C Group A subgroups Limits Unit unless otherwise specified Min Max High level output voltage VOHVIN= VIHminimum or VILmaximum IOH= -20 A VCC= 2.0 V 1, 2, 3 1.9 V VCC= 4.5 V 4.4 VCC= 6.0 V 5.9 VIN= VIHminimum or VILmaximum IOH= -4.

43、0 mA VCC= 4.5 V 1 3.98 2, 3 3.7 VIN= VIHminimum or VILmaximum IOH= -5.2 mA VCC= 6.0 V 1 5.48 2, 3 5.2 Low level output voltage VOLVIN= VIHminimum or VILmaximum IOL= +20 A VCC= 2.0 V 1, 2, 3 0.1 V VCC= 4.5 V 0.1 VCC= 6.0 V 0.1 VIN= VIHminimum or VILmaximum IOL= +4.0 mA VCC= 4.5 V 1 0.26 2, 3 0.40 VIN

44、= VIHminimum or VILmaximum IOL= +5.2 mA VCC= 6.0 V 1 0.26 2, 3 0.40 High level input voltage VIH 2/ VCC= 2.0 V 1, 2, 3 1.5 V VCC= 4.5 V 3.15 VCC= 6.0 V 4.2 Low level input voltage VIL 2/ VCC= 2.0 V 1, 2, 3 0.3 V VCC= 4.5 V 0.9 VCC= 6.0 V 1.2 Input capacitance CINVIN= 0.0 V, TC= +25C, VCC= 2.0 V to 6

45、.0 V, See 4.4.1c 4 10.0 pF Quiescent supply current ICCVIN= VCC or 0.0 V VCC= 6.0 V IOUT= 0.0 A 1 2.0 A 2, 3 40.0 Input leakage current IINVIN= VCCor 0.0 V VCC= 6.0 V 1 100.0 nA 2, 3 1000.0Power dissipation capacitance CPDSee 4.4.1c 4 20.0 pF See footnotes at end of table. Provided by IHSNot for Res

46、aleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84037 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL J SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Test con

47、ditions 1/ -55C TC +125C Group A subgroups Limits Unit unless otherwise specified Min Max Functional tests See 4.4.1b 7, 8 L H Propagation delay time, data to output, mA and mB to mY tPHL1, tPLH1 2/ TC= +25C CL= 50 pF See figure 4 VCC= 2.0 V 9 90 ns VCC= 4.5 V 18 VCC= 6.0 V 15 TC= -55C, +125C CL= 50

48、 pF See figure 4 VCC= 2.0 V 10, 11 135 ns VCC= 4.5 V 27 VCC= 6.0 V 23 Transition time, output rise and fall tTHL, tTLH 3/ TC= +25C CL= 50 pF See figure 4 VCC= 2.0 V 9 75 ns VCC= 4.5 V 15 VCC= 6.0 V 13 TC= -55C, +125C CL= 50 pF See figure 4 VCC= 2.0 V 10, 11 110 ns VCC= 4.5 V 22 VCC= 6.0 V 19 1/ For a power supply of 5 V 10, the worst case output voltages (VOHand VOL) occur for HC at 4.5 V. Thus, the 4.5 V values should be used when designing with

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