DLA SMD-5962-84047 REV G-2009 MICROCIRCUIT DIGITAL HIGH-SPEED CMOS QUAD 2-INPUT POSITIVE AND GATE MONOLITHIC SILICON.pdf

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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED D Add vendor CAGE F8859. Add device class V criteria. Editorial changes throughout. jak 99-11-05 Monica L. Poelking E Correct data limits in paragraph 1.3 and IINand CINtest conditions in table I. Add case outline X. Add table III, delta limits. ja

2、k 00-07-12 Monica L. Poelking F Correct table II. Update boilerplate to MIL-PRF-38535 requirements. - jak 02-02-14 Thomas M. Hess G Add JEDEC Standard 7-A in paragraphs 2.2 and 4.4.1c. Update boilerplate paragraphs to the current MIL-PRF-38535 requirements. - LTG 09-11-17 Thomas M. Hess CURRENT CAGE

3、 CODE 67268 REV SHET REV SHET REV STATUS REV G G G G G G G G G G G G OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY Jeffery Tunstall DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL

4、 DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY D. A. DiCenzo APPROVED BY Michael A. Frye MICROCIRCUIT, DIGITAL, HIGH-SPEED CMOS, QUAD 2-INPUT POSITIVE AND GATE, MONOLITHIC SILICON DRAWING APPROVAL DATE 84-09-01 AMSC N/A REVISION LEVEL G SIZE A CAGE CODE 14933 84047 SHEET 1 OF 12 D

5、SCC FORM 2233 APR 97 5962-E030-10 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84047 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. T

6、his drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Ra

7、diation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following examples. For device classes M and Q: 84047 01 C A Drawing number Device type (see 1.2.2) Case outline(see 1.2.4) Lead finish(see 1.2.5)For device class V: 5962 - 84047 01 V X A Federal sto

8、ck class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2.4) Leadfinish (see 1.2.5) / (see 1.2.3) /Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with t

9、he appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Devic

10、e type Generic number Circuit function 01 54HC08 Quad 2-input positive AND gate 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as listed below. Since the device class designator has been added after the original issuance of this

11、drawing, device classes M and Q designators will not be included in the PIN and will not be marked on the device. Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-3

12、8535, appendix A Q or V Certification and qualification to MIL-PRF-38535 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84047 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 3 DSCC

13、 FORM 2234 APR 97 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style B GDFP4-F14 14 Flat pack C GDIP1-T14 or CDIP2-T14 14 Dual-in-lineD GDFP1-F14 or CDFP2-F14 14 Flat pack X CDFP3-F14 14 Flat pack

14、2 CQCC1-N20 20 Square leadless chip carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VCC) -0.5 V dc to +7.0 V dc DC input voltage range

15、(VIN) -0.5 V dc to VCC+0.5 V dc DC output voltage range (VOUT) . -0.5 V dc to VCC+0.5 V dc Input clamp current (IIK) (VINVCC) . 20 mA Output clamp current (IOK) (VOUTVCC) . 20 mA Continuous output current (IOUT) (VOUT= 0.0 to VCC) 25 mA Continuous current through VCCor GND . 50 mA Storage temperatur

16、e range (TSTG) . -65C to +150C Maximum power dissipation (PD): 500 mW 4/ Lead temperature (soldering, 10 seconds) +260C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) +175C 5/ 1.4 Recommended operating conditions. 2/ 3/ Supply voltage range (VCC) +2.0 V dc to

17、+6.0 V dc Case operating temperature range (TC) -55C to +125C Input rise or fall time (tr, tf): VCC= 2.0 V 0 to 1,000 ns VCC= 4.5 V 0 to 500 ns VCC= 6.0 V 0 to 400 ns 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may

18、degrade performance and affect reliability. 2/ Unless otherwise noted, all voltages are referenced to GND. 3/ The limits for the parameters specified herein shall apply over the full specified VCC range and case temperature range of -55C to +125C. 4/ For TC= +100C to +125C, derate linearly at 12 mW/

19、C. 5/ Maximum junction temperature shall not be exceeded except for allowable short duration burn-in screening conditions in accordance with method 5004 of MIL-STD-883. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZ

20、E A 84047 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified

21、herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Mic

22、rocircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicks

23、earch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents cit

24、ed in the solicitation or contract. ELECTRONIC INDUSTRIES ALLIANCE (EIA) JEDEC Standard No. 7-A - Standard for Description of 54/74HCXXXXX and 54/74HCTXXXXX High-Speed CMOS Devices. (Copies of these documents are available online at http:/www.jedec.org or from Electronic Industries Alliance, 2500 Wi

25、lson Boulevard, Arlington, VA 22201-3834). 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific

26、exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan s

27、hall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construc

28、tion, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections

29、 shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified in figure 4.

30、Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84047 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 5 DSCC FORM 2234 APR 97 3.3 Electrical performance characteristics and postirra

31、diation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements

32、shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not

33、feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be

34、in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate o

35、f compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be

36、 listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-

37、38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of

38、 microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for

39、device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for

40、 device class M. Device class M devices covered by this drawing shall be in microcircuit group number 36 (see MIL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84047 DEFENSE SUPPLY CENTER

41、 COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Test conditions 1/ -55C TC +125C Group A subgroups Limits Unit unless otherwise specified Min Max High level output voltage VOHVIN= VIHminimum or VILmaximum

42、 IOH= -20 A VCC= 2.0 V 1, 2, 3 1.9 V VCC= 4.5 V 4.4 VCC= 6.0 V 5.9 VIN= VIHminimum or VILmaximum IOH= -4.0 mA VCC= 4.5 V 1 3.98 2, 3 3.7 VIN= VIHminimum or VILmaximum IOH= -5.2 mA VCC= 6.0 V 1 5.48 2, 3 5.2 Low level output voltage VOLVIN= VIHminimum or VILmaximum IOL= +20 A VCC= 2.0 V 1, 2, 3 0.1 V

43、 VCC= 4.5 V 0.1 VCC= 6.0 V 0.1 VIN= VIHminimum or VILmaximum IOL= +4.0 mA VCC= 4.5 V 1 0.26 2, 3 0.40 VIN= VIHminimum or VILmaximum IOL= +5.2 mA VCC= 6.0 V 1 0.26 2, 3 0.40 High level input voltage VIH 2/ VCC= 2.0 V 1, 2, 3 1.5 V VCC= 4.5 V 3.15 VCC= 6.0 V 4.2 Low level input voltage VIL 2/ VCC= 2.0

44、 V 1, 2, 3 0.3 V VCC= 4.5 V 0.9 VCC= 6.0 V 1.2 Input capacitance CINTC= +25C, VCC= 2.0 V to 6.0 V, See 4.4.1c 4 10.0 pF Quiescent supply current ICCVIN= VCC or 0.0 V VCC= 6.0 V IOUT= 0.0 A 1 2.0 A 2, 3 40.0 Input leakage current IINVIN= VCCor 0.0 V VCC= 6.0 V 1 100.0 nA 2, 3 1000.0Power dissipation

45、capacitance CPDSee 4.4.1c 4 20.0 pF See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84047 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 7 DSCC FORM

46、2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Test conditions 1/ -55C TC +125C Group A subgroups Limits Unit unless otherwise specified Min Max Functional tests See 4.4.1b 7, 8 Propagation delay time, data to output, An and Bn to Yn tPHL1, tPLH1 3/ TC= +25C CL= 5

47、0 pF See figure 4 VCC= 2.0 V 9 100 ns VCC= 4.5 V 20 VCC= 6.0 V 17 TC= -55C, +125C CL= 50 pF See figure 4 VCC= 2.0 V 10, 11 150 ns VCC= 4.5 V 30 VCC= 6.0 V 25 Transition time, output rise and fall tTHL, tTLH 4/ TC= +25C CL= 50 pF See figure 4 VCC= 2.0 V 9 75 ns VCC= 4.5 V 15 VCC= 6.0 V 13 TC= -55C, +

48、125C CL= 50 pF See figure 4 VCC= 2.0 V 10, 11 110 ns VCC= 4.5 V 22 VCC= 6.0 V 19 1/ For a power supply of 5 V 10, the worst case output voltages (VOHand VOL) occur for HC at 4.5 V. Thus, the 4.5 V values should be used when designing with this supply. Worst cases VIHand VILoccur at VCC= 5.5 V and 4.5 V respectively. (The VIHvalue at 5.5 V is 3.85 V.) The worst case leakage currents (IINand ICC) occur for CMOS at the higher voltage, so the 6.0 V values should be used. Power dissipation capacitance (CPD), typically 100 pF per latch, determines the no load dynamic power consu

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