1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED B Convert to military drawing format. Add device type 02. Changes to 1.3 and 1.4. Changes to table I and II. Changes to figures 1, 2, 3, and 4. Editorial changes throughout. 87-05-21 N. A. Hauck C Update boilerplate to MIL-PRF-38535 requirements. -
2、 CFS 01-11-16 Thomas M. Hess D Made change to paragraph 3.5. Update boilerplate to MIL-PRF-38535 requirements. LTG 05-03-18 Thomas M. Hess E Update boilerplate to the current MIL-PRF-38535 requirements. jak 11-07-11 Thomas M. Hess Current CAGE Code is 67268 REV SHET REV SHET REV STATUS REV E E E E E
3、 E E E E E E E E OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 PMIC N/A PREPARED BY David A. Williams DLA LAND AND MARITIME STANDARD MICROCIRCUIT DRAWING CHECKED BY D. A. DiCenzo COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY N. A. H
4、auck MICROCIRCUIT, DIGITAL, CMOS, OCTAL AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 84-12-20 LATCHING BUS DRIVER, MONOLITHIC SILICONAMSC N/A REVISION LEVEL E SIZE A CAGE CODE 14933 84067 SHEET 1 OF 13 DSCC FORM 2233 APR 97 5962-E379-11 .Provided by IHSNot for ResaleNo reproductio
5、n or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84067 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class lev
6、el B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 84067 01 R X Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) ide
7、ntify the circuit function as follows: Device type Generic number Circuit function 01 82C82 Octal latching bus driver 02 82C83H Octal latching inverting bus driver 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Termi
8、nals Package style R GDIP1-T20 or CDIP2-T20 20 Dual-in-line2 CQCC1-N20 20 Square leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VCC) . -0.5 V dc to +8.0 V dc DC input voltage range (V
9、IN) . -0.5 V dc to VCC+ 0.5 V dc DC output voltage range (VOUT) -0.5 V dc to VCC+ 0.5 V dc Storage temperature range (TSTG) -65C to +150C Maximum power dissipation (PD) 1 W Lead temperature (soldering, 10 seconds) . +275C Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Junction temperatur
10、e (TJ) . +150C 1.4 Recommended operating conditions. 2/ 3/ Supply voltage range (VCC) . +4.5 V dc to +5.5 V dc Case operating temperature range (TC) -55C to +125C Output disable time (tEHOZ) Device type 01 35 ns maximum 4/ (see figure 4, reference 3) Device type 02 22 ns maximum 4/ (see figure 4, re
11、ference 3) Input rise or fall time (trand tf) . 20 ns maximum 4/ (see figure 4, reference 8) _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unless otherwise specifie
12、d, all voltages are referenced to ground. 3/ The limits for the parameters specified herein shall apply over the full specified VCCrange and case temperature range of -55C to +125C. 4/ Not tested, but characterized at initial device design and after major process or design changes affecting this par
13、ameter. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84067 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, st
14、andards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Int
15、egrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. M
16、IL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict
17、 between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requir
18、ements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional ce
19、rtification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein
20、. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and ph
21、ysical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figur
22、e 1. 3.2.3 Truth tables. The truth tables shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4. Provided by IHSNot for Resale
23、No reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84067 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 4 DSCC FORM 2234 APR 97 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical
24、 performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3
25、.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked as listed in MIL-HDBK-103 (see 6.6 herein). 3.5.1 Certification/compliance mark. A compliance indicator “C” sha
26、ll be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of c
27、ompliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 and QML-38535 (see 6.6 herein). The certificate of compliance submitted to DLA Land and Maritime -VA prior to listing as an approved source of supply shall affirm that the manufactur
28、ers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. N
29、otification of change to DLA Land and Maritime-VA shall be required in accordance with MIL-PRF-38535, appendix A. 3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritimes agent, and the acquiring activity retain the option to review the manufacturers facility and applicable require
30、d documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84067 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION
31、 LEVEL E SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC+125C unless otherwise specified Device types Group A subgroups Limits Unit Min Max High level input voltage VIH1/ VCC= 5.5 V 01, 02 1, 2, 3 2.2 V Low level input voltage VILVCC= 4.5
32、 V 01, 02 1, 2, 3 0.8 V High level output voltage VOHVCC= 4.5 V IOH= 8 mA, OEnullnullnullnull= GND 01 1, 2, 3 2.9 V 2/ 02 3.0 VCC= 4.5 V IOH= 100 A, OEnullnullnullnull= GND 01, 02 VCC0.4 Low level output voltage VOLVCC= 4.5 V IOL= 8 mA, OEnullnullnullnull= GND 01 1, 2, 3 0.4 V 2/ VCC= 4.5 V IOL= 15
33、mA, OEnullnullnullnull= GND 02 0.45 Input leakage current IIVCC= 5.5 V VIN= VCCor GND 01 1, 2, 3 -1.0 1.0 A 02 -10.0 10.0 Output leakage current IOVCC= 5.5 V VOUT= VCCor GND OEnullnullnullnull VCC 0.5 V 01, 02 1, 2, 3 -10.0 10.0 A Standby supply current ICCSBVCC= 5.5 V VIN= VCCor GND, outputs open 0
34、1, 02 1, 2, 3 10.0 A Input capacitance CINf = 1 MHz, TC = +25C All measurements referenced to device ground. See 4.3.1c 01, 02 Case R 4 13 pF 01, 02 Case 2 12 Output capacitance COf = 1 MHz, TC = +25C All measurements referenced to device ground. See 4.3.1c 01, 02 Case R 4 20 pF 01, 02 Case 2 15 Fun
35、ctional tests FT3/ VCC= 4.5 V and 5.5 V See 4.3.1d 01, 02 7, 8 Propagation delay time, input to tIVOVVCC= 4.5 V and 5.5 V See figure 4, reference 1 01 9, 10, 11 35 ns output 3/ 4/ 02 25 Propagation delay time,STB to tSHOVVCC= 4.5 V and 5.5 V See figure 4, reference 2 01 9, 10, 11 55 ns output 3/ 4/
36、02 50 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84067 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical perform
37、ance characteristics - Continued. Test Symbol Conditions -55C TC+125C unless otherwise specified Device types Group A subgroups Limits Unit Min Max Output enable time tELOVVCC= 4.5 V and 5.5 V See figure 4, reference 4 01 9, 10, 11 50 ns 3/ 4/ 02 45Input to STB setup time tIVSLVCC= 4.5 V and 5.5 V S
38、ee figure 4, reference 5 01, 02 9, 10, 11 0 ns / 4/ Input to STB hold time tSLIXVCC= 4.5 V and 5.5 V See figure 4, reference 6 01 9, 10, 11 25 ns 3/ 4/ 02 30STB high time tSHSLVCC= 4.5 V and 5.5 V See figure 4, reference 7 01 9, 10, 11 25 ns / 4/ 02 151/ VIHis measured by applying a pulse of magnitu
39、de = VIHminimum to one data input at a time and checking the corresponding device output for a valid logical “one” during valid input high time. Control pins, STB (strobe) and OEnullnullnullnull, are tested separately with all device data input pins at VCC 0.4 V. 2/ Interchanging of force and sense
40、conditions is permitted. 3/ Tested as follows: f = 1 MHz, VIH= 2.6 V, VIL= 0.4 V, CL= 50 pF (unless otherwise specified). VOH 1.5 V, VOL 1.5 V, and VIHfor STB (strobe) VCC 0.5 V. Input rise and fall times are driven at 1 ns/V. 4/ See figure 4. Provided by IHSNot for ResaleNo reproduction or networki
41、ng permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84067 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 7 DSCC FORM 2234 APR 97 Device type 01 02 Case outlines R 2 R 2 Terminal number Terminal symbol 1 DI0DI0DI0DI02 DI1DI1DI1DI13 DI2DI2DI2DI24 DI3D
42、I3DI3DI35 DI4DI4DI4DI46 DI5DI5DI5DI57 DI6DI6DI6DI68 DI7DI7DI7DI79 OEnullnullnullnullOEnullnullnullnullOEnullnullnullnullOEnullnullnullnull10 GND GND GND GND 11 STB STB STB STB 12 DO7DO7DOnullnullnullnull7DOnullnullnullnull7 13 DO6DO6DOnullnullnullnull6DOnullnullnullnull6 14 DO5DO5DOnullnullnullnull5
43、DOnullnullnullnull5 15 DO4DO4DOnullnullnullnull4DOnullnullnullnull4 16 DO3DO3DOnullnullnullnull3DOnullnullnullnull3 17 DO2DO2DOnullnullnullnull2DOnullnullnullnull2 18 DO1DO1DOnullnullnullnull1DOnullnullnullnull1 19 DO0DO0DOnullnullnullnull0DOnullnullnullnull0 20 VCCVCCVCCVCC(Device types 01 and 02)
44、Pin Description Terminal symbol Description DI0 DI7Data inputs DO0 DO7Data outputs (device type 01 only) DOnullnullnullnull0 DOnullnullnullnull7 Data outputs (device type 02 only) STB Strobe control input OEnullnullnullnullOutput enable control input (active low) FIGURE 1. Terminal connections. Prov
45、ided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84067 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 8 DSCC FORM 2234 APR 97 Device type 01 (Each driver) Inputs Outputs STB OEnullnullnullnullDI
46、 DO X H H H L L L X L H X Hi Z L H * H = High logic level Hi Z = High impedance L = Low logic level = Negative transition X = Irrelevant * = Latched to value of last data Device type 02 (Each driver) Inputs Outputs STB OEnullnullnullnullDI D0nullnullnullnullX H H H L L L X L H X Hi Z H L * H = High
47、logic level Hi Z = High impedance L = Low logic level = Negative transition X = Irrelevant * = Latched to value of last data FIGURE 2. Truth tables. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84067 DLA LAND A
48、ND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 9 DSCC FORM 2234 APR 97 FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84067 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 10 DSCC FORM 2234 APR 97 Device type 01 NOTES: 1. All timing measurements are made at 1.5 V unless otherwise noted. 2. Inputs must switch between VIL 0.
