DLA SMD-5962-84079 REV F-2005 MICROCIRCUIT DIGITAL ADVANCED LOW POWER SCHOTTKY TTL DECADE COUNTER MONOLITHIC SILICON《硅单片十进计数器 TTL肖脱基高级小功率数字微型电路》.pdf

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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Convert to military drawing format. Change VIL, fMAX, tP, CLOCK, IIL, and propagation delays. Remove vendor CAGE 04713. 86-09-02 N. A. Hauck B Change fanout, synchronous clear pulse width, enable P/enable T setup time, and ICC. Editorial changes.

2、 87-05-29 N. A. Hauck C Changes in accordance with NOR 5962-R133-92. 92-02-20 M. L. Poelking D Changes in accordance with NOR 5962-R335-92 92-10-05 M. L. Poelking E Revise for D certification. Editorial changes. New boilerplate. -ljs 99-09-20 Raymond Monnin F Update to current requirements. Editoria

3、l changes throughout. - gap 05-11-17 Raymond Monnin CURRENT CAGE CODE 67268 REV SHET REV SHET REV STATUS REV F F F F F F F F F F OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 PMIC N/A PREPARED BY David W. Queenan DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY D. A. DiCenzo COLUMBUS,

4、OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY N. A. Hauck MICROCIRCUIT, DIGITAL, ADVANCED LOW POWER SCHOTTKY TTL, DECADE AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 31 July 1984 COUNTER, MONOLITHIC SILICON AMSC N/A REVISIO

5、N LEVEL F SIZE A CAGE CODE 14933 84079 SHEET 1 OF 10 DSCC FORM 2233 APR 97 5962-E039-06 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84079 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL

6、 F SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 84

7、079 01 E X Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54ALS162 Synchronous 4-bit decade counter with synchronous clear 1.2.2 Cas

8、e outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 Dual-in-line F GDFP2-F16 or CDFP3-F16 16 Flat package 2 CQCC1-N20 20 Square chip carrier 1.2.3 Lead finish. The lead finish is

9、 as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage range -0.5 V dc to +7.0 V dc Input voltage range . -1.5 V dc at -18 mA to +7.0 V dc Storage temperature range . -65C to +150C Maximum power dissipation (PD) 1/ . 115 mW Lead temperature (soldering, 10 seconds) +

10、300C Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Junction temperature (TJ) +175C 1.4 Recommended operating conditions. Maximum low level output current (IOL) . 4.0 mA Supply voltage (VCC) . 4.5 V minimum to 5.5 V dc maximum Minimum high level input voltage (VIH) 2.0 V dc Maximum low l

11、evel input voltage (VIL) . 0.7 V dc Normalized fanout (each output): Low level . 20 maximum High level . 10 maximum Input clock frequency (fMAX) . 22 MHz Minimum width of clock pulse (tPclock) 20 ns _ 1/ Must withstand the added PDdue to short circuit test; (e.g., IO). Provided by IHSNot for ResaleN

12、o reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84079 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 3 DSCC FORM 2234 APR 97 Minimum setup times before clock : DATA . 20 ns Minimum synchronous clear setup time:

13、 (Low) . 20 ns (inactive) 20 ns Minimum enable P/enable T setup time 30 ns Hold times (tHOLD) 0 ns Case operating temperature range (TC) -55C to + 125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of

14、 this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS

15、MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available onlin

16、e at http:/assist.daps.dla.mil;quicksearch/ or www.dodssp.daps.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the

17、 text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A

18、84079 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Produ

19、ct built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and q

20、ualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as

21、described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. This drawing has been modified to allow the manufacturer to use the alternate die/fabrication requirements of paragraph A.3.2.2 of MIL-PRF-38535. 3.2 Design,

22、 construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be

23、as specified on figure 1. 3.2.3 Logic diagram. The logic diagram shall be as specified on figure 2. 3.2.4 Truth table. The truth table shall be as specified on figure 3. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as s

24、pecified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accor

25、dance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked as listed in MIL-HDBK-103 (see 6.6 herein). 3.5.1 Certification/compliance mark. The compliance mark for device class M shall be a “C” as required i

26、n MIL-PRF-38535, Appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. For product built in accordance with A.3.2.2 of MIL-PRF-38535, the “D” certification mark shall be used in

27、 place of the “C” certification mark. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an app

28、roved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits d

29、elivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required in accordance with MIL-PRF-38535, appendix A. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable req

30、uired documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84079 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-

31、3990 REVISION LEVEL F SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC+125C unless otherwise specified Group A subgroups Limits Unit Min Max High level output voltage VOH VCC = 4.5 V, IOH = -400 A, VIN= 0.7 V or 2.0 V 1, 2, 3 2.5 V Low lev

32、el output voltage VOL VCC= 4.5 V, IOL= 4 mA, VIN= 0.7 V or 2.0 V 1, 2, 3 0.4 V Input clamp voltage VICVCC= 4.5 V, TC= +25C, IIN= -18 mA 1 -1.5 V Low level input current IILVCC= 5.5 V, VIN= 0.4 V 1, 2, 3 -200 A High level input current IIH1VCC= 5.5 V, LOAD CLK or ENT 1, 2, 3 40 A VIN= 2.7 V All other

33、 inputs 1, 2, 3 20 A IIH2VCC= 5.5 V, LOAD CLK or ENT 1, 2, 3 200 A IN= 7.0 V All other inputs 1, 2, 3 100 A Short circuit current IO VCC= 5.5 V, VIN= 2.25 V 1/ (all outputs) 1, 2, 3 -20 -112 mA Supply current ICCVCC= 5.5 V 1, 2, 3 25 mA Maximum input A, clock, or count up frequency fMAXVCC= 5.0 V, C

34、L= 50 pF 10%, 9, 10, 11 22 MHz Propagation delay time, CLK to Q tPLH1 RL= 500 5% 9, 10, 11 22 ns tPHL1 9, 10, 11 28 ns Propagation delay time, CLK to RCO tPLH2 9, 10, 11 34 ns tPHL2 9, 10, 11 27 ns Propagation delay time, ENT to RCO tPLH3 9, 10, 11 20 ns tPHL3 9, 10, 11 16 ns 1/ The output condition

35、s have been chosen to produce a current that closely approximates one-half of the true short-circuit output current, IOS. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84079 DEFENSE SUPPLY CENTER COLUMBUS COLUMB

36、US, OHIO 43218-3990 REVISION LEVEL F SHEET 6 DSCC FORM 2234 APR 97 Case outlines E and F 2 Terminal number Terminal symbol 1 CLRNC 2 CLK CLR3 A CLK 4 B A 5 C B 6 D NC 7 ENP C 8 GND D 9 LOADENP 10 ENT GND 11 QDNC 12 QCLOAD13 QBENT14 QAQD15 RCO QC16 VCCNC 17 - QB18 - QA19 - RCO 20 - VCCFIGURE 1. Termi

37、nal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84079 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 7 DSCC FORM 2234 APR 97 FIGURE 2. Logic diagram. Provided by I

38、HSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84079 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 8 DSCC FORM 2234 APR 97 Inputs at time tnOutputs at time tn+1 Clock Enable P Enable T LOAD A

39、 B C D CLEARQA QBQCQDCarry output CP L X H X X X X H NC NC NC NC NC CP X L H X X X X H NC NC NC NC L CP H H H X X X X H Previous count plus 1 H if count = 9, L if count 9 CP X H L X X X X H A B C D H if count = 9, L if count 9 CP X L L X X X X H A B C D L CP X X X X X X X L L L L L L L = low level v

40、oltage H = high level voltage X = irrelevant CP = clock pulse NC = no change FIGURE 3. Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84079 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 RE

41、VISION LEVEL F SHEET 9 DSCC FORM 2234 APR 97 TABLE II. Electrical test requirements. MIL-STD-883 test requirements Subgroups (in accordance with MIL-STD-883, method 5005, table I) Interim electrical parameters (method 5004) - - - Final electrical test parameters (method 5004) 1*, 2, 3, 9 Group A tes

42、t requirements (method 5005) 1, 2, 3, 7, 9, 10, 11* Groups C and D end-point Electrical parameters (method 5005) 1, 2, 3 * PDA applies to subgroup 1. * Subgroups 10 and 11, if not tested, shall be guaranteed to the specified limits in table I. 4. QUALITY ASSURANCE PROVISIONS 4.1 Sampling and inspect

43、ion. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply

44、: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, o

45、utputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-

46、in are optional at the discretion of the manufacturer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84079 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 10 DSCC FORM 2234 APR 97

47、 4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 5005 of MIL-STD-883 including groups A, B, C, and D inspections. The following additional criteria shall apply. 4.3.1 Group A inspection. a. Tests shall be as specified in table II herein. b. Subgr

48、oups 4, 5, 6 and 8 in table I, method 5005 of MIL-STD-883 shall be omitted. c. Subgroup 7 shall include verification of the truth table. 4.3.2 Groups C and D inspections. a. End-point electrical parameters shall be as specified in table II herein. b. Steady-state life test conditions, method 1005 of MIL-STD-883. (1) Test condition A, B, C or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity up

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