1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Convert to military drawing format. Add vendor 01295 for device type 01RX and 012X. 87-01-15 Charles Reusing B Change drawing CAGE code to 67268. Update boilerplate to MIL-PRF-38535 requirements. jak 01-11-16 Thomas M. Hess C Made change to parag
2、raph 3.5. Update boilerplate to MIL-PRF-38535 requirements. LTG 05-01-24 Thomas M. Hess D Update boilerplate paragraphs to the current MIL-PRF-38535 requirements. - LTG 11-08-25 Thomas M. Hess CURRENT CAGE CODE 67268 REV SHET REV SHET REV STATUS REV D D D D D D D D D D OF SHEETS SHEET 1 2 3 4 5 6 7
3、8 9 10 PMIC N/A PREPARED BY Jeffery Tunstall DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A CHECKED BY D. A. DiCenzo APPROVED BY Ch
4、arles Reusing MICROCIRCUIT, DIGITAL, HIGH-SPEED CMOS, OCTAL BUFFER/LINE DRIVER WITH THREE- OUTPUTS, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON DRAWING APPROVAL DATE 86-03-03 REVISION LEVEL D SIZE A CAGE CODE 14933 85505 SHEET 1 OF 10 DSCC FORM 2233 APR 97 5962-E478-11 Provided by IHSNot for ResaleNo
5、reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85505 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JA
6、N class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 85505 01 R A Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device
7、type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54HCT240 Octal buffer/line driver with three-state outputs, TTL compatible inputs 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive d
8、esignator Terminals Package style R GDIP1-T20 or CDIP2-T20 20 Dual-in-line 2 CQCC1-N20 20 Square leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VCC) -0.5 V dc to +7.0 V dc DC input vo
9、ltage . -0.5 V dc to VCC+0.5 V dc DC output voltage . -0.5 V dc to VCC+0.5 V dc Clamp diode current. 20 mA DC output current (per pin) 35 mA DC VCCor GND current (per pin) . 70 mA Storage temperature range (TSTG) . -65C to +150C Maximum power dissipation (PD) . 500 mW 4/ Lead temperature (soldering,
10、 10 seconds) +260C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) +175C 1.4 Recommended operating conditions. Supply voltage range (VCC) +4.5 V dc to +5.5 V dc Case operating temperature range (TC) . -55C to +125C Input rise or fall time (VCC= 4.5 V) 0 to 500
11、ns 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unless otherwise specified, all voltages are referenced to ground. 3/ The limits for the parameters specified herein
12、shall apply over the full specified VCCrange and case temperature range of -55C to +125C. 4/ For TC= +100C to +125C, derate linearly at 12 mW/C. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85505 DLA LAND AND M
13、ARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specifie
14、d, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interf
15、ace Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardizatio
16、n Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents cited in the solicitation or contrac
17、t. JEDEC SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC) JEDEC Standard No. 7 - Standard for Description of 54/74HCXXXXX and 54/74HCTXXXXX Advanced High-Speed CMOS Devices. (Copies of these documents are available online at http:/www.jedec.org or from JEDEC Solid State Technology Association, 3103 North
18、10thStreet, Suite 240-S Arlington, VA 22201). 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specif
19、ic exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing
20、(QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as
21、 documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF
22、-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.
23、2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. Provided by IHSNot for ResaleNo reproduction or networking
24、 permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85505 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 4 DSCC FORM 2234 APR 97 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4. 3.
25、3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroup
26、s specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked as listed in MIL-HDB
27、K-103 (see 6.6 herein). 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to i
28、dentify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land and Maritime -VA prio
29、r to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each
30、lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DLA Land and Maritime -VA shall be required for any change that affects this drawing. 3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritimes agent, and the acquiring activity ret
31、ain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRA
32、WING SIZE A 85505 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Test conditions -55C TC +125C 1/ unless otherwise specified Group A subgroups Limits Unit Min Max High-level output voltage VO
33、HVIN= VIHor VILIOH= -20 A VCC= 4.5 V 1, 2, 3 4.4 V VIN= VIHor VILIOH= -6.0 mA VCC= 4.5 V 1, 2, 3 3.7 Low-level output voltage VOLVIN= VIHor VILIOL= +20 A VCC= 4.5 V 1, 2, 3 0.1 V VIN= VIHor VILIOL= +6.0 mA VCC= 4.5 V 1, 2, 3 0.4 High-level input voltage VIH2/ VCC= 4.5 V 1, 2, 3 2.0 V Low-level input
34、 voltage VIL2/ CC= 4.5 V 1, 2, 3 0.8 V Input capacitance CINVIN= 0.0 V, TC= +25C, See 4.3.1c 4 10 pF Quiescent current ICCVIN= VCCor GND, VCC= 5.5 V 1, 2, 3 160 A Additional quiescent supply current ICCVIN = 2.4 V or 0.5 V, any one input VIN= VCCor GND, other inputs VCC= 5.5 V, I OUT= 0 A 1, 2, 3 3.
35、0 mA Input leakage current IINVIN= VCCor GND, VCC= 5.5 V 1, 2, 3 1.0 A Three-state output leakage current IOZVIN= VIHor VILVO= VCCor GND 1, 2, 3 10.0 A Functional tests See 4.3.1d 7 Propagation delay, time, mAn to mYn tPLH, tPHL3/ CL= 50 pF See figure 4 9 28 ns 10, 11 42 Propagation delay, time, out
36、put enable, mOE to mYn tPZH, tPZL3/ CL= 50 pF See figure 4 9 35 ns 10, 11 53 Propagation delay, time, output disable, mOE to mYn tPHZ, tPLZ3/ CL= 50 pF See figure 4 9 35 ns 10, 11 53 Transition time, high-to-low low-to-high tTHL, tTLH4/ CL= 50 pF See figure 4 9 12 ns 10, 11 18 1/ For a power supply
37、of 5.0 V 10% the worst case output voltage (VOHand VOL) occur for HCT at 4.5 V. Thus, the 4.5 V values should be used when designing with this supply. The worst case leakage current (IIN, and ICC) occur for CMOS at the higher voltage so the 5.5 V values should be used. Worst cases VIHand VILoccur at
38、 VCC= 5.5 V and 4.5 V, respectively. 2/ Test not required if applied as a forcing function for VOHor VOL. 3/ For propagation delay tests, all paths must be tested. 4/ Transition times (tTLH, tTHL) shall be guaranteed, if not tested, to the limits specified in table I. Provided by IHSNot for ResaleNo
39、 reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85505 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 6 DSCC FORM 2234 APR 97 Device type 01 Case outlines R and 2 Terminal number Terminal symbol 1 1OE 2 1A13 2Y4 4 1A25 2Y
40、3 6 1A37 2Y2 8 1A49 2Y1 10 GND 11 2A1 12 1Y413 2A2 14 1Y315 2A3 16 1Y217 2A4 18 1Y119 2OE 20 VCCPin descriptions mAn (m = 1 to 2, n = 1 to 4) Data inputs mYn (m = 1 to 2, n = 1 to 4) Data outputs mOE (m = 1 to 2) Output enable inputs (active low) FIGURE 1. Terminal connections. Provided by IHSNot fo
41、r ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85505 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 7 DSCC FORM 2234 APR 97 Inputs Outputs mOE mAn mYn L L L L H H H L Z H H Z H = High voltage level L = Low vol
42、tage level X = Irrelevant Z = High impedance FIGURE 2. Truth table. FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85505 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D S
43、HEET 8 DSCC FORM 2234 APR 97 NOTES: 1. tPLHand tPHL: S1 and S2 = open tTLHand tTHL: S1 and S2 = open tPZHand tPHZ: S1 = open and S2 = closed tPZLand tPLZ: S1 = closed and S2 = open 2. RL= 1 k. 3. CL= 50 pF (includes probe and test fixture capacitance). 4 The tPZLand tPLZreference waveform is for the
44、 output under test with internal conditions such that the output is low at VOL except when disabled by the output enable control. The tPZH and tPHZreference waveform is for the output under test with internal conditions such that the output is high at VOHexcept when disabled by the output enable con
45、trol. 5. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following characteristics: PRR 1 MHz, ZO= 50, tr= 6.0 ns, tf= 6.0 ns. 6. The outputs are measured one at a time with one input transition per measurement. FIGURE 4. Switchin
46、g waveforms and test circuit. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85505 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 9 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and i
47、nspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall
48、 apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in
