1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add device type 02. Add packages J and 3 for device type 02. Editorial changes throughout. 93-02-16 Monica L. Poelking B Update to current requirements. Editorial changes throughout. - gap 06-01-05 Raymond Monnin C Update drawing to current MIL-P
2、RF-38535 requirements. - jt 13-01-31 C. SAFFLE CURRENT CAGE CODE 67268 The original first page of this drawing has been replaced. REV SHEET REV C SHEET 15 REV STATUS REV C C C C C C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY David W. Queenan DLA LAND AND MA
3、RITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY D. A. DiCenzo APPROVED BY Nelson A. Hauck MICROCIRCUIT, DIGITAL,ADVANCED, SCHOTTKY TTL, ARITHMETI
4、C LOGIC UNIT, MONOLITHIC SILICON DRAWING APPROVAL DATE 86-10-06 AMSC N/A REVISION LEVEL C SIZE A CAGE CODE 14933 5962-86710 SHEET 1 OF 15 DSCC FORM 2233 APR 97 5962-E073-13 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING
5、 SIZE A 5962-86710 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Id
6、entifying Number (PIN). The complete PIN is as shown in the following example: 5962-86710 01 J X Drawing number Device type (see 1.2.1) Case outline (see 1.2.2) Lead finish (see 1.2.3) 1.2.1 Device types. The device types identify the circuit function as follows: Device type Generic number Circuit f
7、unction 01 54F381 4-bit arithmetic logic unit 02 54F181 4-bit arithmetic logic unit 1.2.2 Case outlines. The case outlines are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style J GDIP1-T24 or CDIP2-T24 24 Dual-in-line package R GDIP1-T20 or C
8、DIP2-T20 20 Dual-in-line package S GDFP2-F20 or CDFP3-F20 20 Flat package 2 CQCC1-N20 20 Square leadless chip carrier 3 CQCC1-N28 28 Square leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage range . -0.5
9、 V dc to +7.0 V dc Input voltage range -1.5 V dc at -18 mA to +7.0 V dc Storage temperature -65C to +150C Maximum power dissipation (PD) per device 1/ . 490 mW Lead temperature (soldering, 10 seconds) . +300C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) . +1
10、75C 1.4 Recommended operating conditions. Supply voltage range (VCC) +4.5 V dc minimum to +5.5 V dc maximum Minimum high level input voltage (VIH) . +2.0 V dc Maximum low level input voltage (VIL) +0.8 V dc Case operating temperature range (TC) . -55C to +125C _ 1/ Must withstand the added PDdue to
11、short circuit test, e.g., IOS. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86710 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1
12、Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECI
13、FICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Stand
14、ard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In
15、the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The
16、 individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been
17、granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to
18、the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Desig
19、n, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as
20、 specified on figure 1. 3.2.3 Truth tables. The truth tables shall be as specified on figure 2. 3.2.4 Logic diagrams. The logic diagrams shall be as specified on figure 3. 3.2.5 Test circuit and switching waveforms. The test circuit and switching waveforms shall be as specified on figure 4. 3.3 Elec
21、trical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-
22、,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86710 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 4 DSCC FORM 2234 APR 97 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup a
23、re described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space
24、 limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ o
25、r “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certi
26、ficate of compliance submitted to DLA Land and Maritime -VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as re
27、quired in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DLA Land and Maritime -VA shall be required for any change that affects this drawing. 3.9 Verification and review. DLA Land and Mariti
28、me, DLA Land and Maritimes agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 4. VERIFICATION 4.1 Sampling and inspection. Sampling and i
29、nspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test,
30、method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, an
31、d power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the
32、discretion of the manufacturer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86710 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical perform
33、ance characteristics. Test Symbol Conditions Group A Device Limits Unit -55C TC +125C subgroups type unless otherwise specified Min Max High level output voltage VOHVCC= 4.5 V, 1,2,3 All 2.5 V IOH= -1.0 mA, VIN= 0.8 V or 2.0 V Low level output voltage VOLVCC= 4.5 V, 1,2,3 All 0.5 V IOL= 20 mA, VIN=
34、0.8 V or 2.0 V Input clamp voltage VICVCC= 4.5 V, 1 All -1.2 V IIN= -18 mA, TC= +25C High level input current IIH1VCC= 5.5 V, 1,2,3 All 20 A VIN= 2.7 V IIH2VCC= 5.5 V, 1,2,3 All 100 A VIN= 7.0 V Low level input current IILVCC= 5.5 V, S0-S2inputs 1,2,3 01 -0.6 mA VIN= 0.5 V Other inputs -2.4 M input
35、1,2,3 02 -0.6 An, Bn inputs -1.8 Sn inputs -2.4 Cn inputs -3.0 Short circuit output IOSVCC= 5.5 V, 1,2,3 All -60 -150 mA current VOUT= 0.0 V 1/ Supply current ICCVCC= 5.5 V, 1,2,3 01 89 mA S0-S3= GND, Other inputs high 02 65 Functional tests See 4.3.1c 7 All Propagation delay time, tPLH1VCC= 5.0 V,
36、9 01 12 ns Cn to F1RL = 500, 10, 11 15 tPHL1CL= 50 pF minimum, 9 01 8 ns See figure 4. 10, 11 12 Propagation delay time, tPLH29 02 3.0 8.5 ns Cn to nF 10, 11 2.5 16.0 tPHL29 02 3.0 8.5 ns 10, 11 2.5 12.0 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permit
37、ted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86710 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions Group A Device Limits Unit -55C TC +125C
38、 subgroups type unless otherwise specified Min Max Propagation delay time, tPLH3VCC= 5.0 V 9 01 15 ns any A or B to any F RL = 500 10, 11 19 tPHL3CL= 50 pF minimum 9 01 13 ns See figure 4. 10, 11 16 Propagation delay time, tPLH49 02 4.0 10.5 ns any A or B to any F 10, 11 3.5 16.5 (mode = sum) tPHL49
39、 02 4.0 10.0 ns 10, 11 4.0 13.5 Propagation delay time, tPLH59 02 4.0 12.0 ns any A or B to any F 10, 11 3.5 17.5 (mode = dif) tPHL59 02 3.0 12.0 ns 10, 11 3.0 14.0 Propagation delay time, tPLH69 01 20 ns S1to F110, 11 24 tPHL69 01 14 ns 10, 11 17 Propagation delay time, tPLH79 01 12 ns A1or B1to G
40、10, 11 14 tPHL79 01 10 ns 10, 11 14 Propagation delay time, tPLH89 02 2.5 7.5 ns A or B to G 10, 11 2.5 9.0 (mode = sum) tPHL89 02 2.5 7.5 ns 10, 11 2.5 9.5 Propagation delay time, tPLH99 02 3.0 9.0 ns A or B to G 10, 11 2.5 11.5 (mode = dif) tPHL99 02 2.5 9.5 ns 10, 11 2.5 11.0 Propagation delay ti
41、me, tPLH109 01 11 ns A1or B1to P 10, 11 15 tPHL109 01 10 ns 10, 11 13 Propagation delay time, tPLH119 02 2.5 7.0 ns A or B to P 10, 11 2.5 8.5 (mode = sum) tPHL119 02 3.0 7.5 ns 10, 11 3.0 9.5 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without
42、 license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86710 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions Group A Device Limits Unit -55C TC +125C subgroups
43、type unless otherwise specified Min Max Propagation delay time, tPLH12VCC= 5.0 V 9 02 2.5 8.0 ns A or B to P RL = 500 10, 11 2.5 11.0 (mode = dif) tPHL12CL= 50 pF minimum 9 02 3.0 8.5 ns See figure 4. 10, 11 3.0 11.0 Propagation delay time, tPLH139 01 14 ns S1to G or P 10, 11 19 tPHL139 01 14 ns 10,
44、 11 19 Propagation delay time, tPLH149 02 11 27 ns A or B to A = B 10, 11 8 35 (mode = dif) tPHL149 02 5.5 13.5 ns 10, 11 5.5 21.0 Propagation delay time, tPLH159 02 3.0 9.0 ns iA or iB to iF 10, 11 3.0 14.5 (mode = sum) tPHL159 02 3.0 10.0 ns 10, 11 3.0 14.5 Propagation delay time, tPLH169 02 3.0 1
45、1.0 ns iA or iB to iF 10, 11 3.0 17.5 (mode = dif) tPHL169 02 3.0 11.0 ns 10, 11 3.0 14.5 Propagation delay time, tPLH179 02 5.0 13.0 ns A or B to Cn+4 10, 11 5.0 15.5 (mode = sum) tPHL179 02 3.5 12.0 ns 10, 11 3.5 16.5 Propagation delay time, tPLH189 02 5.0 14.0 ns A or B to Cn+4 10, 11 5.0 17.0 (m
46、ode = dif) tPHL189 02 5.0 13.0 ns 10, 11 4.0 15.0 Propagation delay time, tPLH199 02 3.0 8.5 ns Cn to Cn+4 10, 11 3.0 10.0 tPHL199 02 3.0 8.0 ns 10, 11 3.0 9.5 Propagation delay time, tPLH209 02 3.5 9.5 ns A or B to F 10, 11 3.5 14.5 (mode = logic) tPHL209 02 3.0 10.0 ns 10, 11 3.0 15.5 1/ Not more
47、than one output should be shorted at one time, and the duration of the short circuit condition should not exceed 1 second. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86710 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 8 DSCC FORM 2234 APR 97 Device type 01 02 02 Case outline R, S, 2 J 3 Terminal number Terminal symbol 1 A1B 0NC 2 B1A 0B 03 A0S3A 04 B0S2S35 S0S1S26 S1S0S17 S2Cn S08 F0M NC 9 F1F 0Cn 10 GND
