DLA SMD-5962-86818 REV E-2011 MICROCIRCUIT DIGITAL HIGH SPEED CMOS 8-BIT MAGNITUDE COMPARATOR MONOLITHIC SILICON.pdf

上传人:sofeeling205 文档编号:698887 上传时间:2019-01-02 格式:PDF 页数:12 大小:111.40KB
下载 相关 举报
DLA SMD-5962-86818 REV E-2011 MICROCIRCUIT DIGITAL HIGH SPEED CMOS 8-BIT MAGNITUDE COMPARATOR MONOLITHIC SILICON.pdf_第1页
第1页 / 共12页
DLA SMD-5962-86818 REV E-2011 MICROCIRCUIT DIGITAL HIGH SPEED CMOS 8-BIT MAGNITUDE COMPARATOR MONOLITHIC SILICON.pdf_第2页
第2页 / 共12页
DLA SMD-5962-86818 REV E-2011 MICROCIRCUIT DIGITAL HIGH SPEED CMOS 8-BIT MAGNITUDE COMPARATOR MONOLITHIC SILICON.pdf_第3页
第3页 / 共12页
DLA SMD-5962-86818 REV E-2011 MICROCIRCUIT DIGITAL HIGH SPEED CMOS 8-BIT MAGNITUDE COMPARATOR MONOLITHIC SILICON.pdf_第4页
第4页 / 共12页
DLA SMD-5962-86818 REV E-2011 MICROCIRCUIT DIGITAL HIGH SPEED CMOS 8-BIT MAGNITUDE COMPARATOR MONOLITHIC SILICON.pdf_第5页
第5页 / 共12页
点击查看更多>>
资源描述

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add vendor CAGE 27014 for device types 01RX and 012X. 87-03-13 Michael A. Frye B Changed Code Ident. No. to 67268. Add vendor CAGE 01296 as a source of supply. Changes to figure 1, figure 4, and page 11. 87-11-06 Michael A. Frye C Change vendor C

2、AGE from 01296 to 01295. Delete vendor CAGE 04713. Editorial changes throughout. 90-10-25 Michael A. Frye D Add notes to figure 4, switching waveforms and test circuit. Update boilerplate to MIL-PRF-38535 requirements. Editorial changes throughout. - LTG 05-11-10 Thomas M. Hess E Correct the output

3、current condition description for VOHand VOL tests in table I. jak 11-08-24 Thomas M. Hess CURRENT CAGE CODE 67268 REV SHEET REV SHEET REV STATUS REV E E E E E E E E E E E OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PREPARED BY Marcia B. Kelleher DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990

4、http:/www.landandmaritime.dla.mil/ STANDARD MICROCIRCUIT DRAWING CHECKED BY Thomas L. Ricciuti THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, DIGITAL, HIGH SPEED CMOS, 8-BIT MAGNITUDE COMPARATOR, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEF

5、ENSE DRAWING APPROVAL DATE 86-09-12 AMSC N/A REVISION LEVEL E SIZE A CAGE CODE 14933 5962-86818 SHEET 1 OF 11 DSCC FORM 2233 APR 97 5962-E461-11 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUM

6、BUS, OHIO 43218-3990 SIZE A 5962-86818 REVISION LEVEL E SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The

7、complete PIN is as shown in the following example: 5962-86818 01 R A Drawing number Device type (see 1.2.1) Case outline (see 1.2.2) Lead finish (see 1.2.3) 1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54HC688 8-bit

8、 magnitude comparator (equality detector) 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style R GDIP1-T20 or CDIP2-T20 20 Dual-in-line 2 CQCC1-N20 20 Square chip carrier 1.2.3 Lead finish. The lead

9、 finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) -0.5 V dc to +7.0 V dc DC input voltage range (VIN) -0.5 V dc to VCC+ 0.5 V dc DC output voltage range (VOUT) . -0.5 V dc to VCC+ 0.5 V dc Clamp diode current 20 mA DC output current (pe

10、r pin) 25 mA DC VCCor GND current (per pin) . 50 mA Storage temperature range (TSTG) . -65C to +150C Maximum power dissipation (PD) 2/ . 500 mW Lead temperature (soldering, 10 seconds) 260C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) 175C 1.4 Recommended op

11、erating conditions. Supply voltage range (VCC) +2.0 V dc to +6.0 V dc Input voltage range (VIN) 0.0 V dc to VCCOutput voltage range (VOUT) 0.0 V dc to VCCCase operating temperature range (TC) . -55C to +125C Input rise or fall time (tr, tf): VCC= 2.0 V . 0 to 1000 ns VCC= 4.5 V . 0 to 500 ns VCC= 6.

12、0 V . 0 to 400 ns 1/ Unless otherwise specified, all voltages are referenced to ground. 2/ For TC= +100C to +125C, derate linearly at 12 mW/C. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBU

13、S, OHIO 43218-3990 SIZE A 5962-86818 REVISION LEVEL E SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise speci

14、fied, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Int

15、erface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardiza

16、tion Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes appl

17、icable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is pr

18、oduced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in acco

19、rdance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ ce

20、rtification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outline(s). The c

21、ase outline(s) shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switc

22、hing waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operat

23、ing temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-S

24、TANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 5962-86818 REVISION LEVEL E SHEET 4 DSCC FORM 2234 APR 97 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manuf

25、acturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN

26、devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required

27、from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-P

28、RF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DLA Land and Marit

29、ime -VA shall be required for any change that affects this drawing. 3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritime s agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall

30、 be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 5962-86818 REVISION LEVEL E SHEET 5 DSCC FORM 2234 APR 97 T

31、ABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ -55C TC +125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max High level output voltage VOHVIN= VIHminimum or VILmaximum IOH= -20 A VCC= 2.0 V 1, 2, 3 All 1.9 V VCC= 4.5 V 4.4 VCC= 6.0 V 5.9 VIN= V

32、IHminimum or VILmaximum IOH= -4.0 mA VCC= 4.5 V 3.7 VIN= VIHminimum or VILmaximum IOH= -5.2 mA VCC= 6.0 V 5.2 Low level output voltage VOLVIN= VIHminimum or VILmaximum IOL= +20 A VCC= 2.0 V 1, 2, 3 All 0.1 V VCC= 4.5 V 0.1 VCC= 6.0 V 0.1 VIN= VIHminimum or VILmaximum IOL= +4.0 mA VCC= 4.5 V 0.4 VIN=

33、 VIHminimum or VILmaximum IOL= +5.2 mA VCC= 6.0 V 0.4 High level input voltage VIH2/ VCC= 2.0 V 1, 2, 3 All 1.5 V VCC= 4.5 V 3.15 VCC= 6.0 V 4.2 Low level input voltage VIL2/ VCC= 2.0 V 1, 2, 3 All 0.3 V VCC= 4.5 V 0.9 VCC= 6.0 V 1.2 Quiescent current ICCVCC= 6.0 V, VIN= VCCor GND 1, 2, 3 All 160 A

34、Input leakage current IINVCC= 6.0 V, VIN= VCCor GND 1, 2, 3 All 1.0 A Input capacitance CINVCC= GND, TC= 25C See 4.3.1c 4 All 10.0 pF Functional tests See 4.3.1d 7, 8 All See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-

35、STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 5962-86818 REVISION LEVEL E SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions 1/ -55C TC +125C unless otherwise specified Group A subgroups Device type L

36、imits Unit Min Max Propagation delay time, input A or B to output A = B tPHL1, tPLH13/ CL= 50 pF See figure 4 VCC= 2.0 V 9 All 210 ns 10, 11 315 VCC= 4.5 V 9 42 10, 11 63 VCC= 6.0 V 9 36 10, 11 54 Propagation delay time, cascade input to output A = B tPHL2, tPLH23/ CL= 50 pF See figure 4 VCC= 2.0 V

37、9 All 120 ns 10, 11 180 VCC= 4.5 V 9 24 10, 11 35 VCC= 6.0 V 9 20 10, 11 31 Transition time tTLH, tTHL4/ CL= 50 pF See figure 4 VCC= 2.0 V 9 All 75 ns 10, 11 110 VCC= 4.5 V 9 15 10, 11 22 VCC= 6.0 V 9 13 10, 11 19 1/ For a power supply of 5.0 V 10%, the worst case output voltages (VOHand VOL) occur

38、for HC at 4.5 V. Thus, the 4.5 V values should be used when designing with this supply. Worst cases VIHand VILoccur at VCC= 5.5 V and 4.5 V, respectively. (The VIHvalue at 5.5 V is 3.85 V). The worst case leakage currents (IINand ICC) occur for CMOS at the higher voltage and so the 6.0 V values shou

39、ld be used. Power dissipation capacitance (CPD), typically 45 pF, determines the no load dynamic power consumption, PD= CPDVCC2f + ICCVCC, and the no load dynamic current consumption, IS= CPDVCCf + ICC. 2/ Tests are not required if applied as a forcing function for VOHand VOL. 3/ AC testing at VCC=

40、2.0 V and VCC= 6.0 V shall be guaranteed, if not tested, to the specified limits. 4/ Transition times (tTLH, tTHL), if not tested, shall be guaranteed to the specified limits. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAW

41、ING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 5962-86818 REVISION LEVEL E SHEET 7 DSCC FORM 2234 APR 97 Device type All Case outlines R and 2 Terminal number Terminal symbol 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 CASCADE INPUT A0 B0 A1 B1 A2 B2 A3 B3 GND A4 B4 A5 B5 A6 B6 A7

42、 B7 A = B VCCFIGURE 1. Terminal connections. Inputs Output An, Bn Cascade input A = B A = B A B A B X L L L H L H H H H = High logic level L = Low logic level X = Irrelevant FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STAND

43、ARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 5962-86818 REVISION LEVEL E SHEET 8 DSCC FORM 2234 APR 97 FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND

44、AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 5962-86818 REVISION LEVEL E SHEET 9 DSCC FORM 2234 APR 97 NOTES: 1. CL = 50 pF minimum or equivalent (includes test jig and probe capacitance). 2. Input signal from pulse generator: VIN= 0.0 V to VCC; PRR 1 MHz; ZO= 50; tr= 6.0 ns; tf= 6.0 ns; trand tfsh

45、all be measured from 0.1 VCCto 0.9 VCCand from 0.9 VCCto 0.1 VCC, respectively; duty cycle = 50 percent. 3. The outputs are measured one at a time with one transition per measurement. FIGURE 4. Switching waveforms and test circuit. Provided by IHSNot for ResaleNo reproduction or networking permitted

46、 without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 5962-86818 REVISION LEVEL E SHEET 10 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, app

47、endix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The t

48、est circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as sp

展开阅读全文
相关资源
猜你喜欢
相关搜索

当前位置:首页 > 标准规范 > 国际标准 > 其他

copyright@ 2008-2019 麦多课文库(www.mydoc123.com)网站版权所有
备案/许可证编号:苏ICP备17064731号-1