DLA SMD-5962-86819 REV G-2013 MICROCIRCUIT DIGITAL HIGH-SPEED CMOS HEX BUFFERS INVERTING LOGIC LEVEL DOWN CONVERTERS MONOLITHIC SILICON.pdf

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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED C Add vendor CAGE F8859. Add device class V criteria. Editorial changes throughout. jak. 99-11-05 Monica L. Poelking D Add table III, delta limits. Update boilerplate to latest MIL-PRF-38535 requirements. jak. 01-03-09 Thomas M. Hess E Correct tabl

2、e II. Correct boilerplate paragraphs. jak 02-01-25 Thomas M. Hess F Update boilerplate to MIL-PRF-38535 requirements. - LTG 07-12-17 Thomas M. Hess G Update boilerplate paragraphs to the current MIL-PRF-38535 requirements. - LTG 13-08-27 Thomas M. Hess CURRENT CAGE CODE 67268 REV SHEET REV SHEET REV

3、 STATUS REV G G G G G G G G G G G G OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY Greg A. Pitz DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DE

4、PARTMENT OF DEFENSE AMSC N/A CHECKED BY D. A. DiCenzo APPROVED BY N. A. Hauck MICROCIRCUIT, DIGITAL, HIGH-SPEED CMOS, HEX BUFFERS, INVERTING LOGIC LEVEL DOWN CONVERTERS, MONOLITHIC SILICON DRAWING APPROVAL DATE 86-09-08 REVISION LEVEL G SIZE A CAGE CODE 14933 5962-86819 SHEET 1 OF 12 DSCC FORM 2233

5、APR 97 5962-E550-13 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86819 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing docume

6、nts two product assurance class levels consisting of high reliability (device class Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Ass

7、urance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following examples. For device class M and Q: 5962 - 86819 01 E A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2) Case outline (see 1.2.4) Lead finish (see 1.2.5) / / Drawing number For

8、 device class V: 5962 - 86819 01 V X A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2) Device class designator Case outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MI

9、L-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device t

10、ype(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54HC4049 Buffers, hex inverting logic level down converters 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as listed below. Since the

11、 device class designator has been added after the original issuance of this drawing, device classes M and Q designators will not be included in the PIN and will not be marked on the device. Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883

12、 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86819 DLA L

13、AND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 3 DSCC FORM 2234 APR 97 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 Dual-in-line F GDFP2-F16 or

14、 CDFP3-F16 16 Flat pack 2 CQCC1-N20 20 Square leadless chip carrier X CDFP4-F16 16 Flat pack 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VC

15、C) -0.5 V dc to +7.0 V dc DC input voltage range (VIN) -0.5 V dc to 16.0 V dc DC output voltage range (VOUT) . -0.5 V dc to VCC+0.5 V dc Clamp diode input current (IIK) . 20 mA DC output current (IOK) (per pin) 25 mA DC VCCor GND current (per pin) . 50 mA Storage temperature range (TSTG) . -65C to +

16、150C Maximum power dissipation (PD): 500 mW 4/ Lead temperature (soldering, 10 seconds) +260C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) +175C 5/ 1.4 Recommended operating conditions. 2/ 3/ Supply voltage range (VCC) +2.0 V dc to +6.0 V dc Case operating t

17、emperature range (TC) -55C to +125C Input rise or fall time (tr, tf): VCC= 2.0 V 0 to 1,000 ns VCC= 4.5 V 0 to 500 ns VCC= 6.0 V 0 to 400 ns Input voltage range (VIN) 0.0 V dc to +15 V dc Output voltage range (VOUT). 0.0 V dc to VCC1/ Stresses above the absolute maximum rating may cause permanent da

18、mage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unless otherwise noted, all voltages are referenced to GND. 3/ The limits for the parameters specified herein shall apply over the full specified VCCrange and case temperature range of -55

19、C to +125C. 4/ For TC= +100C to +125C, derate linearly at 12 mW/C. 5/ Maximum junction temperature shall not be exceeded except for allowable short duration burn-in screening conditions in accordance with method 5004 of MIL-STD-883. Provided by IHSNot for ResaleNo reproduction or networking permitte

20、d without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86819 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and ha

21、ndbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT

22、 OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documen

23、ts are available online at http:/quicksearch.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwis

24、e specified, the issues of these documents cited in the solicitation or contract. JEDEC SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC) JESD7 - Standard for Description of 54/74HCXXXXX and 54/74HCTXXXXX Advanced High-Speed CMOS Devices. (Copies of these documents are available online at http:/www.jedec.o

25、rg or from JEDEC Solid State Technology Association, 3103 North 10thStreet, Suite 240-S Arlington, VA 22201-2107). 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document

26、, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manuf

27、acturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein.

28、 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in accordance

29、 with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuit. The

30、switching waveforms and test circuit shall be as specified in figure 4. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and

31、shall apply over the full case operating temperature range. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86819 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 5 DSCC FORM 2234 APR 97

32、 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be mar

33、ked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in

34、 accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall

35、be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificat

36、e of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply for this drawing shall affirm that the

37、manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535

38、or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DLA Land and Maritime-VA of change of product (see 6.2 herein) involving devices acquired

39、to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DLA Land and Maritime, DLA Land and Maritimes agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required doc

40、umentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 36 (see MIL-PRF-38535, appendix A). Provided by IHSNot for Res

41、aleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86819 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Test conditions 1/ -55C

42、TC +125C unless otherwise specified Group A subgroups Limits Unit Min Max High level output voltage VOHVIN= VIHminimum or VILmaximum IOH= -20 A VCC= 2.0 V 1, 2, 3 1.9 V VCC= 4.5 V 4.4 VCC= 6.0 V 5.9 VIN= VIHminimum or VILmaximum IOH= -4.0 mA VCC= 4.5 V 1 3.98 2, 3 3.7 VIN= VIHminimum or VILmaximum I

43、OH= -5.2 mA VCC= 6.0 V 1 5.48 2, 3 5.2 Low level output voltage VOLVIN= VIHminimum or VILmaximum IOL= +20 A VCC= 2.0 V 1, 2, 3 0.1 V VCC= 4.5 V 0.1 VCC= 6.0 V 0.1 VIN= VIHminimum or VILmaximum IOL= +4.0 mA VCC= 4.5 V 1 0.26 2, 3 0.40 VIN= VIHminimum or VILmaximum IOL= +5.2 mA VCC= 6.0 V 1 0.26 2, 3

44、0.40 High level input voltage VIH 2/ VCC= 2.0 V 1, 2, 3 1.5 V VCC= 4.5 V 3.15 VCC= 6.0 V 4.2 Low level input voltage VIL 2/ VCC= 2.0 V 1, 2, 3 0.3 V VCC= 4.5 V 0.9 VCC= 6.0 V 1.2 Quiescent supply current ICCVIN= VCC or GND VCC= 6.0 V 1 2.0 A 2, 3 40.0 High level input leakage current IIH1VCC= 6.0 V

45、VIN= VCC1 +0.1 A 2, 3 +1.0 IIH2VIN= 15.0 V 1 +0.5 A 2, 3 +5.0 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86819 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVE

46、L G SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Test conditions 1/ -55C TC +125C unless otherwise specified Group A subgroups Limits Unit Min Max Low level input leakage current IILVIN= GND VCC= 6.0 V 1 -0.1 A 2, 3 -1.0 A Input capacitance CIN

47、VIN= 0.0 V, TC= +25C See 4.4.1c 4 10.0 pF Power dissipation capacitance CPDSee 4.4.1c 4 35.0 pF Functional tests See 4.4.1b 7, 8 Propagation delay time, input An to output Yn tPHL tPLH 3/ TC= +25C CL= 50 pF See figure 4 VCC= 2.0 V 9 85.0 ns VCC= 4.5 V 17.0 VCC= 6.0 V 14.0 TC= -55C, +125C CL= 50 pF S

48、ee figure 4 VCC= 2.0 V 10, 11 130.0 ns VCC= 4.5 V 26.0 VCC= 6.0 V 22.0 Transition time, output rise and fall tTHL tTLH 4/ TC= +25C CL= 50 pF See figure 4 VCC= 2.0 V 9 75.0 ns VCC= 4.5 V 15.0 VCC= 6.0 V 13.0 TC= -55C, +125C CL= 50 pF See figure 4 VCC= 2.0 V 10, 11 110.0 ns VCC= 4.5 V 22.0 VCC= 6.0 V 19.0 1/ For a power supply of 5 V 10%, the worst case output voltages (VOHand VOL) occur for HC at 4.5 V. Thus, the 4.5 V values should be used when designing with this supply. Worst cases VIHand VILoccur at VCC= 5.5 V and 4.5 V respectiv

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